Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 008967/0232 | |
| Pages: | 8 |
| | Recorded: | 02/12/1998 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
10
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Patent #:
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Issue Dt:
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03/29/1994
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Application #:
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07938190
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Filing Dt:
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08/31/1992
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Title:
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METHOD OF REDUCING EXTRINSIC BASE-COLLECTOR CAPACITANCE IN BIPOLAR TRANSISTORS
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Patent #:
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Issue Dt:
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10/29/1996
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Application #:
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08255282
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Filing Dt:
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06/07/1994
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Title:
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COMPOUND SEMICONDUCTOR HETEROJUNCTION BIPOLAR TRANSISTOR
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Patent #:
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Issue Dt:
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06/11/1996
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Application #:
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08285601
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Filing Dt:
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08/03/1994
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Title:
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REDUCING EXTRINSIC BASE-COLLECTOR CAPACITANCE
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Patent #:
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Issue Dt:
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12/12/2000
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Application #:
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08482034
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Filing Dt:
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06/07/1995
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Title:
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METHOD OF FABRICATING A BIPOLAR TRANSISTOR
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Patent #:
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Issue Dt:
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09/03/1996
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Application #:
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08515636
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Filing Dt:
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08/16/1995
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Title:
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BIPOLAR TRANSISTOR
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Patent #:
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Issue Dt:
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09/08/1998
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Application #:
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08667318
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Filing Dt:
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06/20/1996
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Title:
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LOW-RESISTANCE CONTACT ON A COMPOUND SEMICONDUCTOR
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Patent #:
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Issue Dt:
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05/20/1997
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Application #:
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08679545
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Filing Dt:
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07/12/1996
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Title:
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METHOD FOR FORMING COLLECTOR UP HETEROJUNCTION BIPOLAR TRANSISTOR HAVING INSULATIVE EXTRINSIC EMITTER
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Patent #:
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Issue Dt:
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08/04/1998
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Application #:
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08736648
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Filing Dt:
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10/25/1996
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Title:
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METHOD FOR REDUCING EXTRINSIC BASE-COLLECTOR CAPACITANCE
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Patent #:
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Issue Dt:
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05/26/1998
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Application #:
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08787039
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Filing Dt:
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01/28/1997
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Title:
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COLLECTOR UP HETEROJUNCTION BIPOLAR TRANSISTOR
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Patent #:
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Issue Dt:
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02/20/2001
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Application #:
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08839120
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Filing Dt:
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04/23/1997
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Title:
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METHOD OF FORMING A LOW- RESISTANCE CONTACT ON COMPOUND SEMICONDUCTOR
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Assignee
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| 2501 SOUTH HIGHWAY 121 |
| LEWISVILLE, TEXAS 75067 |
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Correspondence name and address
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BAKER & BOTTS, L.L.P.
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JERRY W. MILLS, ESQ.
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2001 ROSS AVENUE
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DALLAS, TEXAS 75201
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