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Patent #:
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Issue Dt:
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09/17/2013
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Application #:
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12822405
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Filing Dt:
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06/24/2010
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Publication #:
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Pub Dt:
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12/29/2011
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TRENCHES AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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04/02/2013
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Application #:
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12822504
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Filing Dt:
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06/24/2010
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Publication #:
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Pub Dt:
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12/29/2011
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICALLY OFFSET BOND ON TRACE INTERCONNECT STRUCTURE ON LEADFRAME
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Patent #:
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Issue Dt:
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03/05/2013
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Application #:
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12822659
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Filing Dt:
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06/24/2010
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Publication #:
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Pub Dt:
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12/29/2011
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE STAND-OFF AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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01/21/2014
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Application #:
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12823079
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Filing Dt:
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06/24/2010
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Publication #:
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Pub Dt:
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10/21/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTEGRAL INNER LEAD AND PADDLE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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04/02/2013
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Application #:
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12834176
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Filing Dt:
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07/12/2010
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Publication #:
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Pub Dt:
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11/04/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING HONEYCOMB MOLDING
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Patent #:
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Issue Dt:
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02/04/2014
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Application #:
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12837562
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Filing Dt:
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07/16/2010
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Publication #:
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Pub Dt:
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01/19/2012
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Title:
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Semiconductor Device and Method of Forming Protective Layer Over Exposed Surfaces of Semiconductor Die
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Patent #:
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Issue Dt:
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11/06/2012
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Application #:
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12854306
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Filing Dt:
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08/11/2010
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Publication #:
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Pub Dt:
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02/16/2012
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED LEAD AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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08/06/2013
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Application #:
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12856288
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Filing Dt:
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08/13/2010
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Publication #:
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Pub Dt:
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04/07/2011
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SHAPED LEAD AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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07/23/2013
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Application #:
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12858163
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Filing Dt:
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08/17/2010
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Publication #:
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Pub Dt:
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02/23/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICALLY OFFSET CONDUCTIVE PILLARS OVER FIRST SUBSTRATE ALIGNED TO VERTICALLY OFFSET BOT INTERCONNECT SITES FORMED OVER SECOND SUBSTRATE
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Patent #:
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Issue Dt:
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05/07/2013
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Application #:
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12874827
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Filing Dt:
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09/02/2010
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Publication #:
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Pub Dt:
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03/08/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING BASE LEADS FROM BASE SUBSTRATE AS STANDOFF FOR STACKING SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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07/16/2013
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Application #:
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12875496
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Filing Dt:
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09/03/2010
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Publication #:
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Pub Dt:
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12/23/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REDISTRIBUTION LAYER AND METHOD FOR MANUFACTURING THEREOF
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Patent #:
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Issue Dt:
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04/02/2013
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Application #:
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12875998
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Filing Dt:
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09/03/2010
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Publication #:
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Pub Dt:
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03/08/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PRE-MOLDED SUBSTRATE TO REDUCE WARPAGE DURING DIE MOUNTING
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Patent #:
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Issue Dt:
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11/06/2012
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Application #:
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12878661
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Filing Dt:
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09/09/2010
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Publication #:
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Pub Dt:
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03/15/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING BASE SUBSTRATE WITH CAVITIES FORMED THROUGH ETCH-RESISTANT CONDUCTIVE LAYER FOR BUMP LOCKING
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Patent #:
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Issue Dt:
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11/06/2012
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Application #:
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12881983
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Filing Dt:
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09/14/2010
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Publication #:
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Pub Dt:
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03/15/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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02/19/2013
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Application #:
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12882067
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Filing Dt:
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09/14/2010
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Publication #:
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Pub Dt:
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03/15/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FILM ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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03/26/2013
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Application #:
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12884073
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Filing Dt:
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09/16/2010
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Publication #:
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Pub Dt:
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03/22/2012
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PADDLE MOLDING AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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06/18/2013
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Application #:
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12884134
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Filing Dt:
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09/16/2010
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Publication #:
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Pub Dt:
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03/22/2012
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACK INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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06/11/2013
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Application #:
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12885137
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Filing Dt:
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09/17/2010
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Publication #:
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Pub Dt:
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03/22/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH POST AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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03/19/2013
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Application #:
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12885831
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Filing Dt:
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09/20/2010
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Publication #:
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Pub Dt:
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03/22/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING DAM MATERIAL WITH OPENINGS AROUND SEMICONDUCTOR DIE FOR MOLD UNDERFILL USING DISPENSER AND VACUUM ASSIST
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Patent #:
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Issue Dt:
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01/08/2013
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Application #:
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12887811
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Filing Dt:
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09/22/2010
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Publication #:
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Pub Dt:
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03/22/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE TSV WITH INSULATING ANNULAR RING
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Patent #:
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Issue Dt:
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06/04/2013
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Application #:
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12890338
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Filing Dt:
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09/24/2010
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Publication #:
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Pub Dt:
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03/29/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH WARPAGE CONTROL AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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|
Issue Dt:
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08/27/2013
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Application #:
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12890409
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Filing Dt:
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09/24/2010
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Publication #:
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Pub Dt:
|
03/29/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF
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|
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Patent #:
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|
Issue Dt:
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02/04/2014
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Application #:
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12891232
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Filing Dt:
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09/27/2010
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Publication #:
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Pub Dt:
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03/29/2012
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PROTECTIVE STRUCTURE AROUND SEMICONDUCTOR DIE FOR LOCALIZED PLANARIZATION OF INSULATING LAYER
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Patent #:
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Issue Dt:
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02/05/2013
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Application #:
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12912728
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Filing Dt:
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10/26/2010
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Publication #:
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Pub Dt:
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02/17/2011
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Title:
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DROP-MOLD CONFORMABLE MATERIAL AS AN ENCAPSULATION FOR AN INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD FOR MANUFACTURING THEREOF
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Patent #:
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Issue Dt:
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02/19/2013
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Application #:
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12912730
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Filing Dt:
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10/26/2010
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Publication #:
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Pub Dt:
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02/17/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH IMAGE SENSOR SYSTEM
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Patent #:
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Issue Dt:
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12/11/2012
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Application #:
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12916758
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Filing Dt:
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11/01/2010
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Publication #:
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Pub Dt:
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02/24/2011
| | | | |
Title:
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ULTRA THIN BUMPED WAFER WITH UNDER-FILM
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Patent #:
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Issue Dt:
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02/26/2013
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Application #:
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12947442
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Filing Dt:
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11/16/2010
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Publication #:
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Pub Dt:
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05/17/2012
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERPOSER FRAME ELECTRICALLY CONNECTED TO EMBEDDED SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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04/16/2013
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Application #:
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12948756
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Filing Dt:
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11/17/2010
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Publication #:
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Pub Dt:
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05/17/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FOLDABLE SUBSTRATE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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02/12/2013
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Application #:
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12950631
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Filing Dt:
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11/19/2010
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Publication #:
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Pub Dt:
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05/24/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACK INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
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|
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Patent #:
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|
Issue Dt:
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07/02/2013
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Application #:
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12953812
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Filing Dt:
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11/24/2010
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Publication #:
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Pub Dt:
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05/24/2012
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING BASE SUBSTRATE WITH RECESSES FOR CAPTURING BUMPED SEMICONDUCTOR DIE
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|
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Patent #:
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|
Issue Dt:
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08/06/2013
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Application #:
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12957339
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Filing Dt:
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11/30/2010
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Publication #:
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Pub Dt:
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05/31/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTI-ROW LEADS AND METHOD OF MANUFACTURE THEREOF
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|
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Patent #:
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|
Issue Dt:
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08/13/2013
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Application #:
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12957361
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Filing Dt:
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11/30/2010
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Publication #:
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Pub Dt:
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05/31/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONNECTION SUPPORTS AND METHOD OF MANUFACTURE THEREOF
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|
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Patent #:
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|
Issue Dt:
|
11/05/2013
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Application #:
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12960178
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Filing Dt:
|
12/03/2010
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Publication #:
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Pub Dt:
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10/24/2013
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING BUMP-ON-LEAD INTERCONNECTION
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|
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Patent #:
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|
Issue Dt:
|
01/08/2013
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Application #:
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12961202
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Filing Dt:
|
12/06/2010
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Publication #:
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|
Pub Dt:
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03/31/2011
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER ON CONDUCTIVE TRACES FOR ELECTRICAL ISOLATION IN FINE PITCH BONDING
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|
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Patent #:
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|
Issue Dt:
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04/09/2013
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Application #:
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12961494
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Filing Dt:
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12/06/2010
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Publication #:
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Pub Dt:
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07/14/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD INTERLOCKING MECHANISMS AND METHOD OF MANUFACTURE THEREOF
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|
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Patent #:
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|
Issue Dt:
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01/08/2013
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Application #:
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12963934
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Filing Dt:
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12/09/2010
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Publication #:
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Pub Dt:
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05/26/2011
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING ELECTRICAL INTERCONNECT WITH STRESS RELIEF VOID
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Patent #:
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|
Issue Dt:
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10/01/2013
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Application #:
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12964577
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Filing Dt:
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12/09/2010
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Publication #:
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Pub Dt:
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06/14/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DIELECTRIC SUPPORT AND METHOD OF MANUFACTURE THEREOF
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|
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Patent #:
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|
Issue Dt:
|
08/06/2013
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Application #:
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12964617
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Filing Dt:
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12/09/2010
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Publication #:
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|
Pub Dt:
|
06/14/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH VERTICAL INTERCONNECTION AND METHOD OF MANUFACTURE THEREOF
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|
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Patent #:
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|
Issue Dt:
|
02/05/2013
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Application #:
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12964644
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Filing Dt:
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12/09/2010
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Publication #:
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Pub Dt:
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04/07/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM FOR STACKABLE DEVICES AND METHOD FOR MANUFACTURING THEREOF
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|
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Patent #:
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|
Issue Dt:
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05/21/2013
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Application #:
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12964810
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Filing Dt:
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12/10/2010
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Publication #:
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Pub Dt:
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06/14/2012
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING AN INDUCTOR WITHIN INTERCONNECT LAYER VERTICALLY SEPARATED FROM SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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02/19/2013
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Application #:
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12968266
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Filing Dt:
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12/14/2010
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Publication #:
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Pub Dt:
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06/14/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTIPLE ROW LEADS AND METHOD OF MANUFACTURE THEREOF
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|
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Patent #:
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|
Issue Dt:
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02/26/2013
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Application #:
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12974265
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Filing Dt:
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12/21/2010
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Publication #:
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Pub Dt:
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04/14/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING AN OFFSET STACKED CONFIGURATION AND METHOD FOR MANUFACTURING THEREOF
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Patent #:
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Issue Dt:
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03/26/2013
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Application #:
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13006697
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Filing Dt:
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01/14/2011
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Publication #:
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Pub Dt:
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05/12/2011
| | | | |
Title:
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SEMICONDUCTOR FLIP CHIP PACKAGE HAVING SUBSTANTIALLY NON-COLLAPSIBLE SPACER AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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08/06/2013
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Application #:
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13017170
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Filing Dt:
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01/31/2011
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Publication #:
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Pub Dt:
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05/19/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DUAL SIDE CONNECTION AND METHOD FOR MANUFACTURING THEREOF
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|
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Patent #:
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|
Issue Dt:
|
04/16/2013
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Application #:
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13023244
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Filing Dt:
|
02/08/2011
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Publication #:
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Pub Dt:
|
05/26/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WARP-FREE CHIP
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Patent #:
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Issue Dt:
|
02/04/2014
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Application #:
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13031546
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Filing Dt:
|
02/21/2011
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Publication #:
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Pub Dt:
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08/23/2012
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING MULTI-LAYERED UBM WITH INTERMEDIATE INSULATING BUFFER LAYER TO REDUCE STRESS FOR SEMICONDUCTOR WAFER
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|
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Patent #:
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Issue Dt:
|
09/17/2013
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Application #:
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13045523
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Filing Dt:
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03/10/2011
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Publication #:
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Pub Dt:
|
09/13/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM WITH UNDERFILLING STRUCTURES AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
07/09/2013
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Application #:
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13048859
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Filing Dt:
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03/15/2011
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Publication #:
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Pub Dt:
|
09/20/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD FRAME STACKING MODULE AND METHOD OF MANUFACTURE THEREOF
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|
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Patent #:
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Issue Dt:
|
01/21/2014
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Application #:
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13052590
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Filing Dt:
|
03/21/2011
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Publication #:
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Pub Dt:
|
09/27/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STEP MOLD AND METHOD OF MANUFACTURE THEREOF
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|
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Patent #:
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Issue Dt:
|
04/30/2013
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Application #:
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13053096
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Filing Dt:
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03/21/2011
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Publication #:
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Pub Dt:
|
09/27/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/17/2013
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Application #:
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13053142
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Filing Dt:
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03/21/2011
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Publication #:
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Pub Dt:
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09/27/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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04/02/2013
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Application #:
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13053719
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Filing Dt:
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03/22/2011
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Publication #:
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Pub Dt:
|
09/27/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH AN INTERPOSER SUBSTRATE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
11/13/2012
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Application #:
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13070219
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Filing Dt:
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03/23/2011
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Publication #:
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|
Pub Dt:
|
09/27/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EMBEDDED CONDUCTIVE STRUCTURE AND METHOD OF MANUFACTURE THEREOF
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|
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Patent #:
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Issue Dt:
|
04/16/2013
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Application #:
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13070291
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Filing Dt:
|
03/23/2011
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Publication #:
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Pub Dt:
|
09/27/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FLIPCHIP LEADFRAME AND METHOD OF MANUFACTURE THEREOF
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|
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Patent #:
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Issue Dt:
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06/18/2013
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Application #:
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13070789
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Filing Dt:
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03/24/2011
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Publication #:
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Pub Dt:
|
09/27/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FILLED VIAS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
04/09/2013
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Application #:
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13070899
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Filing Dt:
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03/24/2011
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Publication #:
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Pub Dt:
|
09/27/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD FRAME ETCHING AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
10/29/2013
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Application #:
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13071397
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Filing Dt:
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03/24/2011
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Publication #:
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Pub Dt:
|
09/27/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH COLLAPSED MULTI-INTEGRATION PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
12/10/2013
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Application #:
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13071433
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Filing Dt:
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03/24/2011
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Publication #:
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Pub Dt:
|
09/27/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LOCKING INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
04/16/2013
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Application #:
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13071449
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Filing Dt:
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03/24/2011
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Publication #:
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Pub Dt:
|
09/27/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PADS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
10/15/2013
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Application #:
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13071514
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Filing Dt:
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03/25/2011
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Publication #:
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Pub Dt:
|
09/27/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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|
Issue Dt:
|
03/19/2013
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Application #:
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13071760
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Filing Dt:
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03/25/2011
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Publication #:
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Pub Dt:
|
09/27/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TRANSPARENT ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
07/23/2013
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Application #:
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13081011
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Filing Dt:
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04/06/2011
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Publication #:
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Pub Dt:
|
07/28/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM WITH WIRE-IN-FILM ENCAPSULANT AND METHOD FOR MANUFACTURING THEREOF
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Patent #:
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Issue Dt:
|
11/27/2012
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Application #:
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13081227
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Filing Dt:
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04/06/2011
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Publication #:
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Pub Dt:
|
09/15/2011
| | | | |
Title:
|
METHOD OF MANUFACTURE OF INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTI-TIER CONDUCTIVE INTERCONNECTS
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Patent #:
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Issue Dt:
|
12/18/2012
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Application #:
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13095680
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Filing Dt:
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04/27/2011
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Publication #:
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Pub Dt:
|
08/18/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM AND METHOD OF MANUFACTURE THEREOF
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Patent #:
|
|
Issue Dt:
|
07/02/2013
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Application #:
|
13100235
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Filing Dt:
|
05/03/2011
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Publication #:
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Pub Dt:
|
11/08/2012
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MOUNTING COVER TO SEMICONDUCTOR DIE AND INTERPOSER WITH ADHESIVE MATERIAL
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Patent #:
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Issue Dt:
|
10/15/2013
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Application #:
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13102041
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Filing Dt:
|
05/05/2011
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Publication #:
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Pub Dt:
|
11/08/2012
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
01/21/2014
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Application #:
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13105814
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Filing Dt:
|
05/11/2011
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Publication #:
|
|
Pub Dt:
|
11/15/2012
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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|
Issue Dt:
|
07/09/2013
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Application #:
|
13112717
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Filing Dt:
|
05/20/2011
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Publication #:
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Pub Dt:
|
09/08/2011
| | | | |
Title:
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THIN PACKAGE SYSTEM WITH EXTERNAL TERMINALS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
12/31/2013
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Application #:
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13118214
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Filing Dt:
|
05/27/2011
|
Publication #:
|
|
Pub Dt:
|
11/29/2012
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERLOCK AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
07/02/2013
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Application #:
|
13118310
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Filing Dt:
|
05/27/2011
|
Publication #:
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|
Pub Dt:
|
11/29/2012
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH VERTICAL INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
03/05/2013
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Application #:
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13118955
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Filing Dt:
|
05/31/2011
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Publication #:
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|
Pub Dt:
|
12/06/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
04/02/2013
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Application #:
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13149669
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Filing Dt:
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05/31/2011
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Publication #:
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Pub Dt:
|
12/06/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE WITH CONDUCTIVE PADS HAVING EXPANDED INTERCONNECT SURFACE AREA FOR ENHANCED INTERCONNECTION PROPERTIES
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Patent #:
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Issue Dt:
|
11/19/2013
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Application #:
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13154308
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Filing Dt:
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06/06/2011
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Publication #:
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|
Pub Dt:
|
09/29/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PROTRUDING PAD PACKAGE SYSTEM AND METHOD FOR MANUFACTURING THEREOF
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Patent #:
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Issue Dt:
|
08/06/2013
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Application #:
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13159095
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Filing Dt:
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06/13/2011
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Publication #:
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Pub Dt:
|
10/06/2011
| | | | |
Title:
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METHOD FOR MANUFACTURE OF INLINE INTEGRATED CIRCUIT SYSTEM
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Patent #:
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Issue Dt:
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04/09/2013
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Application #:
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13160799
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Filing Dt:
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06/15/2011
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Publication #:
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|
Pub Dt:
|
10/06/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WIRE-IN-FILM ISOLATION BARRIER AND METHOD FOR MANUFACTURING THEREOF
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Patent #:
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Issue Dt:
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02/19/2013
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Application #:
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13161008
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Filing Dt:
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06/15/2011
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Publication #:
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Pub Dt:
|
10/06/2011
| | | | |
Title:
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METHOD FOR MANUFACTURING WAFER SCALE HEAT SLUG SYSTEM
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Patent #:
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Issue Dt:
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04/02/2013
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Application #:
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13161368
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Filing Dt:
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06/15/2011
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Publication #:
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Pub Dt:
|
12/20/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH UNDERFILL AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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07/02/2013
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Application #:
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13162513
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Filing Dt:
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06/16/2011
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Publication #:
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Pub Dt:
|
12/20/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTRA SUBSTRATE DIE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
09/10/2013
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Application #:
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13162526
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Filing Dt:
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06/16/2011
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Publication #:
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Pub Dt:
|
12/20/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE ON PACKAGE SUPPORT AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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01/21/2014
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Application #:
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13163643
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Filing Dt:
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06/17/2011
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Publication #:
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Pub Dt:
|
12/20/2012
| | | | |
Title:
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METHOD OF MANUFACTURING INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUPPORT STRUCTURE
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Patent #:
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Issue Dt:
|
07/23/2013
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Application #:
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13164015
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Filing Dt:
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06/20/2011
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Publication #:
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Pub Dt:
|
07/26/2012
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD FOR FORMING SEMICONDUCTOR PACKAGE HAVING BUILD-UP INTERCONNECT STRUCTURE OVER SEMICONDUCTOR DIE WITH DIFFERENT CTE INSULATING LAYERS
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Patent #:
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Issue Dt:
|
02/04/2014
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Application #:
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13164114
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Filing Dt:
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06/20/2011
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Publication #:
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Pub Dt:
|
12/20/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUPPORT STRUCTURE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
12/18/2012
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Application #:
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13169387
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Filing Dt:
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06/27/2011
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Publication #:
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Pub Dt:
|
10/20/2011
| | | | |
Title:
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PACKAGE-ON-PACKAGE SYSTEM WITH THROUGH VIAS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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01/15/2013
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Application #:
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13174033
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Filing Dt:
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06/30/2011
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Publication #:
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Pub Dt:
|
10/20/2011
| | | | |
Title:
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Semiconductor Package and Method of Forming Z-Direction Conductive Posts Embedded in Structurally Protective Encapsulant
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Issue Dt:
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09/10/2013
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13178347
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07/07/2011
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Publication #:
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Pub Dt:
|
10/27/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CONTOURED ENCAPSULATION AND METHOD FOR MANUFACTURING THEREOF
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Issue Dt:
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08/06/2013
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Application #:
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13181290
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07/12/2011
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Pub Dt:
|
01/26/2012
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING RDL WIDER THAN CONTACT PAD ALONG FIRST AXIS AND NARROWER THAN CONTACT PAD ALONG SECOND AXIS
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Issue Dt:
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08/06/2013
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Application #:
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13185384
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07/18/2011
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Pub Dt:
|
03/01/2012
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING ADHESIVE MATERIAL OVER SEMICONDUCTOR DIE AND CARRIER TO REDUCE DIE SHIFTING DURING ENCAPSULATION
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Issue Dt:
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08/27/2013
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13194874
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07/29/2011
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Pub Dt:
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11/24/2011
| | | | |
Title:
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SEMICONDUCTOR SYSTEM WITH FINE PITCH LEAD FINGERS AND METHOD OF MANUFACTURING THEREOF
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Issue Dt:
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01/21/2014
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13196279
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08/02/2011
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Publication #:
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Pub Dt:
|
11/24/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LAMINATE BASE
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Issue Dt:
|
03/05/2013
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Application #:
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13197122
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Filing Dt:
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08/03/2011
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Publication #:
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Pub Dt:
|
11/24/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ISOLATED PADS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
01/08/2013
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Application #:
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13209620
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Filing Dt:
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08/15/2011
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Publication #:
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Pub Dt:
|
12/08/2011
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING SHIELDING LAYER AFTER ENCAPSULATION AND GROUNDED THROUGH INTERCONNECT STRUCTURE
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Issue Dt:
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02/05/2013
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Application #:
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13211698
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Filing Dt:
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08/17/2011
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Publication #:
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Pub Dt:
|
12/08/2011
| | | | |
Title:
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SHIELDED STACKED INTEGRATED CIRCUIT PACKAGING SYSTEM AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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04/09/2013
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Application #:
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13215131
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Filing Dt:
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08/22/2011
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Publication #:
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Pub Dt:
|
12/08/2011
| | | | |
Title:
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NON-LEADED INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE GROUND SITES
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Patent #:
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Issue Dt:
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02/05/2013
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Application #:
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13223478
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Filing Dt:
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09/01/2011
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Publication #:
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Pub Dt:
|
12/22/2011
| | | | |
Title:
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Semiconductor Device and Method of Forming Dam Material Around Periphery of Die to Reduce Warpage
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Patent #:
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Issue Dt:
|
10/22/2013
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Application #:
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13224718
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Filing Dt:
|
09/02/2011
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Publication #:
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Pub Dt:
|
03/07/2013
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EMBEDDED THERMAL HEAT SHIELD AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
07/23/2013
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Application #:
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13224725
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Filing Dt:
|
09/02/2011
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Publication #:
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Pub Dt:
|
03/07/2013
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STIFFENER AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
08/06/2013
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Application #:
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13228226
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Filing Dt:
|
09/08/2011
|
Publication #:
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Pub Dt:
|
01/26/2012
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF CONFORMING CONDUCTIVE VIAS BETWEEN INSULATING LAYERS IN SAW STREETS
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Patent #:
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Issue Dt:
|
08/06/2013
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Application #:
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13228248
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Filing Dt:
|
09/08/2011
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Publication #:
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Pub Dt:
|
01/26/2012
| | | | |
Title:
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SEMICONDUCTOR DEVICE WITH CONDUCTIVE VIAS BETWEEN SAW STREETS
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Patent #:
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Issue Dt:
|
08/20/2013
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Application #:
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13235135
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Filing Dt:
|
09/16/2011
|
Publication #:
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Pub Dt:
|
03/21/2013
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE UNDERLAYER AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
12/10/2013
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Application #:
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13235202
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Filing Dt:
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09/16/2011
|
Publication #:
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Pub Dt:
|
03/21/2013
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL SIDE MOLD AND METHOD OF MANUFACTURE THEREOF
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