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250
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Patent #:
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Issue Dt:
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11/13/2012
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Application #:
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13235755
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Filing Dt:
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09/19/2011
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Publication #:
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Pub Dt:
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01/12/2012
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A COMPONENT IN AN ENCAPSULANT CAVITY AND METHOD OF FABRICATION THEREOF
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Patent #:
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Issue Dt:
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12/24/2013
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Application #:
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13239373
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Filing Dt:
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09/21/2011
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Publication #:
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Pub Dt:
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03/21/2013
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Title:
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INTEGRATED CIRCUIT SYSTEM WITH TEST PADS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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10/22/2013
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Application #:
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13268091
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Filing Dt:
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10/07/2011
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Publication #:
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Pub Dt:
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02/02/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICALLY OFFSET BOND ON TRACE INTERCONNECTS ON DIFFERENT HEIGHT TRACES
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Patent #:
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Issue Dt:
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06/25/2013
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Application #:
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13269442
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Filing Dt:
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10/07/2011
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Publication #:
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Pub Dt:
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02/02/2012
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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06/11/2013
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Application #:
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13272034
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Filing Dt:
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10/12/2011
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Publication #:
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Pub Dt:
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02/02/2012
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUNDED INTERCONNECT
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Patent #:
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Issue Dt:
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12/25/2012
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Application #:
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13300088
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Filing Dt:
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11/18/2011
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Publication #:
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Pub Dt:
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03/15/2012
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Title:
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METHOD OF MANUFACTURE OF INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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08/06/2013
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Application #:
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13314984
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Filing Dt:
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12/08/2011
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Publication #:
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Pub Dt:
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06/13/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MAKING SINGLE LAYER SUBSTRATE WITH ASYMMETRICAL FIBERS AND REDUCED WARPAGE
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Patent #:
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Issue Dt:
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10/15/2013
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Application #:
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13324380
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Filing Dt:
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12/13/2011
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Publication #:
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Pub Dt:
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04/12/2012
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER INTERCONNECTIONS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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10/01/2013
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Application #:
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13325903
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Filing Dt:
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12/14/2011
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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09/03/2013
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Application #:
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13326090
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Filing Dt:
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12/14/2011
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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08/20/2013
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Application #:
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13326173
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Filing Dt:
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12/14/2011
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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01/14/2014
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Application #:
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13326728
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Filing Dt:
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12/15/2011
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONTACTS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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01/07/2014
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Application #:
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13326891
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Filing Dt:
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12/15/2011
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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09/03/2013
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Application #:
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13327091
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Filing Dt:
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12/15/2011
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FILM ASSISTANCE MOLD AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/03/2013
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Application #:
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13360549
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Filing Dt:
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01/27/2012
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Publication #:
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Pub Dt:
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05/17/2012
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Title:
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SEMICONDUCTOR DEVICE HAVING CONDUCTIVE VIAS IN PERIPHERAL REGION CONNECTING SHIELDING LAYER TO GROUND
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Patent #:
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Issue Dt:
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02/04/2014
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Application #:
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13417034
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Filing Dt:
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03/09/2012
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Publication #:
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Pub Dt:
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09/12/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING NON-LINEAR INTERCONNECT LAYER WITH EXTENDED LENGTH FOR JOINT RELIABILITY
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Patent #:
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Issue Dt:
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11/19/2013
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Application #:
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13419242
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Filing Dt:
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03/13/2012
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Publication #:
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Pub Dt:
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07/05/2012
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Title:
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OPTICAL SEMICONDUCTOR DEVICE HAVING PRE-MOLDED LEADFRAME WITH WINDOW AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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07/02/2013
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Application #:
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13421770
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Filing Dt:
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03/15/2012
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Publication #:
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Pub Dt:
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07/05/2012
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Title:
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Semiconductor Device and Method of Forming With Three-Dimensional Vertically Oriented Integrated Capacitors
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Patent #:
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Issue Dt:
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01/08/2013
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Application #:
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13423263
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Filing Dt:
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03/18/2012
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Publication #:
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Pub Dt:
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07/12/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE PILLARS IN RECESSED REGION OF PERIPHERAL AREA AROUND THE DEVICE FOR ELECTRICAL INTERCONNECTION TO OTHER DEVICES
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Patent #:
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Issue Dt:
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05/21/2013
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Application #:
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13423739
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Filing Dt:
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03/19/2012
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Publication #:
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Pub Dt:
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07/12/2012
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Title:
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SEMICONDUCTOR PACKAGE WITH SEMICONDUCTOR CORE STRUCTURE AND METHOD OF FORMING SAME
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Patent #:
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Issue Dt:
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08/20/2013
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Application #:
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13423832
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Filing Dt:
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03/19/2012
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Publication #:
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Pub Dt:
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07/12/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTEGRATED PASSIVE DEVICE
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Patent #:
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Issue Dt:
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10/29/2013
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Application #:
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13425277
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Filing Dt:
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03/20/2012
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Publication #:
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Pub Dt:
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09/26/2013
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND LEADFRAME ETCHING AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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01/21/2014
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Application #:
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13426442
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Filing Dt:
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03/21/2012
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Publication #:
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Pub Dt:
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11/08/2012
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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03/05/2013
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Application #:
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13431816
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Filing Dt:
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03/27/2012
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Publication #:
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Pub Dt:
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07/19/2012
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Title:
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METHOD OF FORMING VERTICALLY OFFSET BOND ON TRACE INTERCONNECTS ON RECESSED AND RAISED BOND FINGERS
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Patent #:
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Issue Dt:
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04/09/2013
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Application #:
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13438155
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Filing Dt:
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04/03/2012
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Publication #:
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Pub Dt:
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07/26/2012
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Title:
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THERMALLY ENHANCED SEMICONDUCTOR PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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09/03/2013
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Application #:
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13441691
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Filing Dt:
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04/06/2012
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Publication #:
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Pub Dt:
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08/02/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING STUD BUMPS OVER EMBEDDED DIE
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Patent #:
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Issue Dt:
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10/29/2013
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Application #:
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13458289
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Filing Dt:
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04/27/2012
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Publication #:
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Pub Dt:
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08/23/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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10/15/2013
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Application #:
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13464979
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Filing Dt:
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05/05/2012
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Publication #:
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Pub Dt:
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08/23/2012
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Title:
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BUMP-ON-LEAD FLIP CHIP INTERCONNECTION
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Patent #:
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Issue Dt:
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07/02/2013
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Application #:
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13476899
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Filing Dt:
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05/21/2012
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Publication #:
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Pub Dt:
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09/13/2012
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Title:
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Semiconductor Device and Method of Confining Conductive Bump Material During Reflow with Solder Mask Patch
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Patent #:
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Issue Dt:
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10/15/2013
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Application #:
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13477630
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Filing Dt:
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05/22/2012
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Publication #:
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Pub Dt:
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09/13/2012
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKABLE DEVICES AND A METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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10/15/2013
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Application #:
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13492646
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Filing Dt:
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06/08/2012
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Publication #:
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Pub Dt:
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09/27/2012
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Title:
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APPARATUS FOR THERMALLY ENHANCED SEMICONDUCTOR PACKAGE
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Patent #:
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Issue Dt:
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11/12/2013
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Application #:
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13492765
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Filing Dt:
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06/08/2012
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Publication #:
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Pub Dt:
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09/27/2012
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Title:
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LEADFRAME-BASED MOLD ARRAY PACKAGE HEAT SPREADER AND FABRICATION METHOD THEREFOR
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Patent #:
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Issue Dt:
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01/28/2014
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Application #:
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13523261
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Filing Dt:
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06/14/2012
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Publication #:
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Pub Dt:
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12/19/2013
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TIEBAR-LESS DESIGN AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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|
Issue Dt:
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10/29/2013
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Application #:
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13531941
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Filing Dt:
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06/25/2012
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SHIELDING SPACER AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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|
Issue Dt:
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01/07/2014
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Application #:
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13542120
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Filing Dt:
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07/05/2012
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Publication #:
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Pub Dt:
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01/09/2014
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH GRID-ARRAY MECHANISM AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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07/16/2013
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Application #:
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13556064
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Filing Dt:
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07/23/2012
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Title:
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BUMP-ON-LEAD FLIP CHIP INTERCONNECTION
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Patent #:
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Issue Dt:
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08/13/2013
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Application #:
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13556106
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Filing Dt:
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07/23/2012
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Title:
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BUMP-ON-LEAD FLIP CHIP INTERCONNECTION
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Patent #:
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Issue Dt:
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08/13/2013
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Application #:
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13558586
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Filing Dt:
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07/26/2012
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Title:
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Semiconductor Device and Method of Dissipating Heat From Thin Package-on-Package Mounted to Substrate
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Patent #:
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Issue Dt:
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10/29/2013
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Application #:
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13558953
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Filing Dt:
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07/26/2012
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Title:
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SOLDER JOINT FLIP CHIP INTERCONNECTION HAVING RELIEF STRUCTURE
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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13559430
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Filing Dt:
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07/26/2012
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Publication #:
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Pub Dt:
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11/15/2012
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Title:
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Semiconductor Device and Method of Dual-Molding Die Formed on Opposite Sides of Build-Up Interconnect Structure
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Patent #:
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Issue Dt:
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08/06/2013
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Application #:
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13606631
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Filing Dt:
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09/07/2012
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Publication #:
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Pub Dt:
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12/27/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PARTIALLY-ETCHED CONDUCTIVE LAYER RECESSED WITHIN SUBSTRATE FOR BONDING TO SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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13615308
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Filing Dt:
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09/13/2012
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Publication #:
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Pub Dt:
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01/17/2013
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Title:
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Semiconductor Device and Method for Forming Passive Circuit Elements With Through Silicon Vias to Backside Interconnect Structures
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Patent #:
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Issue Dt:
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12/03/2013
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Application #:
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13679615
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Filing Dt:
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11/16/2012
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Publication #:
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Pub Dt:
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03/28/2013
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Title:
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PACKAGE-ON-PACKAGE SYSTEM WITH THROUGH VIAS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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08/27/2013
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Application #:
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13691427
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Filing Dt:
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11/30/2012
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Publication #:
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Pub Dt:
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04/11/2013
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Title:
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SEMICONDUCTOR DEVICE INCLUDING BUMP FORMED ON SUBSTRATE TO PREVENT EXTRIMELY-LOW DIELECTRIC CONSTANT (ELK) INTERLAYER DIELECTRIC LAYER (ILD) DELAMINATION DURING REFLOW PROCESS
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Patent #:
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Issue Dt:
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09/10/2013
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Application #:
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13706818
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Filing Dt:
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12/06/2012
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Publication #:
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Pub Dt:
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04/18/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING AIR GAP ADJACENT TO STRESS SENSITIVE REGION OF THE DIE
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Patent #:
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Issue Dt:
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07/09/2013
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Application #:
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13750975
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Filing Dt:
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01/25/2013
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Title:
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METHOD OF FORMING A BUMP-ON-LEAD FLIP CHIP INTERCONNECTION HAVING HIGHER ESCAPE ROUTING DENSITY
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Patent #:
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Issue Dt:
|
09/17/2013
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Application #:
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13752157
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Filing Dt:
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01/28/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING COMPOSITE BUMP-ON-LEAD INTERCONNECTION
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Patent #:
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Issue Dt:
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11/05/2013
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Application #:
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13756679
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Filing Dt:
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02/01/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF SELF-CONFINEMENT OF CONDUCTIVE BUMP MATERIAL DURING REFLOW WITHOUT SOLDER MASK
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Patent #:
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Issue Dt:
|
10/08/2013
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Application #:
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13756779
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Filing Dt:
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02/01/2013
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Title:
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Bump-On-Lead Flip Chip Interconnection
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Patent #:
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Issue Dt:
|
11/26/2013
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Application #:
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13756905
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Filing Dt:
|
02/01/2013
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Title:
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SOLDER JOINT FLIP CHIP INTERCONNECTION
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