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07/27/2004
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11/16/2004
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11/16/2004
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07/12/2005
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11/18/2003
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11/23/2004
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09/28/2004
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06/10/2003
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08/19/2003
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11/18/2003
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09/26/2001
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09/28/2001
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Title:
|
METHODS FOR POLISHING A SEMICONDUCTOR TOPOGRAPHY
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Patent #:
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Issue Dt:
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10/28/2003
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Application #:
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10027253
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Filing Dt:
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12/20/2001
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Title:
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FULLY ISOLATED DIELECTRIC MEMORY CELL STRUCTURE FOR A DUAL BIT NITRIDE STORAGE DEVICE AND PROCESS FOR MAKING SAME
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Patent #:
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Issue Dt:
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02/07/2006
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Application #:
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10028029
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Filing Dt:
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12/21/2001
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Title:
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EFFICIENT PEER-TO-PEER DMA
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Patent #:
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Issue Dt:
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03/14/2006
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Application #:
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10029530
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Filing Dt:
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12/20/2001
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Title:
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CIRCUIT AND METHOD FOR DISCHARGING HIGH VOLTAGE SIGNALS
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Patent #:
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Issue Dt:
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12/30/2003
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Application #:
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10030117
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Filing Dt:
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01/23/2002
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Title:
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MULTIPLE-BIT NON-VOLATILE MEMORY UTILIZING NON-CONDUCTIVE CHARGE TRAPPING GATE
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Patent #:
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Issue Dt:
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10/14/2003
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Application #:
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10037247
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Filing Dt:
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10/23/2001
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Title:
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CIRCUIT TO PROVIDE A TIME DELAY
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Patent #:
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Issue Dt:
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01/27/2004
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Application #:
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10042783
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Filing Dt:
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01/09/2002
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Title:
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ASYNCHRONOUS RANDOM ACCESS MEMORY WITH POWER OPTIMIZING CLOCK
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Patent #:
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Issue Dt:
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09/05/2006
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Application #:
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10054329
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Filing Dt:
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01/22/2002
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Title:
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METHOD AND/OR APPARATUS FOR IMPLEMENTING USB AND AUDIO SIGNALS SHARED CONDUCTORS
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Patent #:
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Issue Dt:
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02/08/2005
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Application #:
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10056242
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Filing Dt:
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01/23/2002
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Title:
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NON-STICK DETECTION METHOD AND MECHANISM FOR ARRAY MOLDED LAMINATE PACKAGES
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Patent #:
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Issue Dt:
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02/06/2007
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Application #:
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10057196
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Filing Dt:
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01/24/2002
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Title:
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CLOCKING SYSTEM AND METHOD FOR A MEMORY
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Patent #:
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Issue Dt:
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09/13/2005
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Application #:
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10057867
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Filing Dt:
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01/29/2002
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Publication #:
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Pub Dt:
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12/26/2002
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Title:
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MICROCONTROLLER WITH DEBUG SUPPORT UNIT
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10059119
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Filing Dt:
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01/31/2002
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Publication #:
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Pub Dt:
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09/26/2002
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Title:
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Tungsten gate MOS transistor and memory cell and method of making same
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Patent #:
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Issue Dt:
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12/28/2004
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Application #:
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10059823
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Filing Dt:
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01/29/2002
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Title:
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METHOD OF FORMING A FLOATING METAL STRUCTURE IN AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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08/26/2003
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Application #:
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10061620
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Filing Dt:
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02/01/2002
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Publication #:
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Pub Dt:
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06/13/2002
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Title:
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POWER-SAVING MODES FOR MEMORIES
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Patent #:
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Issue Dt:
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12/26/2006
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Application #:
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10061906
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Filing Dt:
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02/01/2002
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Title:
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EXTRACTING COMMENT KEYWORDS FROM DISTINCT DESIGN FILES TO PRODUCE DOCUMENTATION.
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Patent #:
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Issue Dt:
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02/14/2006
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Application #:
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10073434
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Filing Dt:
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02/11/2002
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Title:
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METHOD AND APPARATUS FOR ADDING OTG DUAL ROLE DEVICE CAPABILITY TO A USB PERIPHERAL
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Patent #:
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Issue Dt:
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11/25/2003
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Application #:
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10073490
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Filing Dt:
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02/13/2002
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Publication #:
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Pub Dt:
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01/09/2003
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Title:
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METHOD OF AND CIRCUIT FOR CONTROLLING A CLOCK
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Patent #:
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Issue Dt:
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12/28/2004
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Application #:
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10074495
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Filing Dt:
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02/11/2002
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Title:
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PARTIAL PAGE PROGRAMMING OF MULTI LEVEL FLASH
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Patent #:
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Issue Dt:
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10/31/2006
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Application #:
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10074888
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Filing Dt:
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02/13/2002
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Title:
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REDUCING DEFECT FORMATION WITHIN AN ETCHED SEMICONDUCTOR TOPOGRAPHY
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Patent #:
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Issue Dt:
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01/20/2004
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Application #:
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10083442
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Filing Dt:
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02/26/2002
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Title:
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METHOD/ARCHITECTURE FOR A LOW GAIN PLL WITH WIDE FREQUENCY RANGE
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Patent #:
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Issue Dt:
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05/04/2004
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Application #:
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10085716
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Filing Dt:
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02/27/2002
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Title:
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METHOD OF PERFORMING BACK-END MANUFACTURING OF AN INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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06/07/2005
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Application #:
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10085752
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Filing Dt:
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02/27/2002
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Title:
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METHOD AND SYSTEM FOR CONTROLLING THE PROCESSING OF AN INTEGRATED CIRCUIT CHIP ASSEMBLY LINE USING A CENTRAL COMPUTER SYSTEM AND A COMMON COMMUNICATION PROTOCOL
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Patent #:
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Issue Dt:
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08/16/2005
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Application #:
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10085757
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Filing Dt:
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02/27/2002
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Title:
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INTEGRATED BACK-END INTEGRATED CIRCUIT MANUFACTURING ASSEMBLY
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Patent #:
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Issue Dt:
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04/18/2006
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Application #:
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10086051
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Filing Dt:
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02/27/2002
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Title:
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METHOD AND SYSTEM FOR A REJECT MANAGEMENT PROTOCOL WITHIN A BACK-END INTEGRATED CIRCUIT MANUFACTURING PROCESS
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Patent #:
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Issue Dt:
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03/16/2004
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Application #:
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10096741
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Filing Dt:
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03/14/2002
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Title:
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LASER THERMAL ANNEALING OF SILICON NITRIDE FOR INCREASED DENSITY AND ETCH SELECTIVITY
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Patent #:
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Issue Dt:
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03/02/2004
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Application #:
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10099841
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Filing Dt:
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03/15/2002
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Title:
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GATE ETCH PROCESS
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Patent #:
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Issue Dt:
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01/21/2003
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Application #:
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10103721
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Filing Dt:
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03/25/2002
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Title:
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SEMICONDUCTOR MEMORY DEVICE
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|
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Patent #:
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Issue Dt:
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11/28/2006
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Application #:
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10107687
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Filing Dt:
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03/27/2002
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Title:
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METHOD AND APPARATUS FOR RECOVERY FROM POWER SUPPLY TRANSIENT STRESS CONDITIONS
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Patent #:
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Issue Dt:
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04/25/2006
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Application #:
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10109743
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Filing Dt:
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03/28/2002
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Title:
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RE-CONFIGURABLE COMBINATIONAL LOGIC DEVICE
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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10109979
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Filing Dt:
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03/29/2002
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Title:
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GRAPHICAL USER INTERFACE WITH LOGIC UNIFYING FUNCTIONS
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Patent #:
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Issue Dt:
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10/05/2004
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Application #:
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10112013
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Filing Dt:
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03/29/2002
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Title:
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APPARATUS AND METHOD FOR COLOR DATA INTERPOLATION
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Patent #:
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|
Issue Dt:
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12/07/2004
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Application #:
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10112833
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Filing Dt:
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03/29/2002
|
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Title:
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SEMICONDUCTOR TOPOGRAPHY WITH A FILL MATERIAL ARANGED WITHIN A PLURALITY OF VALLEYS ASSOCIATED WITH THE SURFACE ROUGHNESS OF THE METAL LAYER
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