Patent Assignment Details
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Reel/Frame: | 004863/0247 | |
| Pages: | 1 |
| | Recorded: | 04/05/1988 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST. |
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Total properties:
1
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Patent #:
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Issue Dt:
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11/07/1989
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Application #:
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07059237
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Filing Dt:
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06/08/1987
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Title:
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METHOD OF PREVENTING LATCH-UP FAILURES OF CMOS INTEGRATED CIRCUITS
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Assignee
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ARLINGTON, VIRGINIA 22217 |
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Correspondence name and address
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OFFICE OF COUNSEL
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SPACE AND NAVAL WARFARE SYSTEMS COMMAND
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(00C41) DEPARTMENT OF THE NAVY
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WASHINGTON, DC 20363-5100
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