Patent Assignment Details
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| Reel/Frame: | 015056/0247 | |
| Pages: | 4 |
| | Recorded: | 08/10/2004 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
4
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Patent #:
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Issue Dt:
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04/17/2001
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Application #:
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09598805
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Filing Dt:
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06/21/2000
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Title:
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System and method for erasing non-volatile memory cells
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Patent #:
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Issue Dt:
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06/19/2001
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Application #:
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09598826
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Filing Dt:
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06/21/2000
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Title:
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Circuit and method for equalizing erase rate of non-volatile memory cells
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Patent #:
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Issue Dt:
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03/05/2002
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Application #:
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09840838
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Filing Dt:
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04/24/2001
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Publication #:
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Pub Dt:
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08/23/2001
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Title:
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Method for operating non-volatile memory cells
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Patent #:
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Issue Dt:
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11/19/2002
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Application #:
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09840840
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Filing Dt:
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04/24/2001
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Publication #:
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Pub Dt:
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03/14/2002
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Title:
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METHOD FOR MANUFACTURING NON-VOLATILE MEMORY CELL ARRAY
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Assignee
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| 2518 MISSION COLLEGE BLVD |
| SANTA CLARA, CALIFORNIA 95054 |
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Correspondence name and address
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N. NICHOLAS GROSS
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726 DUBOCE AVE.
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SAN FRANCISCO, CA 94117
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