|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2014
|
Application #:
|
13465761
|
Filing Dt:
|
05/07/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/07/2013
| | | | |
|
Title:
|
Semiconductor Device with Drain-End Drift Diminution
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2014
|
Application #:
|
13466642
|
Filing Dt:
|
05/08/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
|
Title:
|
MISMATCH VERIFICATION DEVICE AND METHODS THEREOF
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13470448
|
Filing Dt:
|
05/14/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
|
Title:
|
PASSIVATED TEST STRUCTURES TO ENABLE SAW SINGULATION OF WAFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2014
|
Application #:
|
13471402
|
Filing Dt:
|
05/14/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
|
Title:
|
CELL BALANCE CONFIGURATION FOR PIN COUNT REDUCTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2014
|
Application #:
|
13472319
|
Filing Dt:
|
05/15/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/21/2013
| | | | |
|
Title:
|
SYSTEMS AND METHODS FOR PROVIDING SEMAPHORE-BASED PROTECTION OF SYSTEM RESOURCES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/30/2013
|
Application #:
|
13475946
|
Filing Dt:
|
05/19/2012
|
|
Title:
|
PHASE-LOCKED LOOP (PLL) CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2014
|
Application #:
|
13475947
|
Filing Dt:
|
05/19/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/21/2013
| | | | |
|
Title:
|
TAMPER DETECTOR FOR SECURE MODULE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2013
|
Application #:
|
13475948
|
Filing Dt:
|
05/19/2012
|
|
Title:
|
MEMORY BUILT-IN-SELF TESTING IN MULTI-CORE INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/2015
|
Application #:
|
13476711
|
Filing Dt:
|
05/21/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/21/2013
| | | | |
|
Title:
|
TEST FLOW TO DETECT A LATENT LEAKY BIT OF A NON-VOLATILE MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/2015
|
Application #:
|
13477764
|
Filing Dt:
|
05/22/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/28/2013
| | | | |
|
Title:
|
LOW-TEMPERATURE FLIP CHIP DIE ATTACH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2014
|
Application #:
|
13478557
|
Filing Dt:
|
05/23/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/28/2013
| | | | |
|
Title:
|
CAVITY-TYPE SEMICONDUCTOR PACKAGE AND METHOD OF PACKAGING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/16/2016
|
Application #:
|
13479168
|
Filing Dt:
|
05/23/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/28/2013
| | | | |
|
Title:
|
SENSOR DEVICE AND RELATED OPERATING METHODS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2014
|
Application #:
|
13479319
|
Filing Dt:
|
05/24/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/28/2013
| | | | |
|
Title:
|
NON-OVERLAPPING CLOCK GENERATOR CIRCUIT AND METHOD
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13479668
|
Filing Dt:
|
05/24/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/28/2013
| | | | |
|
Title:
|
PHOTRONIC DEVICE WITH REFLECTOR AND METHOD FOR FORMING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2013
|
Application #:
|
13480924
|
Filing Dt:
|
05/25/2012
|
|
Publication #:
|
|
Pub Dt:
|
09/13/2012
| | | | |
|
Title:
|
METHODS OF FORMING VOLTAGE LIMITING DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/2015
|
Application #:
|
13480931
|
Filing Dt:
|
05/25/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/17/2013
| | | | |
|
Title:
|
TRANSISTORS WITH DUAL LAYER PASSIVATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2013
|
Application #:
|
13480971
|
Filing Dt:
|
05/25/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/28/2013
| | | | |
|
Title:
|
STATE RETENTION SUPPLY VOLTAGE DISTRIBUTION USING CLOCK NETWORK SHIELDING
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13480977
|
Filing Dt:
|
05/25/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/28/2013
| | | | |
|
Title:
|
VEHICLE-BORNE RADAR SYSTEMS WITH CONTINUOUS-TIME, SIGMA DELTA ANALOG-TO-DIGITAL CONVERTERS, AND METHODS OF THEIR OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2015
|
Application #:
|
13481908
|
Filing Dt:
|
05/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/28/2013
| | | | |
|
Title:
|
SYSTEM AND METHODS FOR ENABLING A CONTROLLER AREA NETWORK (CAN) DEVICE TO OPERATE IN DIFFERENT POWER MODES BASED UPON THE PAYLOAD OF A WAKE-UP MESSAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2014
|
Application #:
|
13482271
|
Filing Dt:
|
05/29/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR CONTROLLING BYPASS OF A VOLTAGE REGULATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2015
|
Application #:
|
13482332
|
Filing Dt:
|
05/29/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
MEMS SENSOR WITH STRESS ISOLATION AND METHOD OF FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2015
|
Application #:
|
13483064
|
Filing Dt:
|
05/30/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH REDISTRIBUTED CONTACTS
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13483069
|
Filing Dt:
|
05/30/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
MULTI-CORE WIRE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/2014
|
Application #:
|
13483764
|
Filing Dt:
|
05/30/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
MULTI-PORT REGISTER FILE WITH MULTIPLEXED DATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/10/2015
|
Application #:
|
13483968
|
Filing Dt:
|
05/30/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
STRESS-BASED TECHNIQUES FOR DETECTING AN IMMINENT READ FAILURE IN A NON-VOLATILE MEMORY ARRAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2014
|
Application #:
|
13484022
|
Filing Dt:
|
05/30/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
TECHNIQUES FOR CHECKING COMPUTER-AIDED DESIGN LAYERS OF A DEVICE TO REDUCE THE OCCURRENCE OF MISSING DECK RULES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2014
|
Application #:
|
13484304
|
Filing Dt:
|
05/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
SAMPLING SWITCH CIRCUIT THAT USES CORRELATED LEVEL SHIFTING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2015
|
Application #:
|
13484326
|
Filing Dt:
|
05/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
CIRCUITRY INCLUDING RESISTIVE RANDOM ACCESS MEMORY STORAGE CELLS AND METHODS FOR FORMING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2013
|
Application #:
|
13484328
|
Filing Dt:
|
05/31/2012
|
|
Title:
|
TECHNIQUES FOR ELECTROMIGRATION STRESS DETERMINATION IN INTERCONNECTS OF AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2015
|
Application #:
|
13484353
|
Filing Dt:
|
05/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
MOLD COMPOUND COMPATIBILITY TEST SYSTEM AND METHODS THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
13484664
|
Filing Dt:
|
05/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
SYSTEM, METHOD AND APPARATUS FOR LEADLESS SURFACE MOUNTED SEMICONDUCTOR PACKAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2013
|
Application #:
|
13484859
|
Filing Dt:
|
05/31/2012
|
|
Title:
|
DYNAMIC LOGIC CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2013
|
Application #:
|
13484870
|
Filing Dt:
|
05/31/2012
|
|
Title:
|
DYNAMIC LOGIC CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2017
|
Application #:
|
13485078
|
Filing Dt:
|
05/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
METHODS AND SYSTEMS FOR TRANSITIONING BETWEEN A USER STATE AND A SUPERVISOR STATE BASED ON A NEXT INSTRUCTION FETCH ADDRESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2015
|
Application #:
|
13485120
|
Filing Dt:
|
05/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
Virtualized Interrupt Delay Mechanism
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/04/2015
|
Application #:
|
13485742
|
Filing Dt:
|
05/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
|
Title:
|
VOLTAGE-CONTROLLED OSCILLATORS AND RELATED SYSTEMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2013
|
Application #:
|
13485873
|
Filing Dt:
|
05/31/2012
|
|
Title:
|
METHODS AND STRUCTURES FOR SPLIT GATE MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2014
|
Application #:
|
13485886
|
Filing Dt:
|
05/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
METHODS AND STRUCTURES FOR REDUCING HEAT EXPOSURE OF THERMALLY SENSITIVE SEMICONDUCTOR DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2014
|
Application #:
|
13485912
|
Filing Dt:
|
05/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
INTEGRATED CIRCUIT DIE ASSEMBLY WITH HEAT SPREADER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/25/2015
|
Application #:
|
13486641
|
Filing Dt:
|
06/01/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
FIELD FOCUSING FEATURES IN A RERAM CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2014
|
Application #:
|
13486690
|
Filing Dt:
|
06/01/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
FIELD FOCUSING FEATURES IN A RERAM CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2013
|
Application #:
|
13487243
|
Filing Dt:
|
06/03/2012
|
|
Title:
|
LEVEL SHIFTING FLIP-FLOP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/2015
|
Application #:
|
13488446
|
Filing Dt:
|
06/05/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
METHOD FOR DETERMINING COORDINATES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2014
|
Application #:
|
13488452
|
Filing Dt:
|
06/05/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
TEST EQUIPMENT MANIFOLD INTERFACE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2014
|
Application #:
|
13489139
|
Filing Dt:
|
06/05/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
INDUCTIVE ELEMENT WITH INTERRUPTER REGION
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13489460
|
Filing Dt:
|
06/06/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/27/2012
| | | | |
|
Title:
|
BACKLIT VIDEO DISPLAY WITH DYNAMIC LUMINANCE SCALING
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13489462
|
Filing Dt:
|
06/06/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/27/2012
| | | | |
|
Title:
|
METHOD OF ASSEMBLING SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/18/2014
|
Application #:
|
13489466
|
Filing Dt:
|
06/06/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/03/2013
| | | | |
|
Title:
|
METHOD FOR MOLDING SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13489471
|
Filing Dt:
|
06/06/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/24/2013
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF PACKAGING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2014
|
Application #:
|
13490451
|
Filing Dt:
|
06/06/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/24/2013
| | | | |
|
Title:
|
STACKED DIE SEMICONDUCTOR PACKAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2014
|
Application #:
|
13491712
|
Filing Dt:
|
06/08/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/12/2013
| | | | |
|
Title:
|
CLOCKED MEMORY WITH LATCHING PREDECODER CIRCUITRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2014
|
Application #:
|
13491722
|
Filing Dt:
|
06/08/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/12/2013
| | | | |
|
Title:
|
CLOCKED MEMORY WITH WORD LINE ACTIVATION DURING A FIRST PORTION OF THE CLOCK CYCLE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/2013
|
Application #:
|
13491760
|
Filing Dt:
|
06/08/2012
|
|
Title:
|
INTEGRATING FORMATION OF A REPLACEMENT GATE TRANSISTOR AND A NON-VOLATILE MEMORY CELL USING AN INTERLAYER DIELECTRIC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2014
|
Application #:
|
13491771
|
Filing Dt:
|
06/08/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/12/2013
| | | | |
|
Title:
|
INTEGRATING FORMATION OF A REPLACEMENT GATE TRANSISTOR AND A NON-VOLATILE MEMORY CELL USING A HIGH-K DIELECTRIC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2014
|
Application #:
|
13493814
|
Filing Dt:
|
06/11/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/12/2013
| | | | |
|
Title:
|
MODIFIED HIGH-K GATE DIELECTRIC STACK
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13494160
|
Filing Dt:
|
06/12/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/12/2013
| | | | |
|
Title:
|
TEST VEHICLES FOR ENCAPSULATED SEMICONDUCTOR DEVICE PACKAGES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/2015
|
Application #:
|
13494501
|
Filing Dt:
|
06/12/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/12/2013
| | | | |
|
Title:
|
VRS INTERFACE WITH 1/T ARMING FUNCTION
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13495011
|
Filing Dt:
|
06/13/2012
|
|
Publication #:
|
|
Pub Dt:
|
02/14/2013
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE DIE BONDING
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13495013
|
Filing Dt:
|
06/13/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/31/2013
| | | | |
|
Title:
|
METHOD OF TESTING PARALLEL POWER CONNECTIONS OF SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/2015
|
Application #:
|
13500362
|
Filing Dt:
|
04/05/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2012
| | | | |
|
Title:
|
PIXEL DATA PROCESSING APPARATUS AND METHOD OF PROCESSING PIXEL DATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/2015
|
Application #:
|
13500691
|
Filing Dt:
|
04/06/2012
|
|
Publication #:
|
|
Pub Dt:
|
08/09/2012
| | | | |
|
Title:
|
INTEGRATED CIRCUITS AND METHODS FOR DEBUGGING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2014
|
Application #:
|
13500700
|
Filing Dt:
|
04/06/2012
|
|
Publication #:
|
|
Pub Dt:
|
08/16/2012
| | | | |
|
Title:
|
RESPONSE TO WEAROUT IN AN ELECTRONIC DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2013
|
Application #:
|
13501472
|
Filing Dt:
|
04/12/2012
|
|
Publication #:
|
|
Pub Dt:
|
08/16/2012
| | | | |
|
Title:
|
CONFERENCE CALL SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2015
|
Application #:
|
13502378
|
Filing Dt:
|
04/17/2012
|
|
Publication #:
|
|
Pub Dt:
|
08/23/2012
| | | | |
|
Title:
|
MEMORY DEVICE AND METHOD FOR SENSING A CONTENT OF A MEMORY CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2017
|
Application #:
|
13503861
|
Filing Dt:
|
04/25/2012
|
|
Publication #:
|
|
Pub Dt:
|
08/30/2012
| | | | |
|
Title:
|
VERTICAL POWER TRANSISTOR DEVICE, SEMICONDUCTOR DIE AND METHOD OF MANUFACTURING A VERTICAL POWER TRANSISTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2015
|
Application #:
|
13503862
|
Filing Dt:
|
04/25/2012
|
|
Publication #:
|
|
Pub Dt:
|
08/30/2012
| | | | |
|
Title:
|
INTEGRATED CIRCUIT AND METHOD FOR REDUCTION OF SUPPLY VOLTAGE CHANGES BY USING A CURRENT CONSUMING COMPONENT TO TEMPORARILY MODIFY OVERALL CURRENT CONSUMPTION BEFORE A NEWLY CHANGED INPUT SIGNAL BEING PROCESSED
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2014
|
Application #:
|
13504737
|
Filing Dt:
|
04/27/2012
|
|
Publication #:
|
|
Pub Dt:
|
09/06/2012
| | | | |
|
Title:
|
INTEGRATED CIRCUIT AND METHOD FOR REDUCING VIOLATIONS OF A TIMING CONSTRAINT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/2014
|
Application #:
|
13508066
|
Filing Dt:
|
05/04/2012
|
|
Publication #:
|
|
Pub Dt:
|
09/13/2012
| | | | |
|
Title:
|
RECEIVER AND METHOD FOR EQUALIZING SIGNALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2014
|
Application #:
|
13508091
|
Filing Dt:
|
05/04/2012
|
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
|
Title:
|
AREA EFFICIENT COUNTERS ARRAY SYSTEM AND METHOD FOR UPDATING COUNTERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/2015
|
Application #:
|
13508279
|
Filing Dt:
|
05/04/2012
|
|
Publication #:
|
|
Pub Dt:
|
09/13/2012
| | | | |
|
Title:
|
DEVICE AND METHOD FOR RECORDING PROTOCOL EVENTS IN AN ADVANCED COMMUNICATION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2016
|
Application #:
|
13509922
|
Filing Dt:
|
05/15/2012
|
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
|
Title:
|
BYPASS CAPACITOR CIRCUIT AND METHOD OF PROVIDING A BYPASS CAPACITANCE FOR AN INTEGRATED CIRCUIT DIE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2014
|
Application #:
|
13510011
|
Filing Dt:
|
05/16/2012
|
|
Publication #:
|
|
Pub Dt:
|
09/13/2012
| | | | |
|
Title:
|
PUMP SYSTEM AND MOTORIZED VEHICLE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2015
|
Application #:
|
13510103
|
Filing Dt:
|
05/16/2012
|
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
|
Title:
|
METHOD, INTEGRATED CIRCUIT AND ELECTRONIC DEVICE FOR COMPENSATING A TIMING SIGNAL BASED AT LEAST PARTLY ON DETERMINING A NUMBER OF STATE TRANSITIONS BETWEEN A CURRENT SET OF DATA STATES AND THE NEXT SET OF DATA STATES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/2015
|
Application #:
|
13510312
|
Filing Dt:
|
05/17/2012
|
|
Publication #:
|
|
Pub Dt:
|
09/06/2012
| | | | |
|
Title:
|
METHOD AND SYSTEM FOR ENABLING ACCESS TO FUNCTIONALITY PROVIDED BY RESOURCES OUTSIDE OF AN OPERATING SYSTEM ENVIRONMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2014
|
Application #:
|
13511321
|
Filing Dt:
|
05/22/2012
|
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
|
Title:
|
INTEGRATED CIRCUIT COMPRISING REFERENCE VOLTAGE GENERATION CIRCUITRY AND ELECTRONIC DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2018
|
Application #:
|
13511974
|
Filing Dt:
|
09/11/2014
|
|
Publication #:
|
|
Pub Dt:
|
12/25/2014
| | | | |
|
Title:
|
MULTI-CHIP DEVICE WITH TEMPERATURE CONTROL ELEMENT FOR TEMPERATURE CALIBRATION
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13517842
|
Filing Dt:
|
06/14/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/04/2012
| | | | |
|
Title:
|
REDISTRIBUTED CHIP PACKAGING WITH THERMAL CONTACT TO DEVICE BACKSIDE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2015
|
Application #:
|
13521478
|
Filing Dt:
|
07/11/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/23/2013
| | | | |
|
Title:
|
NETWORK ELEMENT, TELECOMMUNICATION SYSTEM, INTEGRATED CIRCUIT AND A METHOD FOR PROVIDING A TELEPHONY CONNECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2017
|
Application #:
|
13522382
|
Filing Dt:
|
07/16/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/22/2012
| | | | |
|
Title:
|
DEBUGGER SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR UTILIZING HARDWARE BREAKPOINTS FOR DEBUGGING INSTRUCTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/2015
|
Application #:
|
13522865
|
Filing Dt:
|
07/18/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/15/2012
| | | | |
|
Title:
|
CHIP DAMAGE DETECTION DEVICE FOR A SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2015
|
Application #:
|
13523120
|
Filing Dt:
|
06/14/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/04/2012
| | | | |
|
Title:
|
REPLACEMENT-GATE-COMPATIBLE PROGRAMMABLE ELECTRICAL ANTIFUSE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2015
|
Application #:
|
13523675
|
Filing Dt:
|
06/14/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/19/2013
| | | | |
|
Title:
|
SENSING DEVICE AND RELATED OPERATING METHODS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2014
|
Application #:
|
13524555
|
Filing Dt:
|
06/15/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/19/2013
| | | | |
|
Title:
|
SENSE AMPLIFIER CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2016
|
Application #:
|
13524918
|
Filing Dt:
|
06/15/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/19/2013
| | | | |
|
Title:
|
System and Method for Improved Job Processing to Reduce Contention for Shared Resources
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/2015
|
Application #:
|
13524947
|
Filing Dt:
|
06/15/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/19/2013
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR IMPROVED JOB PROCESSING OF A NUMBER OF
JOBS BELONGING TO COMMUNICATION STREAMS WITHIN A DATA PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2014
|
Application #:
|
13525347
|
Filing Dt:
|
06/17/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/19/2013
| | | | |
|
Title:
|
POWER MANAGEMENT CIRCUIT USING TWO CONFIGURATION SIGNALS TO CONTROL THE POWER MODES OF TWO CIRCUIT MODULES USING TWO CROSSLINKED MULTIPLEXERS AND A LEVEL SHIFTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/04/2015
|
Application #:
|
13525348
|
Filing Dt:
|
06/17/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/19/2013
| | | | |
|
Title:
|
METHOD FOR REDUCING MEMORY LATENCY IN PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
13525353
|
Filing Dt:
|
06/17/2012
|
|
Title:
|
SYSTEM AND METHOD FOR MEMORY TESTING IN ELECTRONIC CIRCUITS
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13525494
|
Filing Dt:
|
06/18/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/19/2013
| | | | |
|
Title:
|
Temporal Multithreading
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2017
|
Application #:
|
13525882
|
Filing Dt:
|
06/18/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/19/2013
| | | | |
|
Title:
|
Synchronous Rectifier Timer for Discontinuous Mode DC/DC Converter
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2013
|
Application #:
|
13526279
|
Filing Dt:
|
06/18/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/11/2012
| | | | |
|
Title:
|
MEMS SENSOR DEVICE WITH MULTI-STIMULUS SENSING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2014
|
Application #:
|
13528375
|
Filing Dt:
|
06/20/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
|
Title:
|
TRENCH FET WITH SOURCE RECESS ETCH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/2015
|
Application #:
|
13529589
|
Filing Dt:
|
06/21/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
|
Title:
|
Semiconductor Device with Floating RESURF Region
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2016
|
Application #:
|
13529595
|
Filing Dt:
|
06/21/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
|
Title:
|
Semiconductor Device Apparatus and Assembly with Opposite Die Orientations
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/10/2015
|
Application #:
|
13529601
|
Filing Dt:
|
06/21/2012
|
|
Publication #:
|
|
Pub Dt:
|
08/15/2013
| | | | |
|
Title:
|
CELL ROUTABILITY PRIORITIZATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
13530081
|
Filing Dt:
|
06/21/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
|
Title:
|
SCAN TESTING OF INTEGRATED CIRCUITS AND ON-CHIP MODULES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
13530085
|
Filing Dt:
|
06/21/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
|
Title:
|
CHANNEL DIAGNOSTIC SYSTEM FOR SENT RECEIVER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2015
|
Application #:
|
13530095
|
Filing Dt:
|
06/21/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
|
Title:
|
SYSTEM FOR REDUCING DYNAMIC POWER CONSUMPTION OF WAKEUP SOURCE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2014
|
Application #:
|
13530117
|
Filing Dt:
|
06/22/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
|
Title:
|
METHOD OF MAKING SURFACE MOUNT STACKED SEMICONDUCTOR DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2014
|
Application #:
|
13530118
|
Filing Dt:
|
06/22/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH REDISTRIBUTED CONTACTS
|
|
