Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 013700/0267 | |
| Pages: | 2 |
| | Recorded: | 06/02/2003 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
3
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10256130
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Filing Dt:
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09/27/2002
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Publication #:
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Pub Dt:
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02/13/2003
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Title:
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Method of forming a highly integrated non-volatile semiconductor memory device
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10307931
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Filing Dt:
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12/03/2002
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Publication #:
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Pub Dt:
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04/24/2003
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Title:
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Transcribing original substrate for a wiring pattern
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10387389
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Filing Dt:
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03/14/2003
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Publication #:
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Pub Dt:
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09/04/2003
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Title:
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Method and system for compensating exposure value for exposure process as well as exposure system and semiconductor manufacturing system
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Assignee
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1753 SHIMONUMABE, NAKAHARA-KU |
KAWASAKI, KANAGAWA 211-8668, JAPAN |
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Correspondence name and address
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YOUNG & THOMPSON
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BENOIT CASTEL
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745 SOUTH 23RD STREET
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SECOND FLOOR
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ARLINGTON, VA 22202
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