Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 058532/0268 | |
| Pages: | 3 |
| | Recorded: | 01/04/2022 | | |
| Attorney Dkt #: | 116928/116929-US-PA |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
2
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Patent #:
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Issue Dt:
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08/13/2013
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Application #:
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13325587
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Filing Dt:
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12/14/2011
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Publication #:
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Pub Dt:
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03/21/2013
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Title:
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BONDING METHOD FOR THREE-DIMENSIONAL INTEGRATED CIRCUIT AND THREE-DIMENSIONAL INTEGRATED CIRCUIT THEREOF
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Patent #:
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Issue Dt:
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02/10/2015
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Application #:
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13605849
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Filing Dt:
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09/06/2012
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Publication #:
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Pub Dt:
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01/09/2014
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Title:
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SUBMICRON CONNECTION LAYER AND METHOD FOR USING THE SAME TO CONNECT WAFERS
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Assignee
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| 26F., NO. 1,SONGZHI RD.,XINYI DIST., |
| TAIPEI CITY, TAIWAN 110411 |
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Correspondence name and address
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JCIPRNET
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8F-1, NO. 100, ROOSEVELT RD. SEC. 2,
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TAIPEI, 100404 TAIWAN
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