Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 023056/0279 | |
| Pages: | 4 |
| | Recorded: | 08/05/2009 | | |
Attorney Dkt #: | 051876.G019 |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
11
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Patent #:
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Issue Dt:
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02/05/2002
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Application #:
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09393184
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Filing Dt:
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09/10/1999
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Title:
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STACKED SEMICONDUCTOR PACKAGE AND FABRICATING METHOD THEREOF
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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10724133
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Filing Dt:
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12/01/2003
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Publication #:
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Pub Dt:
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01/20/2005
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Title:
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METHOD OF FORMING METAL LINE LAYER IN SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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06/21/2005
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Application #:
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10857851
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Filing Dt:
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06/02/2004
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Publication #:
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Pub Dt:
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02/03/2005
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
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Patent #:
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Issue Dt:
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06/27/2006
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Application #:
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10876419
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Filing Dt:
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06/25/2004
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Publication #:
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Pub Dt:
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10/06/2005
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Title:
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MULTI-LEVEL VOLTAGE OUTPUT CONTROL CIRCUIT AND LOGIC GATE THEREFOR
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Patent #:
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Issue Dt:
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03/30/2010
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Application #:
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10876729
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Filing Dt:
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06/28/2004
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Publication #:
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Pub Dt:
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02/24/2005
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Title:
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A TRANSISTOR IN A SEMICONDUCTOR SUBSTRATE HAVING HIGH-CONCENTRATION SOURCE AND DRAIN REGION FORMED AT THE BOTTOM OF A TRENCH ADJACENT TO THE GATE ELECTRODE.
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Patent #:
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Issue Dt:
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05/09/2006
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Application #:
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10878314
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Filing Dt:
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06/29/2004
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Publication #:
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Pub Dt:
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06/16/2005
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Title:
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METHOD FOR FORMING INDUCTOR IN SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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01/03/2006
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Application #:
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10878360
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Filing Dt:
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06/29/2004
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Publication #:
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Pub Dt:
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10/20/2005
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Title:
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METHOD FOR FORMING METAL WIRES IN SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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02/14/2006
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Application #:
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10878361
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Filing Dt:
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06/29/2004
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Publication #:
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Pub Dt:
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06/30/2005
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Title:
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METHOD FOR FORMING INDUCTOR IN SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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05/09/2006
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Application #:
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10878478
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Filing Dt:
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06/29/2004
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Publication #:
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Pub Dt:
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05/19/2005
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Title:
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METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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06/06/2006
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Application #:
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10878567
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Filing Dt:
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06/29/2004
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Publication #:
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Pub Dt:
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06/30/2005
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Title:
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RADIO FREQUENCY INTEGRATED CIRCUIT, AND METHOD FOR MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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09/15/2009
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Application #:
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10882536
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Filing Dt:
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06/30/2004
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Publication #:
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Pub Dt:
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05/19/2005
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Title:
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TEST PATTERN FOR RELIABILITY MEASUREMENT OF COPPER INTERCONNECTION LINE HAVING MOISTURE WINDOW AND METHOD FOR MANUFACTURING THE SAME
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Assignee
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1 HYANGJEONG-DONG, HEUNGDUK-GU, CHEONGJU-SI |
CHUNGCHEONGBUK-DO, KOREA, REPUBLIC OF 361-725 |
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Correspondence name and address
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BLAKELY , SOKOLOFF, TAYLOR & ZAFMAN LLP
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1279 OAKMEAD PARKWAY
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SUNNYVALE, CA 94085-4040
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