|
|
Patent #:
|
|
Issue Dt:
|
01/10/2012
|
Application #:
|
12180166
|
Filing Dt:
|
07/25/2008
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
PHASE-LOCKED LOOP SYSTEM WITH A PHASE-ERROR SPREADING CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2010
|
Application #:
|
12180818
|
Filing Dt:
|
07/28/2008
|
Publication #:
|
|
Pub Dt:
|
12/04/2008
| | | | |
Title:
|
ELECTRONIC DEVICE INCLUDING A TRANSISTOR STRUCTURE HAVING AN ACTIVE REGION ADJACENT TO A STRESSOR LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
06/07/2011
|
Application #:
|
12180936
|
Filing Dt:
|
07/28/2008
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
BASEBAND FILTERS FOR USE IN WIRELESS COMMUNICATION DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/2010
|
Application #:
|
12180947
|
Filing Dt:
|
07/28/2008
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
STACKED CASCODE CURRENT SOURCE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/19/2012
|
Application #:
|
12181363
|
Filing Dt:
|
07/29/2008
|
Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
BRANCH TARGET BUFFER ALLOCATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/2011
|
Application #:
|
12181701
|
Filing Dt:
|
07/29/2008
|
Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
SYSTEM AND METHOD FOR FETCHING INFORMATION TO A CACHE MODULE USING A WRITE BACK ALLOCATE ALGORITHM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/2011
|
Application #:
|
12181766
|
Filing Dt:
|
07/29/2008
|
Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
SELF-ALIGNED IN-LAID SPLIT GATE MEMORY AND METHOD OF MAKING
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2012
|
Application #:
|
12182349
|
Filing Dt:
|
07/30/2008
|
Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
METHOD FOR FORMING AN INSULATED GATE FIELD EFFECT DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/2010
|
Application #:
|
12182398
|
Filing Dt:
|
07/30/2008
|
Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
DUAL CURRENT PATH LDMOSFET WITH GRADED PBL FOR ULTRA HIGH VOLTAGE SMART POWER APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/22/2011
|
Application #:
|
12182421
|
Filing Dt:
|
07/30/2008
|
Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICES WITH EXTENDED ACTIVE REGIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2012
|
Application #:
|
12183492
|
Filing Dt:
|
07/31/2008
|
Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
LED DRIVER WITH FRAME-BASED DYNAMIC POWER MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/2010
|
Application #:
|
12183550
|
Filing Dt:
|
07/31/2008
|
Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
SQUARE TO PSEUDO-SINUSOIDAL CLOCK CONVERSION CIRCUIT AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2011
|
Application #:
|
12183563
|
Filing Dt:
|
07/31/2008
|
Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
DOUBLE-BALANCED SINUSOIDAL MIXING PHASE INTERPOLATOR CIRCUIT AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/2010
|
Application #:
|
12183739
|
Filing Dt:
|
07/31/2008
|
Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
CLOCKED SINGLE POWER SUPPLY LEVEL SHIFTER
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/2011
|
Application #:
|
12183755
|
Filing Dt:
|
07/31/2008
|
Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
BALUN SIGNAL TRANSFORMER AND METHOD OF FORMING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2011
|
Application #:
|
12183762
|
Filing Dt:
|
07/31/2008
|
Publication #:
|
|
Pub Dt:
|
12/11/2008
| | | | |
Title:
|
METHOD OF PROVIDING A DATA SIGNAL FOR CHANNEL ESTIMATION AND CIRCUIT THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2012
|
Application #:
|
12183767
|
Filing Dt:
|
07/31/2008
|
Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT HAVING AN ARRAY SUPPLY VOLTAGE CONTROL CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2012
|
Application #:
|
12184377
|
Filing Dt:
|
08/01/2008
|
Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
PACKAGING AN INTEGRATED CIRCUIT DIE WITH BACKSIDE METALLIZATION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2011
|
Application #:
|
12184438
|
Filing Dt:
|
08/01/2008
|
Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
LITHOGRAPHY FOR PITCH REDUCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/2010
|
Application #:
|
12186224
|
Filing Dt:
|
08/05/2008
|
Publication #:
|
|
Pub Dt:
|
11/27/2008
| | | | |
Title:
|
MICROELECTRONIC ASSEMBLY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2012
|
Application #:
|
12188819
|
Filing Dt:
|
08/08/2008
|
Publication #:
|
|
Pub Dt:
|
02/11/2010
| | | | |
Title:
|
ECHO CANCELLER WITH HEAVY DOUBLE-TALK ESTIMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2013
|
Application #:
|
12190291
|
Filing Dt:
|
08/12/2008
|
Publication #:
|
|
Pub Dt:
|
02/18/2010
| | | | |
Title:
|
METHOD FOR MANAGING BRANCH INSTRUCTIONS AND A DEVICE HAVING BRANCH INSTRUCTION MANAGEMENT CAPABILITIES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2011
|
Application #:
|
12192513
|
Filing Dt:
|
08/15/2008
|
Publication #:
|
|
Pub Dt:
|
02/18/2010
| | | | |
Title:
|
PROVISION OF EXTENDED ADDRESSING MODES IN A SINGLE INSTRUCTION MULTIPLE DATA (SIMD) DATA PROCESSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2011
|
Application #:
|
12192683
|
Filing Dt:
|
08/15/2008
|
Publication #:
|
|
Pub Dt:
|
02/18/2010
| | | | |
Title:
|
MANAGEMENT OF POWER DOMAINS IN AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2011
|
Application #:
|
12194131
|
Filing Dt:
|
08/19/2008
|
Publication #:
|
|
Pub Dt:
|
02/25/2010
| | | | |
Title:
|
TRANSISTOR WITH GAIN VARIATION COMPENSATION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/10/2012
|
Application #:
|
12194273
|
Filing Dt:
|
08/19/2008
|
Publication #:
|
|
Pub Dt:
|
02/25/2010
| | | | |
Title:
|
METHOD FOR ADDRESS COMPARISON AND A DEVICE HAVING ADDRESS COMPARISON CAPABILITIES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2011
|
Application #:
|
12194279
|
Filing Dt:
|
08/19/2008
|
Publication #:
|
|
Pub Dt:
|
02/25/2010
| | | | |
Title:
|
METHOD FOR SPECULATIVE EXECUTION OF INSTRUCTIONS AND A DEVICE HAVING SPECULATIVE EXECUTION CAPABILITIES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2012
|
Application #:
|
12194286
|
Filing Dt:
|
08/19/2008
|
Publication #:
|
|
Pub Dt:
|
02/25/2010
| | | | |
Title:
|
METHOD FOR EXECUTING AN INSTRUCTION LOOP AND A DEVICE HAVING INSTRUCTION LOOP EXECUTION CAPABILITIES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2012
|
Application #:
|
12194697
|
Filing Dt:
|
08/20/2008
|
Publication #:
|
|
Pub Dt:
|
02/25/2010
| | | | |
Title:
|
GAIN CONTROLLED THRESHOLD IN DENOISING FILTER FOR IMAGE SIGNAL PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2016
|
Application #:
|
12195220
|
Filing Dt:
|
08/20/2008
|
Publication #:
|
|
Pub Dt:
|
02/25/2010
| | | | |
Title:
|
DEBUG INSTRUCTION FOR EXECUTION BY A FIRST THREAD TO GENERATE A DEBUG EVENT IN A SECOND THREAD TO CAUSE A HALTING OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2012
|
Application #:
|
12195555
|
Filing Dt:
|
08/21/2008
|
Publication #:
|
|
Pub Dt:
|
02/25/2010
| | | | |
Title:
|
DEVICE THAT CAN BE RENDERED USELESS AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2013
|
Application #:
|
12195910
|
Filing Dt:
|
08/21/2008
|
Publication #:
|
|
Pub Dt:
|
02/25/2010
| | | | |
Title:
|
Techniques for Adaptive Predistortion Direct Current Offset Correction in a Transmitter
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2012
|
Application #:
|
12196730
|
Filing Dt:
|
08/22/2008
|
Publication #:
|
|
Pub Dt:
|
02/25/2010
| | | | |
Title:
|
DATA PROCESSING DEVICE DESIGN TOOL AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2011
|
Application #:
|
12198099
|
Filing Dt:
|
08/25/2008
|
Publication #:
|
|
Pub Dt:
|
02/25/2010
| | | | |
Title:
|
METHOD FOR DETECTING OUTPUT SHORT CIRCUIT IN SWITCHING REGULATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/2011
|
Application #:
|
12198102
|
Filing Dt:
|
08/25/2008
|
Publication #:
|
|
Pub Dt:
|
02/25/2010
| | | | |
Title:
|
CIRCUIT FOR DETECTING BONDING DEFECT IN MULTI-BONDING WIRE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2011
|
Application #:
|
12198104
|
Filing Dt:
|
08/25/2008
|
Publication #:
|
|
Pub Dt:
|
02/25/2010
| | | | |
Title:
|
METHOD FOR TESTING H-BRIDGE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2012
|
Application #:
|
12199089
|
Filing Dt:
|
08/27/2008
|
Publication #:
|
|
Pub Dt:
|
03/04/2010
| | | | |
Title:
|
RECEIVER I/Q GROUP DELAY MISMATCH CORRECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/2010
|
Application #:
|
12199093
|
Filing Dt:
|
08/27/2008
|
Publication #:
|
|
Pub Dt:
|
03/04/2010
| | | | |
Title:
|
MEMORY DEVICE AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/2009
|
Application #:
|
12201074
|
Filing Dt:
|
08/29/2008
|
Publication #:
|
|
Pub Dt:
|
12/25/2008
| | | | |
Title:
|
ELECTRONIC DEVICE INCLUDING A GATED DIODE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/2010
|
Application #:
|
12201211
|
Filing Dt:
|
08/29/2008
|
Publication #:
|
|
Pub Dt:
|
03/04/2010
| | | | |
Title:
|
PRESSURE SENSOR FEATURING OFFSET CANCELLATION AND METHOD OF MAKING
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2012
|
Application #:
|
12201216
|
Filing Dt:
|
08/29/2008
|
Publication #:
|
|
Pub Dt:
|
03/04/2010
| | | | |
Title:
|
CACHE SNOOP LIMITING WITHIN A MULTIPLE MASTER DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2012
|
Application #:
|
12201225
|
Filing Dt:
|
08/29/2008
|
Publication #:
|
|
Pub Dt:
|
03/04/2010
| | | | |
Title:
|
SNOOP REQUEST ARBITRATION IN A DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2012
|
Application #:
|
12201272
|
Filing Dt:
|
08/29/2008
|
Publication #:
|
|
Pub Dt:
|
03/04/2010
| | | | |
Title:
|
SNOOP REQUEST ARBITRATION IN A DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2010
|
Application #:
|
12201623
|
Filing Dt:
|
08/29/2008
|
Publication #:
|
|
Pub Dt:
|
03/04/2010
| | | | |
Title:
|
PACKAGE DEVICE HAVING CRACK ARREST FEATURE AND METHOD OF FORMING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2010
|
Application #:
|
12201932
|
Filing Dt:
|
08/29/2008
|
Publication #:
|
|
Pub Dt:
|
03/04/2010
| | | | |
Title:
|
SYSTEM AND METHOD FOR COOLING USING IMPINGING JET CONTROL
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12203480
|
Filing Dt:
|
09/03/2008
|
Publication #:
|
|
Pub Dt:
|
12/25/2008
| | | | |
Title:
|
HANDHELD DEVICE FOR TRANSMITTING A VISUAL FORMAT MESSAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2010
|
Application #:
|
12204500
|
Filing Dt:
|
09/04/2008
|
Publication #:
|
|
Pub Dt:
|
01/01/2009
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH A BUFFER REGION WITH TIGHTLY-PACKED FILLER PARTICLES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2013
|
Application #:
|
12204972
|
Filing Dt:
|
09/05/2008
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
PHASE/FREQUENCY DETECTOR FOR A PHASE-LOCKED LOOP THAT SAMPLES ON BOTH RISING AND FALLING EDGES OF A REFERENCE SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2013
|
Application #:
|
12204989
|
Filing Dt:
|
09/05/2008
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
SELECTIVE CACHE WAY MIRRORING
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2012
|
Application #:
|
12205210
|
Filing Dt:
|
09/05/2008
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
ERROR DETECTION SCHEMES FOR A UNIFIED CACHE IN A DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2012
|
Application #:
|
12205222
|
Filing Dt:
|
09/05/2008
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
ERROR DETECTION SCHEMES FOR A CACHE IN A DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2011
|
Application #:
|
12205438
|
Filing Dt:
|
09/05/2008
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
POWER MOSFET WITH A GATE STRUCTURE OF DIFFERENT MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2010
|
Application #:
|
12206332
|
Filing Dt:
|
09/08/2008
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
CIRCUIT AND METHOD FOR OPTIMIZING MEMORY SENSE AMPLIFIER TIMING
|
|
|
Patent #:
|
|
Issue Dt:
|
04/05/2011
|
Application #:
|
12207120
|
Filing Dt:
|
09/09/2008
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
METHODS FOR FORMING VARACTOR DIODES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2010
|
Application #:
|
12207127
|
Filing Dt:
|
09/09/2008
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
COUNTER-DOPED VARACTOR STRUCTURE AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
09/27/2011
|
Application #:
|
12207290
|
Filing Dt:
|
09/09/2008
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
System and method for providing external power on a universal serial bus
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2010
|
Application #:
|
12207719
|
Filing Dt:
|
09/10/2008
|
Publication #:
|
|
Pub Dt:
|
01/01/2009
| | | | |
Title:
|
METHODS FOR FORMING QUAD FLAT NO-LEAD (QFN) PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2011
|
Application #:
|
12208145
|
Filing Dt:
|
09/10/2008
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
METHOD FOR POWER REDUCTION AND A DEVICE HAVING POWER REDUCTION CAPABILITIES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/2010
|
Application #:
|
12209477
|
Filing Dt:
|
09/12/2008
|
Publication #:
|
|
Pub Dt:
|
01/22/2009
| | | | |
Title:
|
MEMORY WITH LEVEL SHIFTING WORD LINE DRIVER AND METHOD THEREOF
|
|
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Patent #:
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Issue Dt:
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09/04/2012
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Application #:
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12209887
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Filing Dt:
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09/12/2008
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Publication #:
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Pub Dt:
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03/12/2009
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Title:
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RECONFIGURABLE MULTI-PROCESSING COARSE-GRAIN ARRAY
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|
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Patent #:
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Issue Dt:
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06/12/2012
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Application #:
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12211556
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Filing Dt:
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09/16/2008
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Publication #:
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Pub Dt:
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01/08/2009
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Title:
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ULTRA-THIN DIE AND METHOD OF FABRICATING SAME
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Patent #:
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Issue Dt:
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02/26/2013
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Application #:
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12211892
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Filing Dt:
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09/17/2008
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Publication #:
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Pub Dt:
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03/18/2010
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Title:
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FOURIER TRANSFORM PROCESSING AND TWIDDLE FACTOR GENERATION
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Patent #:
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Issue Dt:
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06/28/2011
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Application #:
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12212028
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Filing Dt:
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09/17/2008
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Publication #:
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Pub Dt:
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01/08/2009
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Title:
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FLEXIBLE CARRIER FOR HIGH VOLUME ELECTRONIC PACKAGE FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
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01/17/2012
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Application #:
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12218183
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Filing Dt:
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07/11/2008
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Publication #:
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Pub Dt:
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01/14/2010
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Title:
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ERROR CORRECTING VITERBI DECODER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/2010
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Application #:
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12220349
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Filing Dt:
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07/24/2008
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Publication #:
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Pub Dt:
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01/28/2010
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Title:
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DIGITAL COMPLEX TONE GENERATOR AND CORRESPONDING METHODS
|
|
|
Patent #:
|
|
Issue Dt:
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07/12/2011
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Application #:
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12221548
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Filing Dt:
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07/31/2008
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Publication #:
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Pub Dt:
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02/04/2010
| | | | |
Title:
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RECOVERING SYMBOLS IN A COMMUNICATION RECEIVER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2011
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Application #:
|
12226973
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Filing Dt:
|
11/14/2008
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Publication #:
|
|
Pub Dt:
|
06/25/2009
| | | | |
Title:
|
METHOD FOR TRANSFERRING A PREDETERMINED PATTERN REDUCING PROXIMITY EFFECTS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/04/2011
|
Application #:
|
12233913
|
Filing Dt:
|
09/19/2008
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Publication #:
|
|
Pub Dt:
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03/25/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT HAVING BOOSTED ARRAY VOLTAGE AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/2010
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Application #:
|
12233922
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Filing Dt:
|
09/19/2008
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Publication #:
|
|
Pub Dt:
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03/25/2010
| | | | |
Title:
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MEMORY HAVING SELF-TIMED BIT LINE BOOST CIRCUIT AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2013
|
Application #:
|
12234618
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Filing Dt:
|
09/20/2008
|
Publication #:
|
|
Pub Dt:
|
03/25/2010
| | | | |
Title:
|
METHOD AND APPARATUS FOR CONFIGURING A UNIFIED CACHE BASED ON AN ASSOCIATED ERROR RATE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2012
|
Application #:
|
12234619
|
Filing Dt:
|
09/20/2008
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Publication #:
|
|
Pub Dt:
|
03/25/2010
| | | | |
Title:
|
METHOD AND APPARATUS FOR MANAGING CACHE RELIABILITY BASED ON AN ASSOCIATED ERROR RATE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2010
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Application #:
|
12234709
|
Filing Dt:
|
09/22/2008
|
Publication #:
|
|
Pub Dt:
|
03/25/2010
| | | | |
Title:
|
METHOD OF FORMING SEMICONDUCTOR PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2012
|
Application #:
|
12237834
|
Filing Dt:
|
09/25/2008
|
Publication #:
|
|
Pub Dt:
|
03/25/2010
| | | | |
Title:
|
EFFECTIVE EFUSE STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/2013
|
Application #:
|
12240509
|
Filing Dt:
|
09/29/2008
|
Publication #:
|
|
Pub Dt:
|
04/01/2010
| | | | |
Title:
|
METHOD OF FORMING A SEMICONDUCTOR PACKAGE INCLUDING TWO DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2010
|
Application #:
|
12240513
|
Filing Dt:
|
09/29/2008
|
Publication #:
|
|
Pub Dt:
|
04/01/2010
| | | | |
Title:
|
METHOD OF FORMING A PACKAGE WITH EXPOSED COMPONENT SURFACES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2011
|
Application #:
|
12241139
|
Filing Dt:
|
09/30/2008
|
Publication #:
|
|
Pub Dt:
|
04/01/2010
| | | | |
Title:
|
METHOD OF FORMING A GATE DIELECTRIC BY IN-SITU PLASMA
|
|
|
Patent #:
|
|
Issue Dt:
|
10/11/2011
|
Application #:
|
12241786
|
Filing Dt:
|
09/30/2008
|
Publication #:
|
|
Pub Dt:
|
04/01/2010
| | | | |
Title:
|
SPLIT-GATE NON-VOLATILE MEMORY CELL AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2011
|
Application #:
|
12242058
|
Filing Dt:
|
09/30/2008
|
Publication #:
|
|
Pub Dt:
|
04/01/2010
| | | | |
Title:
|
METHOD AND APPARATUS FOR TESTING DATA CONVERTER
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2010
|
Application #:
|
12242077
|
Filing Dt:
|
09/30/2008
|
Publication #:
|
|
Pub Dt:
|
04/01/2010
| | | | |
Title:
|
DATA CONVERSION CIRCUITRY FOR CONVERTING ANALOG SIGNALS TO DIGITAL SIGNALS AND VICE-VERSA AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2011
|
Application #:
|
12242078
|
Filing Dt:
|
09/30/2008
|
Publication #:
|
|
Pub Dt:
|
04/01/2010
| | | | |
Title:
|
METHOD FOR TRANSISTOR FABRICATION WITH OPTIMIZED PERFORMANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2011
|
Application #:
|
12242093
|
Filing Dt:
|
09/30/2008
|
Publication #:
|
|
Pub Dt:
|
04/01/2010
| | | | |
Title:
|
DATA CONVERSION CIRCUITRY HAVING SUCCESSIVE APPROXIMATION CIRCUITRY AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2011
|
Application #:
|
12242112
|
Filing Dt:
|
09/30/2008
|
Publication #:
|
|
Pub Dt:
|
04/01/2010
| | | | |
Title:
|
DATA CONVERSION CIRCUITRY WITH AN EXTRA SUCCESSIVE APPROXIMATION STEP AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2011
|
Application #:
|
12242124
|
Filing Dt:
|
09/30/2008
|
Publication #:
|
|
Pub Dt:
|
04/01/2010
| | | | |
Title:
|
SELF-CALIBRATING DATA CONVERSION CIRCUITRY AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2011
|
Application #:
|
12242145
|
Filing Dt:
|
09/30/2008
|
Publication #:
|
|
Pub Dt:
|
04/01/2010
| | | | |
Title:
|
DUAL-LOOP DC-TO-DC CONVERTER APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/2010
|
Application #:
|
12242550
|
Filing Dt:
|
09/30/2008
|
Publication #:
|
|
Pub Dt:
|
04/01/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT MODULE WITH INTEGRATED PASSIVE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2011
|
Application #:
|
12243543
|
Filing Dt:
|
10/01/2008
|
Publication #:
|
|
Pub Dt:
|
01/22/2009
| | | | |
Title:
|
PROCESS OF USING A POLISHING APPARATUS INCLUDING A PLATEN WINDOW AND A POLISHING PAD
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2010
|
Application #:
|
12243639
|
Filing Dt:
|
10/01/2008
|
Publication #:
|
|
Pub Dt:
|
04/01/2010
| | | | |
Title:
|
EFFICIENT BODY CONTACT FIELD EFFECT TRANSISTOR WITH REDUCED BODY RESISTANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/2009
|
Application #:
|
12244214
|
Filing Dt:
|
10/02/2008
|
Publication #:
|
|
Pub Dt:
|
02/05/2009
| | | | |
Title:
|
AMPLIFIER CIRCUIT FOR DOUBLE SAMPLED ARCHITECTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/16/2011
|
Application #:
|
12244413
|
Filing Dt:
|
10/02/2008
|
Publication #:
|
|
Pub Dt:
|
04/09/2009
| | | | |
Title:
|
SEMICONDUCTOR FABRICATION PROCESS INCLUDING SILICIDE STRINGER REMOVAL PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2011
|
Application #:
|
12244470
|
Filing Dt:
|
10/02/2008
|
Publication #:
|
|
Pub Dt:
|
04/08/2010
| | | | |
Title:
|
MATCHED MULTIPLIER CIRCUIT HAVING REDUCED PHASE SHIFT FOR USE IN MEMS SENSING APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2013
|
Application #:
|
12244796
|
Filing Dt:
|
10/03/2008
|
Publication #:
|
|
Pub Dt:
|
04/08/2010
| | | | |
Title:
|
FREQUENCY SYNTHESIS AND SYNCHRONIZATION FOR LED DRIVERS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2011
|
Application #:
|
12248421
|
Filing Dt:
|
10/09/2008
|
Publication #:
|
|
Pub Dt:
|
04/15/2010
| | | | |
Title:
|
ADAPTIVE IIP2 CALIBRATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/2010
|
Application #:
|
12250682
|
Filing Dt:
|
10/14/2008
|
Publication #:
|
|
Pub Dt:
|
04/15/2010
| | | | |
Title:
|
Interrupt controller for accelerated interrupt handling in a data processing system and method thereof
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
12251746
|
Filing Dt:
|
10/15/2008
|
Publication #:
|
|
Pub Dt:
|
02/12/2009
| | | | |
Title:
|
MULTIPLE DEVICE TYPES INCLUDING AN INVERTED-T CHANNEL TRANSISTOR AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2010
|
Application #:
|
12252363
|
Filing Dt:
|
10/16/2008
|
Publication #:
|
|
Pub Dt:
|
04/22/2010
| | | | |
Title:
|
SERIES REGULATOR CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2012
|
Application #:
|
12252441
|
Filing Dt:
|
10/16/2008
|
Publication #:
|
|
Pub Dt:
|
04/22/2010
| | | | |
Title:
|
TECHNIQUES FOR ASYNCHRONOUS DATA RECOVERY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/26/2013
|
Application #:
|
12253635
|
Filing Dt:
|
10/17/2008
|
Publication #:
|
|
Pub Dt:
|
04/22/2010
| | | | |
Title:
|
PEAK-TO-AVERAGE REDUCTION OF SC-FDMA SIGNALS WITH FREQUENCY MASK
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2010
|
Application #:
|
12254294
|
Filing Dt:
|
10/20/2008
|
Publication #:
|
|
Pub Dt:
|
02/12/2009
| | | | |
Title:
|
SPLIT GATE MEMORY CELL AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2012
|
Application #:
|
12254331
|
Filing Dt:
|
10/20/2008
|
Publication #:
|
|
Pub Dt:
|
04/22/2010
| | | | |
Title:
|
METHOD OF MAKING A SPLIT GATE MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
12/15/2015
|
Application #:
|
12259368
|
Filing Dt:
|
10/28/2008
|
Publication #:
|
|
Pub Dt:
|
04/29/2010
| | | | |
Title:
|
DATA PROCESSOR FOR PROCESSING A DECORATED STORAGE NOTIFY
|
|