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Patent #:
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Issue Dt:
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08/08/2017
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Application #:
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14151666
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Filing Dt:
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01/09/2014
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Publication #:
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Pub Dt:
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07/09/2015
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Title:
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COMMAND-DRIVEN NFA HARDWARE ENGINE THAT ENCODES MULTIPLE AUTOMATONS
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Patent #:
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Issue Dt:
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08/08/2017
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Application #:
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14151666
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Filing Dt:
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01/09/2014
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Publication #:
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Pub Dt:
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07/09/2015
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Title:
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COMMAND-DRIVEN NFA HARDWARE ENGINE THAT ENCODES MULTIPLE AUTOMATONS
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Patent #:
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Issue Dt:
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10/11/2016
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Application #:
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14151677
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Filing Dt:
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01/09/2014
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Publication #:
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Pub Dt:
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07/09/2015
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Title:
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TRANSACTIONAL MEMORY HAVING LOCAL CAM AND NFA RESOURCES
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Patent #:
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Issue Dt:
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10/11/2016
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Application #:
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14151677
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Filing Dt:
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01/09/2014
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Publication #:
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Pub Dt:
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07/09/2015
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Title:
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TRANSACTIONAL MEMORY HAVING LOCAL CAM AND NFA RESOURCES
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Patent #:
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Issue Dt:
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08/16/2016
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Application #:
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14151688
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Filing Dt:
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01/09/2014
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Publication #:
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Pub Dt:
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07/09/2015
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Title:
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NFA BYTE DETECTOR
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Patent #:
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Issue Dt:
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08/16/2016
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Application #:
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14151688
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Filing Dt:
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01/09/2014
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Publication #:
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Pub Dt:
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07/09/2015
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Title:
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NFA BYTE DETECTOR
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Patent #:
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Issue Dt:
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07/23/2019
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Application #:
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14151699
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Filing Dt:
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01/09/2014
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Publication #:
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Pub Dt:
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07/09/2015
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Title:
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NFA COMPLETION NOTIFICATION
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Patent #:
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Issue Dt:
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03/29/2016
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Application #:
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14151730
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Filing Dt:
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01/09/2014
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Publication #:
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Pub Dt:
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07/09/2015
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Title:
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DEDICATED EGRESS FAST PATH FOR NON-MATCHING PACKETS IN AN OPENFLOW SWITCH
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Patent #:
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Issue Dt:
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03/29/2016
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Application #:
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14151730
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Filing Dt:
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01/09/2014
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Publication #:
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Pub Dt:
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07/09/2015
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Title:
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DEDICATED EGRESS FAST PATH FOR NON-MATCHING PACKETS IN AN OPENFLOW SWITCH
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Patent #:
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Issue Dt:
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09/05/2017
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Application #:
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14172844
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Filing Dt:
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02/04/2014
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Publication #:
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Pub Dt:
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08/06/2015
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Title:
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NETWORK INTERFACE DEVICE THAT MAPS HOST BUS WRITES OF CONFIGURATION INFORMATION FOR VIRTUAL NIDS INTO A SMALL TRANSACTIONAL MEMORY
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Patent #:
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Issue Dt:
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09/05/2017
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Application #:
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14172844
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Filing Dt:
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02/04/2014
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Publication #:
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Pub Dt:
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08/06/2015
| | | | |
Title:
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NETWORK INTERFACE DEVICE THAT MAPS HOST BUS WRITES OF CONFIGURATION INFORMATION FOR VIRTUAL NIDS INTO A SMALL TRANSACTIONAL MEMORY
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14172851
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Filing Dt:
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02/04/2014
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Publication #:
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Pub Dt:
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08/06/2015
| | | | |
Title:
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NETWORK INTERFACE DEVICE THAT ALERTS A MONITORING PROCESSOR IF CONFIGURATION OF A VIRTUAL NID IS CHANGED
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Patent #:
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Issue Dt:
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01/03/2017
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Application #:
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14172856
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Filing Dt:
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02/04/2014
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Publication #:
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Pub Dt:
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08/06/2015
| | | | |
Title:
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TRANSACTIONAL MEMORY THAT PERFORMS A PROGRAMMABLE ADDRESS TRANSLATION IF A DAT BIT IN A TRANSACTIONAL MEMORY WRITE COMMAND IS SET
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Patent #:
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Issue Dt:
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01/03/2017
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Application #:
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14172856
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Filing Dt:
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02/04/2014
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Publication #:
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Pub Dt:
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08/06/2015
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Title:
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TRANSACTIONAL MEMORY THAT PERFORMS A PROGRAMMABLE ADDRESS TRANSLATION IF A DAT BIT IN A TRANSACTIONAL MEMORY WRITE COMMAND IS SET
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14172862
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Filing Dt:
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02/04/2014
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Publication #:
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Pub Dt:
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08/06/2015
| | | | |
Title:
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TRANSACTIONAL MEMORY THAT IS PROGRAMMABLE TO OUTPUT AN ALERT IF A PREDETERMINED MEMORY WRITE OCCURS
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Patent #:
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Issue Dt:
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02/28/2017
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Application #:
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14184455
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Filing Dt:
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02/19/2014
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Publication #:
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Pub Dt:
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08/20/2015
| | | | |
Title:
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GUARANTEED IN-ORDER PACKET DELIVERY
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Patent #:
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Issue Dt:
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02/28/2017
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Application #:
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14184455
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Filing Dt:
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02/19/2014
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Publication #:
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Pub Dt:
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08/20/2015
| | | | |
Title:
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GUARANTEED IN-ORDER PACKET DELIVERY
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Patent #:
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Issue Dt:
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04/19/2016
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Application #:
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14205824
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Filing Dt:
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03/12/2014
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Publication #:
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Pub Dt:
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09/17/2015
| | | | |
Title:
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INSTANTANEOUS RANDOM EARLY DETECTION PACKET DROPPING
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Patent #:
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Issue Dt:
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04/19/2016
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Application #:
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14205824
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Filing Dt:
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03/12/2014
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Publication #:
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Pub Dt:
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09/17/2015
| | | | |
Title:
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INSTANTANEOUS RANDOM EARLY DETECTION PACKET DROPPING
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Patent #:
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|
Issue Dt:
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07/24/2018
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Application #:
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14231028
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Filing Dt:
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03/31/2014
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Publication #:
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Pub Dt:
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10/01/2015
| | | | |
Title:
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CHAINED-INSTRUCTION DISPATCHER
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Patent #:
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Issue Dt:
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11/08/2016
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Application #:
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14251592
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Filing Dt:
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04/12/2014
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Publication #:
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Pub Dt:
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10/15/2015
| | | | |
Title:
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PICOENGINE MULTI-PROCESSOR WITH TASK ASSIGNMENT
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Patent #:
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Issue Dt:
|
11/08/2016
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Application #:
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14251592
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Filing Dt:
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04/12/2014
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Publication #:
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Pub Dt:
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10/15/2015
| | | | |
Title:
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PICOENGINE MULTI-PROCESSOR WITH TASK ASSIGNMENT
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Patent #:
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|
Issue Dt:
|
11/01/2016
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Application #:
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14251599
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Filing Dt:
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04/12/2014
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Publication #:
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Pub Dt:
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10/15/2015
| | | | |
Title:
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PICOENGINE MULTI-PROCESSOR WITH POWER CONTROL MANAGEMENT
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Patent #:
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|
Issue Dt:
|
11/01/2016
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Application #:
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14251599
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Filing Dt:
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04/12/2014
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Publication #:
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Pub Dt:
|
10/15/2015
| | | | |
Title:
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PICOENGINE MULTI-PROCESSOR WITH POWER CONTROL MANAGEMENT
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|
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Patent #:
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|
Issue Dt:
|
07/02/2019
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Application #:
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14263999
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Filing Dt:
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04/28/2014
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Publication #:
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|
Pub Dt:
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08/21/2014
| | | | |
Title:
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PACKET PREDICTION IN A MULTI-PROTOCOL LABEL SWITCHING NETWORK USING OPENFLOW MESSAGING
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|
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Patent #:
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Issue Dt:
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04/02/2019
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Application #:
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14264003
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Filing Dt:
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04/28/2014
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Publication #:
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Pub Dt:
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08/21/2014
| | | | |
Title:
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PACKET PREDICTION IN A MULTI-PROTOCOL LABEL SWITCHING NETWORK USING OPERATION, ADMINISTRATION, AND MAINTENANCE (OAM) MESSAGING
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Patent #:
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|
Issue Dt:
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07/24/2018
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Application #:
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14267298
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Filing Dt:
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05/01/2014
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Publication #:
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Pub Dt:
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11/05/2015
| | | | |
Title:
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KICK-STARTED RUN-TO-COMPLETION PROCESSOR HAVING NO INSTRUCTION COUNTER
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Patent #:
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|
Issue Dt:
|
07/24/2018
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Application #:
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14267329
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Filing Dt:
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05/01/2014
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Publication #:
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Pub Dt:
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11/05/2015
| | | | |
Title:
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KICK-STARTED RUN-TO-COMPLETION PROCESSING METHOD THAT DOES NOT INVOLVE AN INSTRUCTION COUNTER
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|
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Patent #:
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|
Issue Dt:
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12/01/2020
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Application #:
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14267342
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Filing Dt:
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05/01/2014
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Publication #:
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Pub Dt:
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11/05/2015
| | | | |
Title:
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TABLE FETCH PROCESSOR INSTRUCTION USING TABLE NUMBER TO BASE ADDRESS TRANSLATION
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Patent #:
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|
Issue Dt:
|
11/12/2019
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Application #:
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14267362
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Filing Dt:
|
05/01/2014
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Publication #:
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Pub Dt:
|
11/05/2015
| | | | |
Title:
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POP STACK ABSOLUTE INSTRUCTION
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|
|
Patent #:
|
|
Issue Dt:
|
06/30/2015
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Application #:
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14287012
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Filing Dt:
|
05/24/2014
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Publication #:
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|
Pub Dt:
|
09/11/2014
| | | | |
Title:
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TRANSACTIONAL MEMORY THAT PERFORMS AN ATOMIC METERING COMMAND
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|
|
Patent #:
|
|
Issue Dt:
|
06/30/2015
|
Application #:
|
14287012
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Filing Dt:
|
05/24/2014
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Publication #:
|
|
Pub Dt:
|
09/11/2014
| | | | |
Title:
|
TRANSACTIONAL MEMORY THAT PERFORMS AN ATOMIC METERING COMMAND
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|
|
Patent #:
|
|
Issue Dt:
|
11/08/2016
|
Application #:
|
14311212
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Filing Dt:
|
06/20/2014
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Publication #:
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|
Pub Dt:
|
12/24/2015
| | | | |
Title:
|
PROCESSOR HAVING A TRIPWIRE BUS PORT AND EXECUTING A TRIPWIRE INSTRUCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2016
|
Application #:
|
14311217
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Filing Dt:
|
06/20/2014
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Publication #:
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|
Pub Dt:
|
12/24/2015
| | | | |
Title:
|
MULTI-PROCESSOR SYSTEM HAVING TRIPWIRE DATA MERGING AND COLLISION DETECTION
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|
|
Patent #:
|
|
Issue Dt:
|
11/28/2017
|
Application #:
|
14311222
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Filing Dt:
|
06/20/2014
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Publication #:
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|
Pub Dt:
|
12/24/2015
| | | | |
Title:
|
SKIP INSTRUCTION TO SKIP A NUMBER OF INSTRUCTIONS ON A PREDICATE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/2016
|
Application #:
|
14311225
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Filing Dt:
|
06/20/2014
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Publication #:
|
|
Pub Dt:
|
12/24/2015
| | | | |
Title:
|
EFFICIENT CONDITIONAL INSTRUCTION HAVING COMPANION LOAD PREDICATE BITS INSTRUCTION
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|
|
Patent #:
|
|
Issue Dt:
|
02/16/2016
|
Application #:
|
14321732
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Filing Dt:
|
07/01/2014
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Publication #:
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|
Pub Dt:
|
01/07/2016
| | | | |
Title:
|
MERGING PCP FLOWS AS THEY ARE ASSIGNED TO A SINGLE VIRTUAL CHANNEL
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|
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Patent #:
|
|
Issue Dt:
|
02/23/2016
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Application #:
|
14321744
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Filing Dt:
|
07/01/2014
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Publication #:
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|
Pub Dt:
|
01/07/2016
| | | | |
Title:
|
REORDERING PCP FLOWS AS THEY ARE ASSIGNED TO VIRTUAL CHANNELS
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|
|
Patent #:
|
|
Issue Dt:
|
12/06/2016
|
Application #:
|
14321756
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Filing Dt:
|
07/01/2014
|
Publication #:
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|
Pub Dt:
|
01/07/2016
| | | | |
Title:
|
HIGH-SPEED DEQUEUING OF BUFFER IDS IN FRAME STORING SYSTEM
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|
|
Patent #:
|
|
Issue Dt:
|
02/09/2016
|
Application #:
|
14321762
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Filing Dt:
|
07/01/2014
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Publication #:
|
|
Pub Dt:
|
01/07/2016
| | | | |
Title:
|
INVERSE PCP FLOW REMAPPING FOR PFC PAUSE FRAME GENERATION
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|
|
Patent #:
|
|
Issue Dt:
|
03/14/2017
|
Application #:
|
14326367
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Filing Dt:
|
07/08/2014
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Publication #:
|
|
Pub Dt:
|
01/14/2016
| | | | |
Title:
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MULTI-PROCESSOR WITH EFFICIENT SEARCH KEY PROCESSING
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|
|
Patent #:
|
|
Issue Dt:
|
06/13/2017
|
Application #:
|
14326372
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Filing Dt:
|
07/08/2014
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Publication #:
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|
Pub Dt:
|
01/14/2016
| | | | |
Title:
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EFFICIENT SEARCH KEY CONTROLLER WITH STANDARD BUS INTERFACE, EXTERNAL MEMORY INTERFACE, AND INTERLAKEN LOOKASIDE INTERFACE
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|
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Patent #:
|
|
Issue Dt:
|
03/14/2017
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Application #:
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14326381
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Filing Dt:
|
07/08/2014
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Publication #:
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|
Pub Dt:
|
01/14/2016
| | | | |
Title:
|
ISLAND-BASED NETWORK FLOW PROCESSOR WITH EFFICIENT SEARCH KEY PROCESSING
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|
|
Patent #:
|
|
Issue Dt:
|
04/25/2017
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Application #:
|
14326388
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Filing Dt:
|
07/08/2014
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Publication #:
|
|
Pub Dt:
|
01/14/2016
| | | | |
Title:
|
EFFICIENT SEARCH KEY PROCESSING METHOD
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|
|
Patent #:
|
|
Issue Dt:
|
12/08/2015
|
Application #:
|
14448841
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Filing Dt:
|
07/31/2014
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Title:
|
DDR Retiming Circuit
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|
|
Patent #:
|
|
Issue Dt:
|
09/05/2017
|
Application #:
|
14448906
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Filing Dt:
|
07/31/2014
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Publication #:
|
|
Pub Dt:
|
02/04/2016
| | | | |
Title:
|
PICOENGINE HAVING A HASH GENERATOR WITH REMAINDER INPUT S-BOX NONLINEARIZING
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|
|
Patent #:
|
|
Issue Dt:
|
02/21/2017
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Application #:
|
14448980
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Filing Dt:
|
07/31/2014
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Publication #:
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|
Pub Dt:
|
02/04/2016
| | | | |
Title:
|
GENERATING A HASH USING S-BOX NONLINEARIZING OF A REMAINDER INPUT
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|
|
Patent #:
|
|
Issue Dt:
|
07/04/2017
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Application #:
|
14464690
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Filing Dt:
|
08/20/2014
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Publication #:
|
|
Pub Dt:
|
02/25/2016
| | | | |
Title:
|
PACKET ENGINE THAT USES PPI ADDRESSING
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|
|
Patent #:
|
|
Issue Dt:
|
01/31/2017
|
Application #:
|
14464692
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Filing Dt:
|
08/20/2014
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Publication #:
|
|
Pub Dt:
|
02/25/2016
| | | | |
Title:
|
PPI ALLOCATION REQUEST AND RESPONSE FOR ACCESSING A MEMORY SYSTEM
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|
|
Patent #:
|
|
Issue Dt:
|
08/09/2016
|
Application #:
|
14464697
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Filing Dt:
|
08/20/2014
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Publication #:
|
|
Pub Dt:
|
02/25/2016
| | | | |
Title:
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CPP BUS TRANSACTION VALUE HAVING A PAM/LAM SELECTION CODE FIELD
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|
|
Patent #:
|
|
Issue Dt:
|
01/17/2017
|
Application #:
|
14464700
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Filing Dt:
|
08/20/2014
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Publication #:
|
|
Pub Dt:
|
02/25/2016
| | | | |
Title:
|
PPI DE-ALLOCATE CPP BUS COMMAND
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|
|
Patent #:
|
|
Issue Dt:
|
12/04/2018
|
Application #:
|
14492013
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Filing Dt:
|
09/20/2014
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Publication #:
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|
Pub Dt:
|
03/24/2016
| | | | |
Title:
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ADDRESSLESS MERGE COMMAND WITH DATA ITEM IDENTIFIER
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|
|
Patent #:
|
|
Issue Dt:
|
12/19/2017
|
Application #:
|
14492015
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Filing Dt:
|
09/20/2014
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Publication #:
|
|
Pub Dt:
|
03/24/2016
| | | | |
Title:
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CHAINED CPP COMMAND
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|
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Patent #:
|
|
Issue Dt:
|
11/01/2016
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Application #:
|
14507602
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Filing Dt:
|
10/06/2014
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Publication #:
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Pub Dt:
|
04/07/2016
| | | | |
Title:
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INSTANTANEOUS RANDOM EARLY DETECTION PACKET DROPPING WITH DROP PRECEDENCE
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|
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Patent #:
|
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Issue Dt:
|
03/07/2017
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Application #:
|
14507621
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Filing Dt:
|
10/06/2014
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Publication #:
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|
Pub Dt:
|
04/07/2016
| | | | |
Title:
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GLOBAL RANDOM EARLY DETECTION PACKET DROPPING BASED ON AVAILABLE MEMORY
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|
|
Patent #:
|
|
Issue Dt:
|
05/02/2017
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Application #:
|
14507643
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Filing Dt:
|
10/06/2014
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Publication #:
|
|
Pub Dt:
|
04/07/2016
| | | | |
Title:
|
PACKET STORAGE DISTRIBUTION BASED ON AVAILABLE MEMORY
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|
|
Patent #:
|
|
Issue Dt:
|
07/11/2017
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Application #:
|
14507652
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Filing Dt:
|
10/06/2014
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Publication #:
|
|
Pub Dt:
|
04/07/2016
| | | | |
Title:
|
SIMULTANEOUS QUEUE RANDOM EARLY DETECTION DROPPING AND GLOBAL RANDOM EARLY DETECTION DROPPING SYSTEM
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|
|
Patent #:
|
|
Issue Dt:
|
09/05/2017
|
Application #:
|
14521435
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Filing Dt:
|
10/22/2014
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Title:
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MINIPACKET FLOW CONTROL
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|
|
Patent #:
|
|
Issue Dt:
|
04/10/2018
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Application #:
|
14527550
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Filing Dt:
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10/29/2014
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Title:
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REGISTERED FIFO
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Patent #:
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Issue Dt:
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06/05/2018
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Application #:
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14527642
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Filing Dt:
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10/29/2014
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Title:
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SPLIT PACKET TRANSMISSION DMA ENGINE
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Patent #:
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Issue Dt:
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10/31/2017
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Application #:
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14530599
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Filing Dt:
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10/31/2014
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Publication #:
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Pub Dt:
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05/05/2016
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Title:
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In-Flight Packet Processing
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Patent #:
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Issue Dt:
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08/08/2017
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Application #:
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14530758
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Filing Dt:
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11/02/2014
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Title:
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IDENTICAL PACKET MULTICAST PACKET READY COMMAND
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Patent #:
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Issue Dt:
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03/07/2017
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Application #:
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14530759
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Filing Dt:
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11/02/2014
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Title:
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UNIQUE PACKET MULTICAST PACKET READY COMMAND
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Patent #:
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Issue Dt:
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08/08/2017
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Application #:
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14530760
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Filing Dt:
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11/02/2014
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Title:
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UNICAST PACKET READY COMMAND
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Patent #:
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Issue Dt:
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07/02/2019
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Application #:
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14530761
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Filing Dt:
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11/02/2014
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Title:
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UPDATE PACKET SEQUENCE NUMBER PACKET READY COMMAND
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Patent #:
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Issue Dt:
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02/06/2018
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Application #:
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14530762
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Filing Dt:
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11/02/2014
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Title:
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Intelligent Packet Data Register File That Stalls Picoengine And Retrieves Data From A Larger Buffer
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Patent #:
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Issue Dt:
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08/16/2016
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Application #:
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14530763
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Filing Dt:
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11/02/2014
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Title:
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Intelligent Packet Data Register File That Prefetches Data For Future Instruction Execution
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Patent #:
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Issue Dt:
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12/13/2016
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Application #:
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14530764
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Filing Dt:
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11/02/2014
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Title:
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Picoengine Instruction That Controls An Intelligent Packet Data Register File Prefetch Function
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Patent #:
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Issue Dt:
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04/04/2017
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Application #:
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14530765
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Filing Dt:
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11/02/2014
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Title:
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SLICE-BASED INTELLIGENT PACKET DATA REGISTER FILE
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Patent #:
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Issue Dt:
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07/05/2016
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Application #:
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14537514
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Filing Dt:
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11/10/2014
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Title:
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FLOW KEY LOOKUP INVOLVING MULTIPLE SIMULTANEOUS CAM OPERATIONS TO IDENTIFY HASH VALUES IN A HASH BUCKET
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Patent #:
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Issue Dt:
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05/03/2016
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Application #:
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14551057
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Filing Dt:
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11/23/2014
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Title:
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COMPARTMENTALIZATION OF THE USER NETWORK INTERFACE TO A DEVICE
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Patent #:
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Issue Dt:
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02/20/2018
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Application #:
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14556135
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Filing Dt:
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11/29/2014
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Title:
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RECURSIVE LOOKUP WITH A HARDWARE TRIE STRUCTURE THAT HAS NO SEQUENTIAL LOGIC ELEMENTS
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Patent #:
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Issue Dt:
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05/03/2016
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Application #:
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14556147
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Filing Dt:
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11/29/2014
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Title:
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STAGGERED ISLAND STRUCTURE IN AN ISLAND-BASED NETWORK FLOW PROCESSOR
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Patent #:
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Issue Dt:
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07/24/2018
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Application #:
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14579458
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Filing Dt:
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12/22/2014
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Title:
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ORDERING SYSTEM THAT EMPLOYS CHAINED TICKET RELEASE BITMAP BLOCK FUNCTIONS
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Patent #:
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Issue Dt:
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08/07/2018
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Application #:
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14587513
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Filing Dt:
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12/31/2014
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Title:
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System and Method for Processing and Forwarding Transmitted Information
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Patent #:
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Issue Dt:
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07/26/2016
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Application #:
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14588084
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Filing Dt:
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12/31/2014
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Title:
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Flow Control Using A Local Event Ring In An Island-Based Network Flow Processor
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Patent #:
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Issue Dt:
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07/12/2016
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Application #:
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14588280
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Filing Dt:
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12/31/2014
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Title:
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TRANSACTIONAL MEMORY THAT PERFORMS A TCAM 32-BIT LOOKUP OPERATION
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Patent #:
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Issue Dt:
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04/12/2016
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Application #:
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14588342
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Filing Dt:
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12/31/2014
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Title:
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TRANSACTIONAL MEMORY THAT PERFORMS A PMM 32-BIT LOOKUP OPERATION
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Patent #:
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Issue Dt:
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07/11/2017
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Application #:
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14590920
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Filing Dt:
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01/06/2015
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Publication #:
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Pub Dt:
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02/25/2016
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Title:
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RETURN AVAILABLE PPI CREDITS COMMAND
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Patent #:
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Issue Dt:
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05/30/2017
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Application #:
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14591003
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Filing Dt:
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01/07/2015
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Publication #:
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Pub Dt:
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02/25/2016
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Title:
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USING A CREDITS AVAILABLE VALUE IN DETERMINING WHETHER TO ISSUE A PPI ALLOCATION REQUEST TO A PACKET ENGINE
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Patent #:
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Issue Dt:
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01/03/2017
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Application #:
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14611224
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Filing Dt:
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01/31/2015
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Title:
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Distributed Packet Ordering System Having Separate Worker And Output Processors
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Patent #:
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Issue Dt:
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05/02/2017
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Application #:
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14611231
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Filing Dt:
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01/31/2015
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Title:
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PACKET ORDERING SYSTEM USING AN ATOMIC TICKET RELEASE COMMAND OF A TRANSACTIONAL MEMORY
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Patent #:
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Issue Dt:
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05/24/2016
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Application #:
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14631748
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Filing Dt:
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02/25/2015
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Publication #:
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Pub Dt:
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06/18/2015
| | | | |
Title:
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TRANSACTIONAL MEMORY THAT PERFORMS AN ALUT 32-BIT LOOKUP OPERATION
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Patent #:
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Issue Dt:
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04/05/2016
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Application #:
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14631784
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Filing Dt:
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02/25/2015
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Publication #:
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Pub Dt:
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10/29/2015
| | | | |
Title:
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EFFICIENT COMPLEX NETWORK TRAFFIC MANAGEMENT IN A NON-UNIFORM MEMORY SYSTEM
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Patent #:
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Issue Dt:
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03/08/2016
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Application #:
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14631804
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Filing Dt:
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02/25/2015
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Title:
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TRANSACTIONAL MEMORY THAT SUPPORTS A PUT WITH LOW PRIORITY RING COMMAND
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Patent #:
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Issue Dt:
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06/26/2018
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Application #:
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14634844
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Filing Dt:
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03/01/2015
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Title:
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MODULAR AND PARTITIONED SDN SWITCH
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Patent #:
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Issue Dt:
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06/12/2018
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Application #:
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14634845
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Filing Dt:
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03/01/2015
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Title:
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METHOD OF HANDLING SDN PROTOCOL MESSAGES IN A MODULAR AND PARTITIONED SDN SWITCH
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Patent #:
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Issue Dt:
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07/04/2017
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Application #:
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14634847
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Filing Dt:
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03/01/2015
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Title:
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FORWARDING MESSAGES WITHIN A SWITCH FABRIC OF AN SDN SWITCH
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Patent #:
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Issue Dt:
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08/08/2017
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Application #:
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14634848
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Filing Dt:
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03/01/2015
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Title:
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METHOD OF DETECTING LARGE FLOWS WITHIN A SWITCH FABRIC OF AN SDN SWITCH
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Patent #:
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Issue Dt:
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10/11/2016
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Application #:
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14634849
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Filing Dt:
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03/01/2015
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Title:
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METHOD OF GENERATING SUBFLOW ENTRIES IN AN SDN SWITCH
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Patent #:
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Issue Dt:
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11/22/2016
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Application #:
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14634851
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Filing Dt:
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03/01/2015
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Title:
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SDN PROTOCOL MESSAGE HANDLING WITHIN A MODULAR AND PARTITIONED SDN SWITCH
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Patent #:
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Issue Dt:
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06/13/2017
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Application #:
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14671951
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Filing Dt:
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03/27/2015
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Title:
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SOFTWARE UPDATE METHODOLOGY
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Patent #:
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Issue Dt:
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02/20/2018
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Application #:
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14690362
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Filing Dt:
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04/17/2015
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Title:
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INTER-PACKET INTERVAL PREDICTION LEARNING ALGORITHM
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Patent #:
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Issue Dt:
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05/15/2018
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Application #:
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14724820
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Filing Dt:
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05/29/2015
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Title:
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DISTRIBUTED CREDIT FIFO LINK OF A CONFIGURABLE MESH DATA BUS
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Patent #:
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Issue Dt:
|
05/15/2018
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Application #:
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14724820
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Filing Dt:
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05/29/2015
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Title:
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DISTRIBUTED CREDIT FIFO LINK OF A CONFIGURABLE MESH DATA BUS
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Patent #:
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Issue Dt:
|
11/03/2015
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Application #:
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14724824
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Filing Dt:
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05/29/2015
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Title:
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RECURSIVE USE OF MULTIPLE HARDWARE LOOKUP STRUCTURES IN A TRANSACTIONAL MEMORY
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|
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Patent #:
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Issue Dt:
|
03/29/2016
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Application #:
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14724826
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Filing Dt:
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05/29/2015
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Title:
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TRANSACTIONAL MEMORY THAT PERFORMS AN ATOMIC METERING COMMAND
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|
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Patent #:
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Issue Dt:
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06/13/2017
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Application #:
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14724827
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Filing Dt:
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05/29/2015
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Title:
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TRANSACTIONAL MEMORY THAT SUPPORTS PUT AND GET RING COMMANDS
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|
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Patent #:
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Issue Dt:
|
03/06/2018
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Application #:
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14726421
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Filing Dt:
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05/29/2015
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Title:
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Flow Switch IC that Uses Flow IDs and an Exact-match Flow Table
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|
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Patent #:
|
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Issue Dt:
|
09/05/2017
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Application #:
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14726423
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Filing Dt:
|
05/29/2015
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Title:
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Making A Flow ID For An Exact-match Flow Table Using A Byte-Wide Multiplexer Circuit
|
|