Total properties:
54
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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11163116
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Filing Dt:
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10/05/2005
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Publication #:
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Pub Dt:
|
04/05/2007
| | | | |
Title:
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ULTRA-THIN WAFER SYSTEM AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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01/14/2014
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Application #:
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11339176
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Filing Dt:
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01/23/2006
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Publication #:
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Pub Dt:
|
07/26/2007
| | | | |
Title:
|
PADLESS DIE SUPPORT INTEGRATED CIRCUIT PACKAGE SYSTEM
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Patent #:
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Issue Dt:
|
11/12/2013
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Application #:
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11456554
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Filing Dt:
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07/10/2006
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Publication #:
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Pub Dt:
|
01/10/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ULTRA-THIN DIE
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Patent #:
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Issue Dt:
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01/21/2014
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Application #:
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11465769
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Filing Dt:
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08/18/2006
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Publication #:
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Pub Dt:
|
03/20/2008
| | | | |
Title:
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WORKPIECE DISPLACEMENT SYSTEM
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Patent #:
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Issue Dt:
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02/04/2014
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Application #:
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11536502
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Filing Dt:
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09/28/2006
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Publication #:
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Pub Dt:
|
04/03/2008
| | | | |
Title:
|
DUAL-DIE PACKAGE STRUCTURE HAVING DIES EXTERNALLY AND SIMULTANEOUSLY CONNECTED VIA BUMP ELECTRODES AND BOND WIRES
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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11673558
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Filing Dt:
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02/09/2007
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Publication #:
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Pub Dt:
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08/14/2008
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH BUMP OVER VIA
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Patent #:
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Issue Dt:
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12/17/2013
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Application #:
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11687357
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Filing Dt:
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03/16/2007
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Publication #:
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Pub Dt:
|
09/18/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING MULTI-PACKAGE MODULE TECHNIQUES
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Patent #:
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Issue Dt:
|
01/28/2014
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Application #:
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11773886
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Filing Dt:
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07/05/2007
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Publication #:
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Pub Dt:
|
01/08/2009
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FLEX BUMP
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Patent #:
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Issue Dt:
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12/31/2013
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Application #:
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12022296
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Filing Dt:
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01/30/2008
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Publication #:
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Pub Dt:
|
07/30/2009
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WAFER SCALE HEAT SLUG
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Patent #:
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Issue Dt:
|
12/10/2013
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Application #:
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12051246
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Filing Dt:
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03/19/2008
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Publication #:
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Pub Dt:
|
09/24/2009
| | | | |
Title:
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FLIP CHIP INTERCONNECTION SYSTEM HAVING SOLDER POSITION CONTROL MECHANISM
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Patent #:
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Issue Dt:
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01/07/2014
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Application #:
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12055665
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Filing Dt:
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03/26/2008
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Publication #:
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Pub Dt:
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10/01/2009
| | | | |
Title:
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MOCK BUMP SYSTEM FOR FLIP CHIP INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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01/21/2014
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Application #:
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12184219
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Filing Dt:
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07/31/2008
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Publication #:
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Pub Dt:
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10/01/2009
| | | | |
Title:
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MOCK BUMP SYSTEM FOR FLIP CHIP INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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01/07/2014
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Application #:
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12408670
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Filing Dt:
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03/20/2009
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Publication #:
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Pub Dt:
|
09/23/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH AN INTERPOSER AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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11/19/2013
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Application #:
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12534029
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Filing Dt:
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07/31/2009
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Publication #:
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|
Pub Dt:
|
02/03/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH THROUGH SILICON VIA BASE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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12580933
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Filing Dt:
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10/16/2009
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Publication #:
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|
Pub Dt:
|
04/21/2011
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
12/31/2013
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Application #:
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12612603
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Filing Dt:
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11/04/2009
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Publication #:
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Pub Dt:
|
02/25/2010
| | | | |
Title:
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STACKED INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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01/07/2014
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Application #:
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12714431
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Filing Dt:
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02/26/2010
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Publication #:
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Pub Dt:
|
09/01/2011
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATED CONNECTOR AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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01/21/2014
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Application #:
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12723596
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Filing Dt:
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03/12/2010
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Publication #:
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Pub Dt:
|
07/08/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
11/26/2013
|
Application #:
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12775338
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Filing Dt:
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05/06/2010
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Publication #:
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Pub Dt:
|
08/26/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THROUGH VIAS WITH REFLOWED CONDUCTIVE MATERIAL
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Patent #:
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Issue Dt:
|
12/10/2013
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Application #:
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12777415
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Filing Dt:
|
05/11/2010
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Publication #:
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|
Pub Dt:
|
11/18/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH REINFORCED ENCAPSULANT HAVING EMBEDDED INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
11/12/2013
|
Application #:
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12818750
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Filing Dt:
|
06/18/2010
|
Publication #:
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|
Pub Dt:
|
12/22/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADFRAME AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
01/21/2014
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Application #:
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12823079
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Filing Dt:
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06/24/2010
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Publication #:
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|
Pub Dt:
|
10/21/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTEGRAL INNER LEAD AND PADDLE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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02/04/2014
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Application #:
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12837562
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Filing Dt:
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07/16/2010
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Publication #:
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Pub Dt:
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01/19/2012
| | | | |
Title:
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Semiconductor Device and Method of Forming Protective Layer Over Exposed Surfaces of Semiconductor Die
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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12858593
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Filing Dt:
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08/18/2010
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Publication #:
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Pub Dt:
|
12/09/2010
| | | | |
Title:
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Semiconductor Device and Method of Forming Through Hole Vias in Die Extension Region Around Periphery of Die
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Patent #:
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Issue Dt:
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02/04/2014
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Application #:
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12891232
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Filing Dt:
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09/27/2010
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Publication #:
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Pub Dt:
|
03/29/2012
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PROTECTIVE STRUCTURE AROUND SEMICONDUCTOR DIE FOR LOCALIZED PLANARIZATION OF INSULATING LAYER
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Patent #:
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Issue Dt:
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02/04/2014
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Application #:
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13031546
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Filing Dt:
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02/21/2011
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Publication #:
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Pub Dt:
|
08/23/2012
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING MULTI-LAYERED UBM WITH INTERMEDIATE INSULATING BUFFER LAYER TO REDUCE STRESS FOR SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
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01/07/2014
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Application #:
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13034133
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Filing Dt:
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02/24/2011
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Publication #:
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Pub Dt:
|
08/30/2012
| | | | |
Title:
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Semiconductor Device and Method of Forming Conductive THV and RDL on Opposite Sides of Semiconductor Die for RDL-to-RDL Bonding
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Patent #:
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Issue Dt:
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01/21/2014
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Application #:
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13052590
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Filing Dt:
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03/21/2011
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Publication #:
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Pub Dt:
|
09/27/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STEP MOLD AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/17/2013
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Application #:
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13053142
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Filing Dt:
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03/21/2011
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Publication #:
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Pub Dt:
|
09/27/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/10/2013
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Application #:
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13071433
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Filing Dt:
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03/24/2011
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Publication #:
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Pub Dt:
|
09/27/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LOCKING INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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01/21/2014
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Application #:
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13105814
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Filing Dt:
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05/11/2011
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Publication #:
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Pub Dt:
|
11/15/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/31/2013
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Application #:
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13118214
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Filing Dt:
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05/27/2011
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Publication #:
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Pub Dt:
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11/29/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERLOCK AND METHOD OF MANUFACTURE THEREOF
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11/19/2013
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13154308
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Filing Dt:
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06/06/2011
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Publication #:
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Pub Dt:
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09/29/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PROTRUDING PAD PACKAGE SYSTEM AND METHOD FOR MANUFACTURING THEREOF
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Issue Dt:
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01/21/2014
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Application #:
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13163643
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Filing Dt:
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06/17/2011
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Publication #:
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Pub Dt:
|
12/20/2012
| | | | |
Title:
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METHOD OF MANUFACTURING INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUPPORT STRUCTURE
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Patent #:
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Issue Dt:
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02/04/2014
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Application #:
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13164114
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Filing Dt:
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06/20/2011
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Publication #:
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Pub Dt:
|
12/20/2012
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUPPORT STRUCTURE AND METHOD OF MANUFACTURE THEREOF
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Issue Dt:
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11/19/2013
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Application #:
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13167487
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Filing Dt:
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06/23/2011
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Publication #:
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Pub Dt:
|
12/27/2012
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE OVER SEED LAYER ON CONTACT PAD OF SEMICONDUCTOR DIE WITHOUT UNDERCUTTING SEED LAYER BENEATH INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
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01/21/2014
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Application #:
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13196279
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Filing Dt:
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08/02/2011
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Publication #:
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Pub Dt:
|
11/24/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LAMINATE BASE
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Patent #:
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Issue Dt:
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12/10/2013
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13235202
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Filing Dt:
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09/16/2011
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Publication #:
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Pub Dt:
|
03/21/2013
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL SIDE MOLD AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/24/2013
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13239373
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Filing Dt:
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09/21/2011
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Publication #:
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Pub Dt:
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03/21/2013
| | | | |
Title:
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INTEGRATED CIRCUIT SYSTEM WITH TEST PADS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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01/07/2014
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Application #:
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13311266
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Filing Dt:
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12/05/2011
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Publication #:
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Pub Dt:
|
06/28/2012
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTEGRATED PASSIVE DEVICE OVER SEMICONDUCTOR DIE WITH CONDUCTIVE BRIDGE AND FAN-OUT REDISTRIBUTION LAYER
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Patent #:
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Issue Dt:
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12/17/2013
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Application #:
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13315010
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Filing Dt:
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12/08/2011
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Publication #:
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Pub Dt:
|
06/13/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING THICK ENCAPSULANT FOR STIFFNESS WITH RECESSES FOR STRESS RELIEF IN FO-WLCSP
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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13326128
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Filing Dt:
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12/14/2011
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Publication #:
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Pub Dt:
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06/20/2013
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICAL INTERCONNECT STRUCTURE WITH CONDUCTIVE MICRO VIA ARRAY FOR 3-D FO-WLCSP
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01/14/2014
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13326728
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12/15/2011
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Pub Dt:
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06/20/2013
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONTACTS AND METHOD OF MANUFACTURE THEREOF
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01/07/2014
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13326891
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Filing Dt:
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12/15/2011
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Publication #:
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Pub Dt:
|
06/20/2013
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND METHOD OF MANUFACTURE THEREOF
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12/03/2013
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13360549
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Filing Dt:
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01/27/2012
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Publication #:
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Pub Dt:
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05/17/2012
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Title:
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SEMICONDUCTOR DEVICE HAVING CONDUCTIVE VIAS IN PERIPHERAL REGION CONNECTING SHIELDING LAYER TO GROUND
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02/04/2014
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13417034
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Filing Dt:
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03/09/2012
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Pub Dt:
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09/12/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING NON-LINEAR INTERCONNECT LAYER WITH EXTENDED LENGTH FOR JOINT RELIABILITY
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11/19/2013
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13419242
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03/13/2012
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Publication #:
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Pub Dt:
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07/05/2012
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Title:
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OPTICAL SEMICONDUCTOR DEVICE HAVING PRE-MOLDED LEADFRAME WITH WINDOW AND METHOD THEREFOR
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01/21/2014
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13426442
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03/21/2012
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Pub Dt:
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11/08/2012
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD OF MANUFACTURE THEREOF
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11/12/2013
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13492765
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06/08/2012
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Pub Dt:
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09/27/2012
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Title:
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LEADFRAME-BASED MOLD ARRAY PACKAGE HEAT SPREADER AND FABRICATION METHOD THEREFOR
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01/07/2014
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13542120
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07/05/2012
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Publication #:
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Pub Dt:
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01/09/2014
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH GRID-ARRAY MECHANISM AND METHOD OF MANUFACTURE THEREOF
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11/26/2013
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13559430
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07/26/2012
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Publication #:
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Pub Dt:
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11/15/2012
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Title:
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Semiconductor Device and Method of Dual-Molding Die Formed on Opposite Sides of Build-Up Interconnect Structure
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Patent #:
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Issue Dt:
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11/26/2013
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13615308
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Filing Dt:
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09/13/2012
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Publication #:
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Pub Dt:
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01/17/2013
| | | | |
Title:
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Semiconductor Device and Method for Forming Passive Circuit Elements With Through Silicon Vias to Backside Interconnect Structures
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Patent #:
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Issue Dt:
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12/03/2013
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Application #:
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13679615
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Filing Dt:
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11/16/2012
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Publication #:
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Pub Dt:
|
03/28/2013
| | | | |
Title:
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PACKAGE-ON-PACKAGE SYSTEM WITH THROUGH VIAS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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13756905
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Filing Dt:
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02/01/2013
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Title:
|
SOLDER JOINT FLIP CHIP INTERCONNECTION
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