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02/19/2004
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03/18/2004
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03/18/2004
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10/28/2004
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02/17/2005
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Title:
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METHOD OF MANUFACTURING AN ARRAY OF BI-DIRECTIONAL NONVOLATILE MEMORY CELLS
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Patent #:
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Issue Dt:
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08/17/2004
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Application #:
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10641490
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Filing Dt:
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08/14/2003
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Title:
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METHOD OF MAKING SUB-LITHOGRAPHIC SIZED CONTACT HOLES
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Patent #:
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Issue Dt:
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06/29/2004
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Application #:
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10641609
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Filing Dt:
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08/15/2003
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Title:
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INTEGRATED CIRCUIT WITH A REPROGRAMMABLE NONVOLATILE SWITCH FOR SELECTIVELY CONNECTING A SOURCE FOR A SIGNAL TO A CIRCUIT
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Patent #:
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Issue Dt:
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10/26/2004
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Application #:
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10641610
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Filing Dt:
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08/15/2003
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Title:
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INTEGRATED CIRCUIT WITH A REPROGRAMMABLE NONVOLATILE SWITCH HAVING A DYNAMIC THRESHOLD VOLTAGE (VTH) FOR SELECTIVELY CONNECTING A SOURCE FOR A SIGNAL TO A CIRCUIT
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Patent #:
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Issue Dt:
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12/21/2004
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Application #:
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10641803
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Filing Dt:
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08/15/2003
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Title:
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INTEGRATED CIRCUIT WITH A THREE TRANSISTOR REPROGRAMMABLE NONVOLATILE SWITCH FOR SELECTIVELY CONNECTING A SOURCE FOR A SIGNAL TO A CIRCUIT
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Patent #:
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Issue Dt:
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03/22/2005
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Application #:
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10642077
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Filing Dt:
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08/14/2003
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Publication #:
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Pub Dt:
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02/17/2005
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Title:
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MULTI-BIT ROM CELL WITH BI-DIRECTIONAL READ AND A METHOD FOR MAKING THEREOF
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Patent #:
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Issue Dt:
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03/14/2006
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Application #:
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10642078
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Filing Dt:
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08/14/2003
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Publication #:
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Pub Dt:
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02/17/2005
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Title:
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ARRAY OF MULTI-BIT ROM CELLS WITH EACH CELL HAVING BI-DIRECTIONAL READ AND A METHOD FOR MAKING THE ARRAY
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Patent #:
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Issue Dt:
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08/09/2005
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Application #:
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10642079
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Filing Dt:
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08/14/2003
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Publication #:
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Pub Dt:
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02/17/2005
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Title:
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A MULTI-BIT ROM CELL, FOR STORING ONE OF N>4 POSSIBLE STATES AND HAVING BI-DIRECTIONAL READ, AN ARRAY OF SUCH CELLS.
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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10642420
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Filing Dt:
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08/15/2003
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Title:
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DIGITAL DECIMATION FILTER
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Patent #:
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Issue Dt:
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07/24/2007
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Application #:
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10643249
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Filing Dt:
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08/18/2003
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Publication #:
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Pub Dt:
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03/17/2005
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Title:
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MEMORY DEVICE OPERABLE WITH A PLURALITY OF PROTOCOLS WITH CONFIGURATION DATA STORED IN NON-VOLATILE STORAGE ELEMENTS
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Patent #:
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Issue Dt:
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10/05/2004
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Application #:
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10650546
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Filing Dt:
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08/28/2003
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Title:
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IMPLANTABLE CARDIAC DEFIBRILLATION WITH CONTROL CIRCUIT FOR CONTROLLING A HIGH VOLTAGE CIRCUIT USING A LOW VOLTAGE CIRCUIT
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Patent #:
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Issue Dt:
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06/14/2005
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Application #:
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10653015
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Filing Dt:
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08/28/2003
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Publication #:
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Pub Dt:
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03/03/2005
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Title:
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SELF-ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED FLOATING GATE, AND A MEMORY ARRAY MADE THEREBY
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Patent #:
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Issue Dt:
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05/09/2006
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Application #:
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10653322
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Filing Dt:
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09/02/2003
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Publication #:
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Pub Dt:
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03/03/2005
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Title:
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FSK MODULATOR USING IQ UP-MIXERS AND SINEWAVE CODED DACS
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Patent #:
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Issue Dt:
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05/31/2005
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Application #:
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10653614
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Filing Dt:
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09/02/2003
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Publication #:
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Pub Dt:
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03/03/2005
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Title:
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ALL DIGITAL PLL TRIMMING CIRCUIT
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Patent #:
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Issue Dt:
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10/27/2009
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Application #:
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10655265
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Filing Dt:
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09/04/2003
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Publication #:
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Pub Dt:
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03/10/2005
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Title:
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CIRCUIT, SYSTEM, AND METHOD FOR PREVENTING A COMMUNICATION SYSTEM ABSENT A DEDICATED CLOCKING MASTER FROM PRODUCING A CLOCKING FREQUENCY OUTSIDE AN ACCEPTABLE RANGE
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Patent #:
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Issue Dt:
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06/14/2005
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Application #:
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10656071
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Filing Dt:
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09/04/2003
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Publication #:
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Pub Dt:
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03/10/2005
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Title:
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METHOD OF MAKING NONVOLATILE TRANSISTOR PAIRS WITH SHARED CONTROL GATE
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Patent #:
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Issue Dt:
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11/09/2004
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Application #:
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10656486
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Filing Dt:
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09/04/2003
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Title:
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PHASE CHANGE MEMORY DEVICE EMPLOYING THERMALLY INSULATING VOIDS, AND A METHOD OF MAKING SAME
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Patent #:
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Issue Dt:
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08/09/2005
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Application #:
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10656668
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Filing Dt:
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09/04/2003
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Publication #:
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Pub Dt:
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03/10/2005
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Title:
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MEMORY DEVICE WITH DISCRETE LAYERS OF PHASE CHANGE MEMORY MATERIAL
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Patent #:
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Issue Dt:
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03/28/2006
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Application #:
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10659226
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Filing Dt:
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09/09/2003
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Publication #:
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Pub Dt:
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03/10/2005
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Title:
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UNIFIED MULTILEVEL CELL MEMORY
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Patent #:
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Issue Dt:
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03/01/2005
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Application #:
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10665806
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Filing Dt:
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09/19/2003
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Publication #:
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Pub Dt:
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07/08/2004
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Title:
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THICK GATE OXIDE TRANSISTOR AND ELECTROSTATIC DISCHARGE PROTECTION UTILIZING THICK GATE OXIDE TRANSISTORS
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Patent #:
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Issue Dt:
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06/06/2006
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Application #:
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10667535
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Filing Dt:
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09/22/2003
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Publication #:
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Pub Dt:
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04/14/2005
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Title:
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AMPLIFIER WITH ACCURATE BUILT-IN THRESHOLD
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Patent #:
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Issue Dt:
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08/15/2006
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Application #:
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10668062
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Filing Dt:
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09/22/2003
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Publication #:
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Pub Dt:
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10/27/2005
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Title:
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METHOD AND APPARATUS TO ACHIEVE ACCURATE FAN TACHOMETER WITH PROGRAMMABLE LOOK-UP TABLE
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Patent #:
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Issue Dt:
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08/28/2007
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Application #:
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10669040
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Filing Dt:
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09/22/2003
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Publication #:
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Pub Dt:
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06/10/2004
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Title:
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SOURCE SYNCHRONOUS CDMA BUS INTERFACE
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Patent #:
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Issue Dt:
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05/02/2006
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Application #:
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10669081
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Filing Dt:
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09/23/2003
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Publication #:
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Pub Dt:
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07/08/2004
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Title:
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FRONT SIDE ILLUMINATED PHOTODIODE WITH BACKSIDE BUMP
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Patent #:
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Issue Dt:
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02/27/2007
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Application #:
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10669762
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Filing Dt:
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09/24/2003
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Publication #:
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Pub Dt:
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05/13/2004
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Title:
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INTEGRATED DEVICE TECHNOLOGY USING A BURIED POWER BUSS FOR MAJOR DEVICE AND CIRCUIT ADVANTAGES
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Patent #:
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Issue Dt:
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08/28/2007
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Application #:
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10670619
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Filing Dt:
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09/25/2003
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Publication #:
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Pub Dt:
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03/31/2005
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Title:
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Q-QUENCHING SUPER-REGENERATIVE RECEIVER
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Patent #:
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Issue Dt:
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07/12/2005
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Application #:
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10671200
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Filing Dt:
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09/25/2003
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Publication #:
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Pub Dt:
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12/30/2004
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Title:
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LOW VOLTAGE CIRCUIT FOR INTERFACING WITH HIGH VOLTAGE ANALOG SIGNALS
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Patent #:
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Issue Dt:
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02/21/2006
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Application #:
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10677123
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Filing Dt:
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09/30/2003
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Publication #:
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Pub Dt:
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07/15/2004
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Title:
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METHOD AND APPARATUS FOR IMPROVED HIGH-SPEED ADAPTIVE EQUALIZATION
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Patent #:
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Issue Dt:
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01/31/2006
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Application #:
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10677449
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Filing Dt:
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10/02/2003
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Publication #:
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Pub Dt:
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04/07/2005
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Title:
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SWITCHED-CAPACITOR SAMPLE/HOLD HAVING REDUCED AMPLIFIER SLEW-RATE AND SETTLING TIME REQUIREMENTS
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Patent #:
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Issue Dt:
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01/11/2005
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Application #:
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10677452
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Filing Dt:
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10/02/2003
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Title:
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DIMMABLE ELECTROLUMANESCENT LAMP DRIVERS AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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08/02/2005
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Application #:
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10683621
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Filing Dt:
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10/10/2003
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Publication #:
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Pub Dt:
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04/14/2005
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Title:
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INTEGRATED RELAXATION OSCILLATOR WITH IMPROVED SENSITIVITY TO COMPONENT VARIATION DUE TO PROCESS-SHIFT
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Patent #:
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Issue Dt:
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11/08/2005
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Application #:
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10683845
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Filing Dt:
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10/10/2003
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Title:
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SELF-STARTING REFERENCE CIRCUIT
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Patent #:
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Issue Dt:
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08/23/2005
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Application #:
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10685629
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Filing Dt:
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10/15/2003
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Title:
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METHOD FOR INTEGRATING NON-VOLATILE MEMORY WITH HIGH-VOLTAGE AND LOW-VOLTAGE LOGIC IN A SALICIDE PROCESS
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Patent #:
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Issue Dt:
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08/16/2005
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Application #:
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10685752
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Filing Dt:
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10/14/2003
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Publication #:
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Pub Dt:
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04/14/2005
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Title:
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SUSPEND-RESUME PROGRAMMING METHOD FOR FLASH MEMORY
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Patent #:
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Issue Dt:
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09/06/2005
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Application #:
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10685957
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Filing Dt:
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10/14/2003
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Publication #:
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Pub Dt:
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04/14/2005
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Title:
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GROUP ERASING SYSTEM FOR FLASH ARRAY WITH MULTIPLE SECTORS
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Patent #:
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Issue Dt:
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07/25/2006
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Application #:
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10690082
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Filing Dt:
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10/20/2003
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Publication #:
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Pub Dt:
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04/21/2005
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Title:
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METHOD AND SYSTEM FOR ENHANCING THE ENDURANCE OF MEMORY CELLS
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Patent #:
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Issue Dt:
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02/15/2005
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Application #:
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10690204
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Filing Dt:
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10/20/2003
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Publication #:
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Pub Dt:
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05/06/2004
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Title:
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SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH LOW RESISTANCE SOURCE REGIONS AND HIGH SOURCE COUPLING
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Patent #:
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Issue Dt:
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11/01/2005
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Application #:
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10693067
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Filing Dt:
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10/23/2003
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Publication #:
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Pub Dt:
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04/28/2005
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Title:
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LANDING PAD FOR USE AS A CONTACT TO A CONDUCTIVE SPACER
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Patent #:
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Issue Dt:
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08/01/2006
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Application #:
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10693285
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Filing Dt:
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10/23/2003
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Title:
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PROGRAMMABLE LOGIC DEVICE PARTITIONING METHOD FOR APPLICATION SPECIFIC INTEGRATED CIRCUIT PROTOTYPING
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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10697133
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Filing Dt:
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10/30/2003
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Publication #:
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Pub Dt:
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06/03/2004
| | | | |
Title:
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CHARGE TRANSFER CAPACITIVE POSITION SENSOR
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Patent #:
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Issue Dt:
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11/21/2006
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Application #:
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10706741
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Filing Dt:
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11/12/2003
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Publication #:
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Pub Dt:
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05/12/2005
| | | | |
Title:
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METHOD AND APPARATUS FOR HANDLING INTERRUPTS
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