Patent Assignment Details
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| Reel/Frame: | 030005/0305 | |
| Pages: | 2 |
| | Recorded: | 03/14/2013 | | |
| Attorney Dkt #: | P13H0034/US |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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09/13/2016
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Application #:
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13829548
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Filing Dt:
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03/14/2013
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Publication #:
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Pub Dt:
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07/03/2014
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Title:
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SEMICONDUCTOR MEMORY DEVICE MAPPING EXTERNAL ADDRESS AS INTERNAL ADDRESS WHEREIN INTERNAL ADDRESSES OF SPARE CELLS OF TWO BLOCKS DIFFER BY UPPER MOST BIT AND INTERNAL ADDRESSES OF MAIN CELLS OF TWO BLOCKS DIFFER BY UPPER MOST BIT AND THE INTERNAL ADDRESSES OF MAIN CELL AND SPARE CELL OF EACH BLOCK DIFFER BY ONE BIT AND OPERATING METHOD FOR THE SAME
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Assignee
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| 2091, GYEONGCHUNG-DAERO, BUBAL-EUB, ICHEON-SI |
| GYEONGGI-DO, KOREA, REPUBLIC OF |
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Correspondence name and address
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IP & T GROUP LLP
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8230 LEESBURG PIKE
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SUITE 650
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VIENNA, VA 22182
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