Total properties:
376
Page
1
of
4
Pages:
1 2 3 4
|
|
Patent #:
|
|
Issue Dt:
|
07/28/1987
|
Application #:
|
06757582
|
Filing Dt:
|
07/22/1985
|
Title:
|
METHODS FOR FORMING LATERAL AND VERTICAL DMOS TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/1987
|
Application #:
|
06808575
|
Filing Dt:
|
12/13/1985
|
Title:
|
POWER SUPPLY HAVING DUAL RAMP CONTROL CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/1988
|
Application #:
|
06808904
|
Filing Dt:
|
12/13/1985
|
Title:
|
INSULATED GATE TRANSISTOR WITH LATCHING INHIBITED
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/1988
|
Application #:
|
06816593
|
Filing Dt:
|
01/06/1986
|
Title:
|
INTEGRATED BURIED ZENER DIODE AND TEMPERATURE COMPENSATION TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/1989
|
Application #:
|
06838217
|
Filing Dt:
|
03/10/1986
|
Title:
|
METHOD FOR MANUFACTURING A POWER MOS TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/29/1987
|
Application #:
|
06871006
|
Filing Dt:
|
06/05/1986
|
Title:
|
FABRICATION OF DOUBLE DIFFUSED METAL OXIDE SEMICONDUCTOR TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/18/1990
|
Application #:
|
06890218
|
Filing Dt:
|
07/25/1986
|
Title:
|
CURRENT SOURCE WITH A PROCESS SELECTABLE TEMPERATURE COEFFICIENT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/1987
|
Application #:
|
06894418
|
Filing Dt:
|
08/08/1986
|
Title:
|
MANUFACTURE OF TRIMMABLE HIGH VALUE POLYCRYSTALLINE SILICON RESISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/1989
|
Application #:
|
06927882
|
Filing Dt:
|
11/06/1986
|
Title:
|
IMPLANTATION OF IONS INTO AN INSULATING LAYER TO INCREASE PLANAR PN JUNCTION BREAKDOWN VOLTAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/25/1989
|
Application #:
|
07010924
|
Filing Dt:
|
02/05/1987
|
Title:
|
METHOD FOR OBTAINING REGIONS OF DIELECTRICALLY ISOLATED SINGLE CRYSTAL SILICON
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/1989
|
Application #:
|
07014961
|
Filing Dt:
|
02/17/1987
|
Title:
|
METHOD AND APPARATUS FOR INCREASING BREAKDOWN OF A PLANAR JUNCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/1989
|
Application #:
|
07036777
|
Filing Dt:
|
04/10/1987
|
Title:
|
SWITCH INTERFACE CIRCUIT FOR POWER MOSFET GATE DRIVE CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/26/1988
|
Application #:
|
07084541
|
Filing Dt:
|
08/12/1987
|
Title:
|
ION IMPLANTATION OF THIN FILM CRSI2 AND SIC RESISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/27/1988
|
Application #:
|
07089184
|
Filing Dt:
|
08/25/1987
|
Title:
|
METHOD OF BONDING SEMICONDUCTOR WAFERS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/1988
|
Application #:
|
07095481
|
Filing Dt:
|
09/10/1987
|
Title:
|
DENSE VERTICAL J-MOS TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/30/1989
|
Application #:
|
07099452
|
Filing Dt:
|
09/21/1987
|
Title:
|
DUAL-GATE HIGH DENSITY FET
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/1992
|
Application #:
|
07107725
|
Filing Dt:
|
10/08/1987
|
Title:
|
VERTICAL CURRENT FLOW FIELD EFFECT TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/1989
|
Application #:
|
07115076
|
Filing Dt:
|
10/29/1987
|
Title:
|
BURIED GATE JFET
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/1989
|
Application #:
|
07133710
|
Filing Dt:
|
12/16/1987
|
Title:
|
HIGH VOLTAGE LEVEL SHIFT SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/28/1989
|
Application #:
|
07138989
|
Filing Dt:
|
12/29/1987
|
Title:
|
A POWER MOS TRANSISTOR WITH EQUIPOTENTIAL RING
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/1990
|
Application #:
|
07138999
|
Filing Dt:
|
12/29/1987
|
Title:
|
GROOVED DMOS PROCESS WITH VARYING GATE DIELECTRIC THICKNESS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/26/1990
|
Application #:
|
07141877
|
Filing Dt:
|
01/06/1988
|
Title:
|
METHOD FOR IMPROVED ALIGNMENT FOR SEMICONDUCTOR DEVICES WITH BURIED LAYERS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/1990
|
Application #:
|
07167617
|
Filing Dt:
|
03/14/1988
|
Title:
|
TRENCH POWER MOSFET DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/1988
|
Application #:
|
07195436
|
Filing Dt:
|
05/16/1988
|
Title:
|
HIGH VOLTAGE DRIFTED-DRAIN MOS TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/23/1990
|
Application #:
|
07243166
|
Filing Dt:
|
09/08/1988
|
Title:
|
VERTICAL DMOS POWER TRANSISTOR WITH AN INTEGRAL OPERATING CONDITION SENSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/1990
|
Application #:
|
07246937
|
Filing Dt:
|
09/19/1988
|
Title:
|
POWER TRANSISTOR WITH INTEGRATED GATE RESISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/20/1992
|
Application #:
|
07268839
|
Filing Dt:
|
11/08/1988
|
Title:
|
COMPLEMENTARY, ISOLATED DMOS IC TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/1991
|
Application #:
|
07285842
|
Filing Dt:
|
12/15/1988
|
Title:
|
SELF-ALIGNED LDD LATERAL DMOS TRANSISTOR WITH HIGH-VOLTAGE INTERCONNECT CAPABILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/1991
|
Application #:
|
07290546
|
Filing Dt:
|
12/27/1988
|
Title:
|
TRENCH DMOS POWER TRANSISTOR WITH FIELD-SHAPING BODY PROFILE AND THREE-DIMENSIONAL GEOMETRY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/1990
|
Application #:
|
07334806
|
Filing Dt:
|
04/05/1989
|
Title:
|
RUGGED LATERAL DMOS TRANSISTOR STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/1990
|
Application #:
|
07406844
|
Filing Dt:
|
09/13/1989
|
Title:
|
METHOD AND APPARATUS FOR IMPROVING THE ON-VOLTAGE CHARACTERISTICS OF A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/28/1992
|
Application #:
|
07451518
|
Filing Dt:
|
12/15/1989
|
Title:
|
MOS TRANSISTOR WITH A CHARGE INDUCED DRAIN EXTENSION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/1990
|
Application #:
|
07453367
|
Filing Dt:
|
12/21/1989
|
Title:
|
JUNCTION FIELD-EFFECT TRANSISTOR WITH A NOVEL GATE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/1992
|
Application #:
|
07498170
|
Filing Dt:
|
03/23/1990
|
Title:
|
OPTIMIZATION OF BV AND RDS-ON BY GRADED DOPING IN LDD AND OTHER HIGH VOLTAGE IC
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/1992
|
Application #:
|
07677203
|
Filing Dt:
|
03/29/1991
|
Title:
|
FUZED SOLID ELECTROLYTE CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/1991
|
Application #:
|
07677204
|
Filing Dt:
|
03/29/1991
|
Title:
|
MOLDED FUZED SOLID ELECTROLYTE CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/1992
|
Application #:
|
07678578
|
Filing Dt:
|
03/29/1991
|
Title:
|
METHOD FOR FABRICATING A HIGH VOLTAGE MOS TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/1995
|
Application #:
|
07697356
|
Filing Dt:
|
05/06/1991
|
Title:
|
LIGHTLY-DOPED DRAIN MOSFET WITH IMPROVED BREAKDOWN CHARACTERISTICS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/1994
|
Application #:
|
07762103
|
Filing Dt:
|
09/18/1991
|
Title:
|
TRENCH DMOS POWER TRANSISTOR WITH FIELD-SHAPING BODY PROFILE AND THREE-DIMENSIONAL GEOMETRY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/1993
|
Application #:
|
07802352
|
Filing Dt:
|
12/04/1991
|
Title:
|
MOS TRANSISTOR WITH A CHARGE INDUCED DRAIN EXTENSION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/1993
|
Application #:
|
07849723
|
Filing Dt:
|
03/11/1992
|
Title:
|
HIGH VOLTAGE MOS TRANSISTOR WITH REDUCED PARASITIC CURRENT GAIN
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/1993
|
Application #:
|
07854162
|
Filing Dt:
|
03/20/1992
|
Title:
|
THRESHOLD ADJUSTMENT IN FABRICATING VERTICAL DMOS DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/1994
|
Application #:
|
07855377
|
Filing Dt:
|
03/20/1992
|
Title:
|
DRIVER CIRCUIT FOR SINKING CURRENT TO TWO SUPPLY VOLTAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/1994
|
Application #:
|
07860403
|
Filing Dt:
|
03/30/1992
|
Title:
|
BULK METAL CHIP RESISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/1995
|
Application #:
|
07873423
|
Filing Dt:
|
04/23/1992
|
Title:
|
POWER DEVICE WITH BUFFERED GATE SHIELD REGION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/1994
|
Application #:
|
07881589
|
Filing Dt:
|
05/12/1992
|
Title:
|
LOW ON-RESISTANCE POWER MOS TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/1994
|
Application #:
|
07881856
|
Filing Dt:
|
05/12/1992
|
Title:
|
MONOLYTHIC MULTILAYER CHIP INDUCTOR AND METHOD FOR MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/1996
|
Application #:
|
07904402
|
Filing Dt:
|
06/24/1992
|
Title:
|
ISOLATED DMOS IC TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/1994
|
Application #:
|
07910864
|
Filing Dt:
|
07/08/1992
|
Title:
|
VERTICAL CURRENT FLOW FIELD EFFECT TRANSISTOR WITH THICK INSULATOR OVER NON-CHANNEL AREAS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/1999
|
Application #:
|
07918954
|
Filing Dt:
|
07/24/1992
|
Title:
|
FIELD EFFECT TRENCH TRANSISTOR HAVING LIGHTLY DOPED EPITAXIAL REGION ON THE SURFACE PORTION THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/1995
|
Application #:
|
07918996
|
Filing Dt:
|
07/23/1992
|
Title:
|
HIGH VOLTAGE TRANSISTOR HAVING EDGE TERMINATION UTILIZING TRENCH TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/1994
|
Application #:
|
07928909
|
Filing Dt:
|
08/12/1992
|
Title:
|
TRENCHED DMOS TRANSISTOR FABRICATION USING SIX MASKS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/1994
|
Application #:
|
07949288
|
Filing Dt:
|
09/21/1992
|
Title:
|
LOW TEMPERATURE OXIDE LAYER OVER FIELD IMPLANT MASK
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/1996
|
Application #:
|
07978201
|
Filing Dt:
|
11/18/1992
|
Title:
|
METHOD OF MAKING VERTICAL CURRENT FLOW FIELD EFFECT TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/1995
|
Application #:
|
08026930
|
Filing Dt:
|
03/05/1993
|
Title:
|
BICMOS STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/20/1994
|
Application #:
|
08026932
|
Filing Dt:
|
03/05/1993
|
Title:
|
METHOD FOR FORMING A BICDMOS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/1994
|
Application #:
|
08031798
|
Filing Dt:
|
03/15/1993
|
Title:
|
SHORT CHANNEL TRENCHED DMOS TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/20/1994
|
Application #:
|
08040684
|
Filing Dt:
|
03/31/1993
|
Title:
|
LIGHTLY-DOPED DRAIN MOSFET WITH IMPROVED BREAKDOWN CHARACTERISTICS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/1994
|
Application #:
|
08046058
|
Filing Dt:
|
04/12/1993
|
Title:
|
METHOD FOR REDUCING ON RESISTANCE AND IMPROVING CURRENT CHARACTERISTICS OF A MOSFET
|
|
|
Patent #:
|
|
Issue Dt:
|
04/25/1995
|
Application #:
|
08047723
|
Filing Dt:
|
04/14/1993
|
Title:
|
DMOS POWER TRANSISTORS WITH REDUCED NUMBER OF CONTACTS USING INTEGRATED BODY-SOURCE CONNECTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/07/1995
|
Application #:
|
08062370
|
Filing Dt:
|
05/14/1993
|
Title:
|
THRESHOLD ADJUSTMENT IN VERTICAL DMOS DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/16/1996
|
Application #:
|
08062503
|
Filing Dt:
|
05/14/1993
|
Title:
|
DISCONNECT SWITCH CIRCUIT TO POWER HEAD RETRACT IN HARD DISK DRIVE MEMORIES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/1994
|
Application #:
|
08062504
|
Filing Dt:
|
05/14/1993
|
Title:
|
PUSH-PULL OUTPUT STAGE FOR DRIVING MOTORS WHICH GENERATES AUXILIARY VOLTAGE SUPPLY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/1995
|
Application #:
|
08062507
|
Filing Dt:
|
05/14/1993
|
Title:
|
CONTACT GEOMETRY FOR IMPROVED LATERAL MOSFET
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/1995
|
Application #:
|
08062968
|
Filing Dt:
|
05/14/1993
|
Title:
|
HEAD-RETRACT CIRCUIT FOR MOVING MEDIA STORAGE APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/1995
|
Application #:
|
08062969
|
Filing Dt:
|
05/14/1993
|
Title:
|
APPARATUS FOR GENERATING POSITIVE AND NEGATIVE SUPPLY RAILS FROM OPERATING MOTOR CONTROL CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/1996
|
Application #:
|
08067365
|
Filing Dt:
|
05/26/1993
|
Title:
|
FLOATING DRIVE TECHNIQUE FOR REVERSE BATTERY PROTECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/1995
|
Application #:
|
08067372
|
Filing Dt:
|
05/26/1993
|
Title:
|
JUNCTION-ISOLATED FLOATING DIODE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/14/1996
|
Application #:
|
08067373
|
Filing Dt:
|
05/26/1993
|
Title:
|
REVERSE BATTERY PROTECTION DEVICE CONTAINING POWER MOSFET
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/1995
|
Application #:
|
08101886
|
Filing Dt:
|
08/04/1993
|
Title:
|
METAL CROSSOVER IN HIGH VOLTAGE IC WITH GRADUATED DOPING CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/1995
|
Application #:
|
08131114
|
Filing Dt:
|
10/01/1993
|
Title:
|
LOW THRESHOLD VOLTAGE EPITAXIAL DMOS TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/30/1995
|
Application #:
|
08160539
|
Filing Dt:
|
11/30/1993
|
Title:
|
BIDIRECTIONAL BLOCKING LATERAL MOSFET WITH IMPROVED ON-RESISTANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/23/1996
|
Application #:
|
08160560
|
Filing Dt:
|
11/30/1993
|
Title:
|
GATE DRIVE TECHNIQUE FOR A BIDIRECTIONAL BLOCKING LATERAL MOSFET
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/1995
|
Application #:
|
08180265
|
Filing Dt:
|
01/12/1994
|
Title:
|
LOW ON-RESISTANCE POWER MOS TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/16/1995
|
Application #:
|
08225270
|
Filing Dt:
|
04/08/1994
|
Title:
|
METHOD OF MAKING BICDMOS STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/1995
|
Application #:
|
08226419
|
Filing Dt:
|
04/11/1994
|
Title:
|
BICDMOS STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/1995
|
Application #:
|
08236299
|
Filing Dt:
|
05/02/1994
|
Title:
|
LOW TEMPERATURE OXIDE LAYER OVER FIELD IMPLANT MASK
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/1995
|
Application #:
|
08242519
|
Filing Dt:
|
05/13/1994
|
Title:
|
METHOD OF MAKING POWER DEVICE WITH BUFFERED GATE SHIELD REGION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/1995
|
Application #:
|
08253527
|
Filing Dt:
|
06/03/1994
|
Title:
|
TRENCHED DMOS TRANSISTOR WITH CHANNEL BLOCK AT CELL TRENCH CORNERS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/23/1996
|
Application #:
|
08268755
|
Filing Dt:
|
06/30/1994
|
Title:
|
RELIABILITY TEST METHOD FOR SEMICONDUCTOR TRENCH DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/12/1995
|
Application #:
|
08289358
|
Filing Dt:
|
08/11/1994
|
Title:
|
METHOD FOR FABRICATING A SHORT CHANNEL TRENCHED DMOS TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/1996
|
Application #:
|
08295271
|
Filing Dt:
|
08/23/1994
|
Title:
|
VOLTAGE CONVERTER WITH FREQUENCY SHIFT PROTECTION AGAINST OVERLOAD CURRENT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/1996
|
Application #:
|
08318027
|
Filing Dt:
|
10/04/1994
|
Title:
|
METHOD OF MAKING LIGHTLY-DOPED DRAIN DMOS WITH IMPROVED BREAKDOWN CHARACTERISTICS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/1995
|
Application #:
|
08318323
|
Filing Dt:
|
10/05/1994
|
Title:
|
BIDIRECTINAL BLOCKING LATERAL MOSFET WITH IMPROVED ON-RESISTANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/1996
|
Application #:
|
08323950
|
Filing Dt:
|
10/17/1994
|
Title:
|
BICDMOS PROCESS TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/1996
|
Application #:
|
08325860
|
Filing Dt:
|
10/19/1994
|
Title:
|
PROTECTIVE CIRCUIT FOR PROTECTING LOAD AGAINST EXCESSIVE INPUT VOLTAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/1996
|
Application #:
|
08326172
|
Filing Dt:
|
10/19/1994
|
Title:
|
ELECTROSTATIC DISCHARGE PROTECTION DEVICE FOR INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/1996
|
Application #:
|
08326408
|
Filing Dt:
|
10/20/1994
|
Title:
|
VOLTAGE REGULATOR HAVING IMPROVED STABILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/18/1997
|
Application #:
|
08350960
|
Filing Dt:
|
12/07/1994
|
Title:
|
SURFACE MOUNT RESISTOR AND METHOD FOR MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/1996
|
Application #:
|
08362674
|
Filing Dt:
|
12/22/1994
|
Title:
|
STRUCTURE AND FABRICATION OF POWER MOSFETS, INCLUDING TERMINATION STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/1998
|
Application #:
|
08367388
|
Filing Dt:
|
12/30/1994
|
Title:
|
LATERAL POWER MOSFET HAVING METAL STRAP LAYER TO REDUCE DISTRIBUTED RESISTANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/1997
|
Application #:
|
08367486
|
Filing Dt:
|
12/30/1994
|
Title:
|
VERTICAL POWER MOSFET HAVING THICK METAL LAYER TO REDUCE DISTRIBUTED RESISTANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/1997
|
Application #:
|
08367515
|
Filing Dt:
|
12/30/1994
|
Title:
|
LOW-SIDE BIDIRECTIONAL BATTERY DISCONNECT SWITCH
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/1996
|
Application #:
|
08386895
|
Filing Dt:
|
02/10/1995
|
Title:
|
TRENCH FIELD EFFECT TRANSISTOR WITH REDUCED PUNCH-THROUGH SUSCEPTIBILITY AND LOW RDSON
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/1997
|
Application #:
|
08388535
|
Filing Dt:
|
02/14/1995
|
Title:
|
BAND GAP VOLTAGE COMPENSATION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/1996
|
Application #:
|
08389705
|
Filing Dt:
|
02/14/1995
|
Title:
|
OUTPUT CONTROL CIRCUIT FOR A VOLTAGE REGULATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/1997
|
Application #:
|
08415009
|
Filing Dt:
|
03/31/1995
|
Title:
|
PUNCH-THROUGH FIELD EFFECT TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/1997
|
Application #:
|
08423588
|
Filing Dt:
|
04/17/1995
|
Title:
|
METHOD FOR MAKING TERMINATION STRUCTURE FOR POWER MOSFET
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/1997
|
Application #:
|
08429414
|
Filing Dt:
|
04/26/1995
|
Title:
|
METHOD OF MAKING A TRENCH MOSFET WITH MULTI-RESISTIVITY DRAIN TO PROVIDE LOW ON-RESISTANCE BY VARYING DOPANT CONCENTRATION IN EPITAXIAL LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/1997
|
Application #:
|
08444336
|
Filing Dt:
|
05/18/1995
|
Title:
|
METHOD FOR FABRICATING HIGH VOLTAGE TRANSISTOR HAVING TRENCHED TERMINATION
|
|