Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 070088/0320 | |
| Pages: | 9 |
| | Recorded: | 02/03/2025 | | |
| Conveyance: | SECURITY AGREEMENT (SUPPLEMENTAL) |
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Total properties:
5
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Patent #:
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NONE
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Issue Dt:
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Application #:
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18930628
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Filing Dt:
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10/29/2024
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Publication #:
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Pub Dt:
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02/13/2025
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Title:
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SEMICONDUCTOR WAFER CONFIGURED FOR SINGLE TOUCH-DOWN TESTING
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Patent #:
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NONE
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Issue Dt:
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Application #:
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18937415
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Filing Dt:
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11/05/2024
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Publication #:
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Pub Dt:
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02/20/2025
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Title:
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Data Storage Device That Detects and Releases Bottlenecks in Hardware
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Patent #:
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NONE
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Issue Dt:
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Application #:
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18950564
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Filing Dt:
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11/18/2024
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Publication #:
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Pub Dt:
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03/06/2025
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Title:
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Low Power State Staging
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Patent #:
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NONE
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Issue Dt:
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Application #:
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18950574
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Filing Dt:
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11/18/2024
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Publication #:
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Pub Dt:
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03/06/2025
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Title:
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Optimization of an Active Range of mSets Stored in a Compressed Address Table
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Patent #:
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NONE
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Issue Dt:
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Application #:
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18950918
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Filing Dt:
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11/18/2024
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Publication #:
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Pub Dt:
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03/06/2025
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Title:
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Authentication of Sanitize Erase
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Assignee
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| 10 S. DEARBORN L2 |
| CHICAGO, ILLINOIS 60603 |
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Correspondence name and address
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MICHAEL VIOLET
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4400 EASTON COMMONS WAY
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SUITE 125
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COLUMBUS, OH 43219
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