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Patent #:
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Issue Dt:
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08/20/2019
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Application #:
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15684081
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Filing Dt:
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08/23/2017
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Publication #:
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Pub Dt:
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12/28/2017
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Title:
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Transistors and Methods of Forming Transistors
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Patent #:
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Issue Dt:
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02/04/2020
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Application #:
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15684577
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Filing Dt:
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08/23/2017
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Publication #:
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Pub Dt:
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02/28/2019
| | | | |
Title:
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SEMICONDUCTOR DIES SUPPORTING MULTIPLE PACKAGING CONFIGURATIONS AND ASSOCIATED METHODS
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Patent #:
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Issue Dt:
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05/28/2019
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Application #:
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15684612
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Filing Dt:
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08/23/2017
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Publication #:
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Pub Dt:
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01/18/2018
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Title:
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Methods Of Forming One Or More Covered Voids In A Semiconductor Substrate
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Patent #:
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Issue Dt:
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11/20/2018
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Application #:
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15684703
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Filing Dt:
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08/23/2017
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Title:
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METHODS AND SYSTEMS FOR IMPROVING POWER DELIVERY AND SIGNALING IN STACKED SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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07/03/2018
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Application #:
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15684722
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Filing Dt:
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08/23/2017
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Publication #:
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Pub Dt:
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12/07/2017
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Title:
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Methods Of Forming One Or More Covered Voids In A Semiconductor Substrate
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Patent #:
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Issue Dt:
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12/11/2018
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Application #:
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15684728
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Filing Dt:
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08/23/2017
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Publication #:
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Pub Dt:
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12/07/2017
| | | | |
Title:
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Methods Of Forming One Or More Covered Voids In A Semiconductor Substrate
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Patent #:
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Issue Dt:
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08/28/2018
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Application #:
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15684734
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Filing Dt:
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08/23/2017
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Publication #:
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Pub Dt:
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12/21/2017
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Title:
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APPARATUSES WITH AN EMBEDDED COMBINATION LOGIC CIRCUIT FOR HIGH SPEED OPERATIONS
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Patent #:
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Issue Dt:
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07/30/2019
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Application #:
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15684756
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Filing Dt:
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08/23/2017
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Publication #:
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Pub Dt:
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12/28/2017
| | | | |
Title:
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SYSTEMS AND METHODS FOR TESTING A SEMICONDUCTOR MEMORY DEVICE HAVING A REFERENCE MEMORY ARRAY
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Patent #:
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Issue Dt:
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05/14/2019
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Application #:
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15684763
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Filing Dt:
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08/23/2017
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Publication #:
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Pub Dt:
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12/07/2017
| | | | |
Title:
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MEMORY REFRESH METHODS AND APPARATUSES
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Patent #:
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Issue Dt:
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12/28/2021
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Application #:
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15684773
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Filing Dt:
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08/23/2017
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Publication #:
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Pub Dt:
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02/28/2019
| | | | |
Title:
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MEMORY WITH VIRTUAL PAGE SIZE
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Patent #:
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Issue Dt:
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12/25/2018
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Application #:
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15684784
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Filing Dt:
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08/23/2017
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Publication #:
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Pub Dt:
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12/07/2017
| | | | |
Title:
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APPARATUSES, MEMORIES, AND METHODS FOR ADDRESS DECODING AND SELECTING AN ACCESS LINE
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Patent #:
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Issue Dt:
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08/27/2019
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Application #:
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15684792
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Filing Dt:
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08/23/2017
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Publication #:
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Pub Dt:
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02/28/2019
| | | | |
Title:
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ON DEMAND MEMORY PAGE SIZE
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Patent #:
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Issue Dt:
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09/17/2019
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Application #:
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15684831
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Filing Dt:
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08/23/2017
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Publication #:
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Pub Dt:
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02/28/2019
| | | | |
Title:
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MEMORY DEVICE WITH A MULTI-MODE COMMUNICATION MECHANISM
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Patent #:
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Issue Dt:
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07/30/2019
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Application #:
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15685387
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Filing Dt:
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08/24/2017
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Publication #:
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Pub Dt:
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12/28/2017
| | | | |
Title:
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Fuse Element Assemblies
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Patent #:
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Issue Dt:
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09/11/2018
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Application #:
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15685643
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Filing Dt:
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08/24/2017
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Publication #:
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Pub Dt:
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01/04/2018
| | | | |
Title:
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APPARATUSES AND METHODS FOR PERFORMING LOGICAL OPERATIONS USING SENSING CIRCUITRY
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Patent #:
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Issue Dt:
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03/22/2022
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Application #:
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15685690
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Filing Dt:
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08/24/2017
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Publication #:
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Pub Dt:
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02/28/2019
| | | | |
Title:
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SEMICONDUCTOR DEVICES COMPRISING CARBON-DOPED SILICON NITRIDE AND RELATED METHODS
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Patent #:
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Issue Dt:
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06/12/2018
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Application #:
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15685855
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Filing Dt:
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08/24/2017
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Publication #:
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Pub Dt:
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12/07/2017
| | | | |
Title:
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DEVICES, SYSTEMS, AND METHODS OF REDUCING CHIP SELECT
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Patent #:
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|
Issue Dt:
|
12/04/2018
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Application #:
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15685871
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Filing Dt:
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08/24/2017
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Title:
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SEMICONDUCTOR PITCH PATTERNING
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Patent #:
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Issue Dt:
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12/24/2019
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Application #:
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15685878
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Filing Dt:
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08/24/2017
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Publication #:
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Pub Dt:
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12/28/2017
| | | | |
Title:
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MEMORY CELL PILLAR INCLUDING SOURCE JUNCTION PLUG
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Patent #:
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Issue Dt:
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02/26/2019
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Application #:
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15685907
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Filing Dt:
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08/24/2017
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Publication #:
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Pub Dt:
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12/07/2017
| | | | |
Title:
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SEMICONDUCTOR CONSTRUCTIONS
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Patent #:
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Issue Dt:
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02/19/2019
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Application #:
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15685909
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Filing Dt:
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08/24/2017
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Publication #:
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Pub Dt:
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12/07/2017
| | | | |
Title:
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MEMORY READ APPARATUS AND METHODS
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Patent #:
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Issue Dt:
|
10/16/2018
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Application #:
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15685921
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Filing Dt:
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08/24/2017
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Title:
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THRUMOLD POST PACKAGE WITH REVERSE BUILD UP HYBRID ADDITIVE STRUCTURE
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Patent #:
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Issue Dt:
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12/25/2018
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Application #:
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15685926
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Filing Dt:
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08/24/2017
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Publication #:
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Pub Dt:
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12/07/2017
| | | | |
Title:
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MULTI-PARTITIONING OF MEMORIES
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Patent #:
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NONE
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Issue Dt:
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Application #:
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15685940
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Filing Dt:
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08/24/2017
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Publication #:
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Pub Dt:
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02/28/2019
| | | | |
Title:
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HYBRID ADDITIVE STRUCTURE STACKABLE MEMORY DIE USING WIRE BOND
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|
|
Patent #:
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NONE
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Issue Dt:
|
|
Application #:
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15685950
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Filing Dt:
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08/24/2017
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Publication #:
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Pub Dt:
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12/07/2017
| | | | |
Title:
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METHODS AND SYSTEMS FOR AUTONOMOUS MEMORY SEARCHING
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|
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Patent #:
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|
Issue Dt:
|
04/16/2019
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Application #:
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15685997
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Filing Dt:
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08/24/2017
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Publication #:
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Pub Dt:
|
02/28/2019
| | | | |
Title:
|
SEMICONDUCTOR DEVICE STRUCTURES FOR BURN-IN TESTING AND METHODS THEREOF
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|
|
Patent #:
|
|
Issue Dt:
|
06/04/2019
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Application #:
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15686008
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Filing Dt:
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08/24/2017
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Publication #:
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Pub Dt:
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02/28/2019
| | | | |
Title:
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SOLDER REMOVAL FROM SEMICONDUCTOR DEVICES
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|
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Patent #:
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|
Issue Dt:
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05/28/2019
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Application #:
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15686024
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Filing Dt:
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08/24/2017
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Publication #:
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Pub Dt:
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02/28/2019
| | | | |
Title:
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DUAL SIDED FAN-OUT PACKAGE HAVING LOW WARPAGE ACROSS ALL TEMPERATURES
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Patent #:
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NONE
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Issue Dt:
|
|
Application #:
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15686029
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Filing Dt:
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08/24/2017
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Publication #:
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Pub Dt:
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02/28/2019
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING LATERALLY OFFSET STACKED SEMICONDUCTOR DIES
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|
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Patent #:
|
|
Issue Dt:
|
12/11/2018
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Application #:
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15686082
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Filing Dt:
|
08/24/2017
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Title:
|
Arrays of Cross-Point Memory Structures
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Patent #:
|
|
Issue Dt:
|
05/08/2018
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Application #:
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15686101
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Filing Dt:
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08/24/2017
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Title:
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Integrated Structures
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Patent #:
|
|
Issue Dt:
|
06/18/2019
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Application #:
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15686107
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Filing Dt:
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08/24/2017
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Publication #:
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Pub Dt:
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12/28/2017
| | | | |
Title:
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Integrated Structures and Methods of Forming Integrated Structures
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|
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Patent #:
|
|
Issue Dt:
|
11/19/2019
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Application #:
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15686308
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Filing Dt:
|
08/25/2017
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Publication #:
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|
Pub Dt:
|
12/07/2017
| | | | |
Title:
|
PHASE CHANGE MEMORY DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
02/26/2019
|
Application #:
|
15686389
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Filing Dt:
|
08/25/2017
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Publication #:
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|
Pub Dt:
|
12/07/2017
| | | | |
Title:
|
CELL PILLAR STRUCTURES AND INTEGRATED FLOWS
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|
|
Patent #:
|
|
Issue Dt:
|
10/02/2018
|
Application #:
|
15686416
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Filing Dt:
|
08/25/2017
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Publication #:
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|
Pub Dt:
|
12/07/2017
| | | | |
Title:
|
MEMORY ARRAY WITH POWER-EFFICIENT READ ARCHITECTURE
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|
|
Patent #:
|
|
Issue Dt:
|
06/18/2019
|
Application #:
|
15686510
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Filing Dt:
|
08/25/2017
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Publication #:
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|
Pub Dt:
|
12/14/2017
| | | | |
Title:
|
METHODS OF PROGRAMMING MEMORY
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|
|
Patent #:
|
|
Issue Dt:
|
03/31/2020
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Application #:
|
15686526
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Filing Dt:
|
08/25/2017
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Publication #:
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|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
VAPOR-ETCH CYCLIC PROCESS
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|
|
Patent #:
|
|
Issue Dt:
|
07/30/2019
|
Application #:
|
15686754
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Filing Dt:
|
08/25/2017
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Publication #:
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|
Pub Dt:
|
12/07/2017
| | | | |
Title:
|
MEMORY DEVICES CONFIGURED TO PERFORM LEAK CHECKS
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|
|
Patent #:
|
|
Issue Dt:
|
06/30/2020
|
Application #:
|
15686963
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Filing Dt:
|
08/25/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
METHODS AND SYSTEMS FOR INHIBITING BONDING MATERIALS FROM CONTAMINATING A SEMICONDUCTOR PROCESSING TOOL
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|
|
Patent #:
|
|
Issue Dt:
|
12/18/2018
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Application #:
|
15686996
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Filing Dt:
|
08/25/2017
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Title:
|
MITIGATING LINE-TO-LINE CAPACITIVE COUPLING IN A MEMORY DIE
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|
|
Patent #:
|
|
Issue Dt:
|
10/02/2018
|
Application #:
|
15687015
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Filing Dt:
|
08/25/2017
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Title:
|
COLD FLUID SEMICONDUCTOR DEVICE RELEASE DURING PICK AND PLACE OPERATIONS, AND ASSOCIATED SYSTEMS AND METHODS
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|
|
Patent #:
|
|
Issue Dt:
|
08/27/2019
|
Application #:
|
15687019
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Filing Dt:
|
08/25/2017
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Publication #:
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|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
SELF-REFERENCING MEMORY DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
09/24/2019
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Application #:
|
15687038
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Filing Dt:
|
08/25/2017
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Publication #:
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|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
SELF-SELECTING MEMORY CELL WITH DIELECTRIC BARRIER
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|
|
Patent #:
|
|
Issue Dt:
|
08/10/2021
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Application #:
|
15687069
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Filing Dt:
|
08/25/2017
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Publication #:
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|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
METHODS OF MEMORY ADDRESS VERIFICATION AND MEMORY DEVICES EMPLOYING THE SAME
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|
|
Patent #:
|
|
Issue Dt:
|
04/16/2019
|
Application #:
|
15687169
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Filing Dt:
|
08/25/2017
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Publication #:
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|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
METHODS OF MEMORY ADDRESS VERIFICATION AND MEMORY DEVICES EMPLOYING THE SAME
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|
|
Patent #:
|
|
Issue Dt:
|
10/08/2019
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Application #:
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15687499
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Filing Dt:
|
08/27/2017
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Publication #:
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|
Pub Dt:
|
12/28/2017
| | | | |
Title:
|
METHODS OF FORMING ELECTROMAGNETIC RADIATION CONDUITS
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|
Patent #:
|
|
Issue Dt:
|
03/20/2018
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Application #:
|
15687504
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Filing Dt:
|
08/27/2017
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Publication #:
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|
Pub Dt:
|
12/07/2017
| | | | |
Title:
|
Electromagnetic Radiation Emitters and Conduit Structures
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|
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Patent #:
|
|
Issue Dt:
|
12/10/2019
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Application #:
|
15687506
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Filing Dt:
|
08/27/2017
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Publication #:
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|
Pub Dt:
|
12/28/2017
| | | | |
Title:
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FLUORIMETRY SYSTEMS
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|
|
Patent #:
|
|
Issue Dt:
|
07/17/2018
|
Application #:
|
15687509
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Filing Dt:
|
08/27/2017
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Publication #:
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|
Pub Dt:
|
12/07/2017
| | | | |
Title:
|
Methods of Forming Nanofluidic Channels
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|
|
Patent #:
|
|
Issue Dt:
|
06/25/2019
|
Application #:
|
15687581
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Filing Dt:
|
08/28/2017
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Publication #:
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|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
ERASING MEMORY CELLS
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|
|
Patent #:
|
|
Issue Dt:
|
03/24/2020
|
Application #:
|
15687636
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Filing Dt:
|
08/28/2017
|
Publication #:
|
|
Pub Dt:
|
12/28/2017
| | | | |
Title:
|
VIAS AND CONDUCTIVE ROUTING LAYERS IN SEMICONDUCTOR SUBSTRATES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/30/2019
|
Application #:
|
15687691
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Filing Dt:
|
08/28/2017
|
Publication #:
|
|
Pub Dt:
|
12/14/2017
| | | | |
Title:
|
SEMICONDUCTOR DEVICES INCLUDING CONDUCTIVE PILLARS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2018
|
Application #:
|
15687710
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Filing Dt:
|
08/28/2017
|
Publication #:
|
|
Pub Dt:
|
12/07/2017
| | | | |
Title:
|
PROGRAMMING MEMORIES WITH STEPPED PROGRAMMING PULSES INCLUDING INHIBITING A MEMORY CELL FOR A PORTION OF A PROGRAMMING PULSE AND ENABLING THAT MEMORY CELL FOR ANOTHER PORTION OF THAT PROGRAMMING PULSE
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|
|
Patent #:
|
|
Issue Dt:
|
12/25/2018
|
Application #:
|
15687732
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Filing Dt:
|
08/28/2017
|
Title:
|
APPARATUS CONTAINING CIRCUIT-PROTECTION DEVICES
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|
|
Patent #:
|
|
Issue Dt:
|
07/31/2018
|
Application #:
|
15687813
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Filing Dt:
|
08/28/2017
|
Publication #:
|
|
Pub Dt:
|
12/14/2017
| | | | |
Title:
|
APPARATUSES AND METHODS FOR CONVERTING A MASK TO AN INDEX
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2019
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Application #:
|
15687830
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Filing Dt:
|
08/28/2017
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Publication #:
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|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
SEMICONDUCTOR DEVICES INCLUDING CAPACITORS, RELATED ELECTRONIC SYSTEMS, AND RELATED METHODS
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|
|
Patent #:
|
|
Issue Dt:
|
06/09/2020
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Application #:
|
15688027
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Filing Dt:
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08/28/2017
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Publication #:
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Pub Dt:
|
12/14/2017
| | | | |
Title:
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CROSS-POINT MEMORY AND METHODS FOR FABRICATION OF SAME
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Patent #:
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Issue Dt:
|
12/17/2019
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Application #:
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15688260
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Filing Dt:
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08/28/2017
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Publication #:
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Pub Dt:
|
12/14/2017
| | | | |
Title:
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APPARATUSES HAVING A FERROELECTRIC FIELD-EFFECT TRANSISTOR MEMORY ARRAY AND RELATED METHOD
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|
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Patent #:
|
|
Issue Dt:
|
07/03/2018
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Application #:
|
15688308
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Filing Dt:
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08/28/2017
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Publication #:
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|
Pub Dt:
|
12/14/2017
| | | | |
Title:
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METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE PACKAGE INCLUDING A CONTROLLER ELEMENT
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|
|
Patent #:
|
|
Issue Dt:
|
04/10/2018
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Application #:
|
15688348
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Filing Dt:
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08/28/2017
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Publication #:
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|
Pub Dt:
|
12/14/2017
| | | | |
Title:
|
DIVISION OPERATIONS IN MEMORY
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|
|
Patent #:
|
|
Issue Dt:
|
05/01/2018
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Application #:
|
15688545
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Filing Dt:
|
08/28/2017
|
Publication #:
|
|
Pub Dt:
|
12/14/2017
| | | | |
Title:
|
APPARATUSES AND METHODS FOR PERFORMING LOGICAL OPERATIONS USING SENSING CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2020
|
Application #:
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15688645
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Filing Dt:
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08/28/2017
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Publication #:
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Pub Dt:
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02/28/2019
| | | | |
Title:
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MEMORY ARRAY RESET READ OPERATION
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Patent #:
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Issue Dt:
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01/05/2021
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Application #:
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15688667
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Filing Dt:
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08/28/2017
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Publication #:
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Pub Dt:
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12/14/2017
| | | | |
Title:
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APPARATUS AND METHODS TO PERFORM READ-WHILE WRITE (RWW) OPERATIONS
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Patent #:
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Issue Dt:
|
04/03/2018
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Application #:
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15688680
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Filing Dt:
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08/28/2017
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Publication #:
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Pub Dt:
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01/04/2018
| | | | |
Title:
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DYNAMIC ADJUSTMENT OF MEMORY CELL DIGIT LINE CAPACITANCE
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Patent #:
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Issue Dt:
|
01/08/2019
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Application #:
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15688945
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Filing Dt:
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08/29/2017
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Title:
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REFRESH IN NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
|
02/25/2020
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Application #:
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15689017
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Filing Dt:
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08/29/2017
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Publication #:
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Pub Dt:
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02/28/2019
| | | | |
Title:
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DECODE CIRCUITRY COUPLED TO A MEMORY ARRAY
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Patent #:
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Issue Dt:
|
07/02/2019
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Application #:
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15689114
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Filing Dt:
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08/29/2017
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Publication #:
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Pub Dt:
|
12/14/2017
| | | | |
Title:
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STRIPE MAPPING IN MEMORY
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Patent #:
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Issue Dt:
|
10/29/2019
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Application #:
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15689155
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Filing Dt:
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08/29/2017
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Publication #:
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Pub Dt:
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02/28/2019
| | | | |
Title:
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THREE DIMENSIONAL MEMORY ARRAYS
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Patent #:
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Issue Dt:
|
09/25/2018
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Application #:
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15689211
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Filing Dt:
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08/29/2017
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Publication #:
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Pub Dt:
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01/04/2018
| | | | |
Title:
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FERROELECTRIC MEMORY CELL APPARATUSES AND METHODS OF OPERATING FERROELECTRIC MEMORY CELLS
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Patent #:
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Issue Dt:
|
05/07/2019
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Application #:
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15689256
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Filing Dt:
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08/29/2017
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Publication #:
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Pub Dt:
|
01/04/2018
| | | | |
Title:
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CROSS-POINT MEMORY AND METHODS FOR FORMING OF THE SAME
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|
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Patent #:
|
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Issue Dt:
|
06/11/2019
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Application #:
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15689453
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Filing Dt:
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08/29/2017
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Publication #:
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Pub Dt:
|
12/21/2017
| | | | |
Title:
|
SCALABLE, PARAMETERIZABLE, AND SCRIPT-GENERATABLE BUFFER MANAGER ARCHITECTURE
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|
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Patent #:
|
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Issue Dt:
|
11/05/2019
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Application #:
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15689459
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Filing Dt:
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08/29/2017
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Publication #:
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Pub Dt:
|
12/21/2017
| | | | |
Title:
|
METHODS OF OPERATING A MEMORY DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
05/07/2019
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Application #:
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15689626
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Filing Dt:
|
08/29/2017
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Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
DATA DEDUPLICATION
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|
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Patent #:
|
|
Issue Dt:
|
12/25/2018
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Application #:
|
15689721
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Filing Dt:
|
08/29/2017
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Title:
|
CHARACTERIZATION OF DECISION FEEDBACK EQUALIZER TAPS
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|
|
Patent #:
|
|
Issue Dt:
|
11/01/2022
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Application #:
|
15689735
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Filing Dt:
|
08/29/2017
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Publication #:
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Pub Dt:
|
02/28/2019
| | | | |
Title:
|
CAPACITORS HAVING VERTICAL CONTACTS EXTENDING THROUGH CONDUCTIVE TIERS
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|
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Patent #:
|
|
Issue Dt:
|
07/09/2019
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Application #:
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15689747
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Filing Dt:
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08/29/2017
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Publication #:
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|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
READ VOLTAGE CALIBRATION BASED ON HOST IO OPERATIONS
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|
|
Patent #:
|
|
Issue Dt:
|
12/11/2018
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Application #:
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15689922
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Filing Dt:
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08/29/2017
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Publication #:
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Pub Dt:
|
03/22/2018
| | | | |
Title:
|
COMPENSATION FOR THRESHOLD VOLTAGE VARIATION OF MEMORY CELL COMPONENTS
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|
|
Patent #:
|
|
Issue Dt:
|
11/06/2018
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Application #:
|
15689940
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Filing Dt:
|
08/29/2017
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Publication #:
|
|
Pub Dt:
|
03/08/2018
| | | | |
Title:
|
REDUNDANCY ARRAY COLUMN DECODER FOR MEMORY
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|
|
Patent #:
|
|
Issue Dt:
|
09/04/2018
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Application #:
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15689955
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Filing Dt:
|
08/29/2017
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Publication #:
|
|
Pub Dt:
|
12/14/2017
| | | | |
Title:
|
INFERRING THRESHOLD VOLTAGE DISTRIBUTIONS ASSOCIATED WITH MEMORY CELLS VIA INTERPOLATION
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|
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Patent #:
|
|
Issue Dt:
|
07/09/2019
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Application #:
|
15689989
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Filing Dt:
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08/29/2017
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Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
REFLOW PROTECTION
|
|
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Patent #:
|
|
Issue Dt:
|
07/03/2018
|
Application #:
|
15690013
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Filing Dt:
|
08/29/2017
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Publication #:
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|
Pub Dt:
|
12/14/2017
| | | | |
Title:
|
SEMICONDUCTOR DEVICES WITH MAGNETIC AND ATTRACTER MATERIALS AND METHODS OF FABRICATION
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|
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Patent #:
|
|
Issue Dt:
|
11/03/2020
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Application #:
|
15690081
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Filing Dt:
|
08/29/2017
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Publication #:
|
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Pub Dt:
|
01/04/2018
| | | | |
Title:
|
SOLID STATE TRANSDUCER DEVICES WITH SEPARATELY CONTROLLED REGIONS, AND ASSOCIATED SYSTEMS AND METHODS
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|
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Patent #:
|
|
Issue Dt:
|
11/06/2018
|
Application #:
|
15690085
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Filing Dt:
|
08/29/2017
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Publication #:
|
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Pub Dt:
|
12/14/2017
| | | | |
Title:
|
APPARATUSES AND METHODS FOR TIMING DOMAIN CROSSING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2019
|
Application #:
|
15690200
|
Filing Dt:
|
08/29/2017
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Publication #:
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Pub Dt:
|
02/28/2019
| | | | |
Title:
|
Integrated Assemblies Having Structures Along a First Pitch Coupled with Structures Along a Second Pitch Different from the First Pitch, and Methods of Forming Integrated Assemblies
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2019
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Application #:
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15690209
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Filing Dt:
|
08/29/2017
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Publication #:
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Pub Dt:
|
02/28/2019
| | | | |
Title:
|
Integrated Assemblies Having Structures Along a First Pitch Coupled with Structures Along a Second Pitch Different from the First Pitch, and Methods of Forming Integrated Assemblies
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2019
|
Application #:
|
15690320
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
MEMORY DEVICES HAVING DISTRIBUTED CONTROLLER SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2018
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Application #:
|
15690359
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Filing Dt:
|
08/30/2017
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Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
MEMORY AS A PROGRAMMABLE LOGIC DEVICE
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
15690442
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
CACHE BUFFER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/26/2019
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Application #:
|
15690497
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/22/2018
| | | | |
Title:
|
SEGMENTED MEMORY AND OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/2021
|
Application #:
|
15690503
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
CACHE LINE DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2019
|
Application #:
|
15690708
|
Filing Dt:
|
08/30/2017
|
Title:
|
INCREASED NAND PERFORMANCE UNDER HIGH THERMAL CONDITIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2019
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Application #:
|
15690744
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
MEMORY PROGRAMMING METHODS AND MEMORY SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/2019
|
Application #:
|
15690800
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
METHODS OF OPERATING A MEMORY SYSTEM INCLUDING DATA COLLECTION AND COMPRESSION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2018
|
Application #:
|
15690862
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
BOOSTING CHANNELS OF MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2020
|
Application #:
|
15690869
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
SLC CACHE MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2018
|
Application #:
|
15690873
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
FERROELECTRIC MEMORY CELL SENSING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2021
|
Application #:
|
15690889
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
LOG DATA STORAGE FOR FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/18/2018
|
Application #:
|
15690895
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
08/16/2018
| | | | |
Title:
|
ACTIVE BOUNDARY QUILT ARCHITECTURE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2019
|
Application #:
|
15690903
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
FLASH MEMORY BLOCK RETIREMENT POLICY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2019
|
Application #:
|
15690920
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
NAND TEMPERATURE DATA MANAGEMENT
|
|