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Patent #:
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Issue Dt:
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10/26/2004
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Application #:
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10339536
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Filing Dt:
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01/08/2003
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Title:
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METHOD AND SYSTEM FOR TESTING TUNNEL OXIDE ON A MEMORY-RELATED STRUCTURE
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Patent #:
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Issue Dt:
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04/26/2005
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10341881
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Filing Dt:
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01/14/2003
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Title:
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MEMORY DEVICE HAVING A P+ GATE AND THIN BOTTOM OXIDE AND METHOD OF ERASING SAME
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Issue Dt:
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09/28/2004
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10342032
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Filing Dt:
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01/14/2003
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Title:
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FLASH MEMORY DEVICES WITH OXYNITRIDE DIELECTRIC AS THE CHARGE STORAGE MEDIA
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Patent #:
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Issue Dt:
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12/19/2006
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10342549
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Filing Dt:
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01/15/2003
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Title:
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DIELECTRIC MEMORY CELL STRUCTURE WITH COUNTER DOPED CHANNEL REGION
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05/17/2005
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10342585
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Filing Dt:
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01/14/2003
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Title:
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FLASH MEMORY CELL PROGRAMMING METHOD AND SYSTEM
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Patent #:
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Issue Dt:
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06/08/2004
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10348732
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01/21/2003
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Title:
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MEMORY CIRCUIT ARRANGEMENT FOR PROGRAMMING A MEMORY CELL
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11/04/2003
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10349293
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01/21/2003
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Title:
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METHOD FOR IMPROVING READ MARGIN IN A FLASH MEMORY DEVICE
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07/04/2006
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10350472
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01/23/2003
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Title:
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STRUCTURE AND METHOD FOR REDUCING STANDING WAVES IN A PHOTORESIST
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07/27/2004
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10352658
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01/28/2003
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Title:
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NOVEL NON-VOLATILE MEMORY CELL AND METHOD OF PROGRAMMING FOR IMPROVED DATA RETENTION
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08/03/2004
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10353558
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Filing Dt:
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01/29/2003
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Title:
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METHOD FOR READING A NON-VOLATILE MEMORY CELL ADJACENT TO AN INACTIVE REGION OF A NON-VOLATILE MEMORY CELL ARRAY
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10/28/2003
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10356495
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02/03/2003
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Pub Dt:
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08/28/2003
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE PROGRAMMING SECOND DYNAMIC REFERENCE CELL ACCORDING TO THRESHOLD VALUE OF FIRST DYNAMIC REFERENCE CELL
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07/20/2004
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10356496
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02/03/2003
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Pub Dt:
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06/26/2003
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Title:
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NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF READING OUT DATA
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05/11/2004
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10357879
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02/04/2003
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Title:
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METHOD OF IMPROVING DYNAMIC REFERENCE TRACKING FOR FLASH MEMORY UNIT
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05/03/2005
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10358498
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02/04/2003
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Title:
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COMPENSATED OSCILLATOR CIRCUIT FOR CHARGE PUMPS
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Issue Dt:
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04/25/2006
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10358586
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02/05/2003
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Title:
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ONO FABRICATION PROCESS FOR INCREASING OXYGEN CONTENT AT BOTTOM OXIDE-SUBSTRATE INTERFACE IN FLASH MEMORY DEVICES
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09/14/2004
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10358587
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02/05/2003
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Title:
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METHODS OF CONTROLLING VSS IMPLANTS ON MEMORY DEVICES, AND SYSTEM FOR PERFORMING SAME
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08/10/2004
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10358589
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02/05/2003
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08/05/2004
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Title:
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UV-BLOCKING LAYER FOR REDUCING UV-INDUCED CHARGING OF SONOS DUAL-BIT FLASH MEMORY DEVICES IN BEOL PROCESSING
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10/11/2005
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10358756
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02/05/2003
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Title:
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REDUCED SILICON GOUGING AND COMMON SOURCE LINE RESISTANCE IN SEMICONDUCTOR DEVICES
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04/20/2004
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10358866
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02/05/2003
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Title:
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PERFORMANCE IN FLASH MEMORY DEVICES
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09/27/2005
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10359872
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02/07/2003
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Title:
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METHOD OF FORMATION OF SEMICONDUCTOR RESISTANT TO HOT CARRIER INJECTION STRESS
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07/27/2004
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10361378
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02/10/2003
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Title:
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SELECTION CIRCUIT FOR ACCURATE MEMORY READ OPERATIONS
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12/30/2003
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10361455
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02/10/2003
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Title:
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METHOD FOR FABRICATING DEVICES IN CORE AND PERIPHERY SEMICONDUCTOR REGIONS USING DUAL SPACERS
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07/27/2004
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10364569
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02/10/2003
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Title:
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STRUCTURE AND METHOD FOR SUPPRESSING OXIDE ENCROACHMENT IN A FLOATING GATE MEMORY CELL
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10/10/2006
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10368696
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02/19/2003
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Title:
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PROTECTION OF CHARGE TRAPPING DIELECTRIC FLASH MEMORY DEVICES FROM UV-INDUCED CHARGING IN BEOL PROCESSING
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Patent #:
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03/29/2005
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10378885
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03/05/2003
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Title:
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IMPLANT DAMAGE REMOVAL BY LASER THERMAL ANNEALING
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05/17/2005
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10379744
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03/05/2003
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Title:
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FAST BANDGAP REFERENCE CIRCUIT FOR USE IN A LOW POWER SUPPLY A/D BOOSTER
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Patent #:
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Issue Dt:
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08/24/2004
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10379885
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03/05/2003
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Title:
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METHOD OF PROGRAMMING A MEMORY CELL
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Patent #:
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09/21/2004
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10382726
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03/05/2003
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Pub Dt:
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09/09/2004
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Title:
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CHARGE-TRAPPING MEMORY ARRAYS RESISTANT TO DAMAGE FROM CONTACT HOLE FORMATION
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Patent #:
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06/01/2004
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10382731
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03/05/2003
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Title:
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MEMORY ARRAY HAVING SHALLOW BIT LINE WITH SILICIDE CONTACT PORTION AND METHOD OF FORMATION
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08/24/2004
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10382744
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03/05/2003
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Title:
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METHOD OF FORMING CORE AND PERIPHERY GATES INCLUDING TWO CRITICAL MASKING STEPS TO FORM A HARD MASK IN A CORE REGION THAT INCLUDES A CRITICAL DIMENSION LESS THAN ACHIEVABLE AT A RESOLUTION LIMIT OF LITHOGRAPHY
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07/04/2006
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10384856
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03/10/2003
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Title:
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METHOD AND SYSTEM FOR APPLYING TESTING VOLTAGE SIGNAL
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07/20/2004
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10384936
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03/10/2003
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Title:
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METHOD AND SYSTEM FOR DETECTING DEFECTIVE MATERIAL SURROUNDING FLASH MEMORY CELLS
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12/02/2003
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10385375
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03/10/2003
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Title:
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SPIN ON POLYMERS FOR ORGANIC MEMORY DEVICES
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06/28/2005
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10387064
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03/11/2003
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Pub Dt:
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09/16/2004
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
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04/11/2006
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10387427
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03/14/2003
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Pub Dt:
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10/23/2003
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Title:
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NON-VOLATILE SEMICONDUCTOR MEMORY AND METHOD OF MANUFACTURING THE SAME
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06/01/2004
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10387617
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03/13/2003
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Title:
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CIRCUIT FOR FAST AND ACCURATE MEMORY READ OPERATIONS
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08/30/2005
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10387774
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03/12/2003
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MEMORY DEVICE HAVING REVERSE LDD
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11/16/2004
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10389149
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03/13/2003
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APPARATUS AND METHOD FOR A SENSE AMPLIFIER CIRCUIT THAT SAMPLES AND HOLDS A REFERENCE VOLTAGE
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07/05/2005
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10392912
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03/21/2003
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09/25/2003
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Title:
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NON-VOLATILE SEMICONDUCTOR MEMORY THAT IS BASED ON A VIRTUAL GROUND METHOD
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12/23/2003
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10394565
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03/21/2003
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ALIGNMENT SYSTEM FOR PLANAR CHARGE TRAPPING DIELECTRIC MEMORY CELL LITHOGRAPHY
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11/29/2005
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10404081
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04/02/2003
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10/23/2003
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SEMICONDUCTOR DEVICE LOW TEMPERATURE TEST APPARATUS USING ELECTRONIC COOLING ELEMENT
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11/30/2004
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10405272
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04/02/2003
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PHOTOSENSITIVE POLYMERIC MEMORY ELEMENTS
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03/27/2007
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10406130
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04/03/2003
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BMC-HOSTED REAL-TIME CLOCK AND NON-VOLATILE RAM REPLACEMENT
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09/28/2004
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10406415
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04/03/2003
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10/07/2004
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FAST, ACCURATE AND LOW POWER SUPPLY VOLTAGE BOOSTER USING A/D CONVERTER
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07/18/2006
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10407999
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04/03/2003
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MEMORY DEVICE HAVING IMPROVED PERIPHERY AND CORE ISOLATION
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10/18/2005
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10413800
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04/15/2003
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Pub Dt:
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10/21/2004
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Title:
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METHOD OF PROGRAMMING DUAL CELL MEMORY DEVICE TO STORE MULTIPLE DATA STATES PER CELL
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02/22/2005
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10413818
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04/15/2003
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Pub Dt:
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09/18/2003
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MEMORY DEVICE WITH ACTIVE AND PASSIVE LAYERS
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07/27/2004
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10413829
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04/15/2003
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09/25/2003
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MEMORY DEVICE
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01/04/2005
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10413841
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04/15/2003
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02/12/2004
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MEMORY DEVICE WITH ACTIVE PASSIVE LAYERS
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03/08/2005
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10414353
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04/15/2003
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Pub Dt:
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09/25/2003
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Title:
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MEMORY DEVICE
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11/23/2004
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10422090
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04/24/2003
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METHOD OF CONTROLLING PROGRAM THRESHOLD VOLTAGE DISTRIBUTION OF A DUAL CELL MEMORY DEVICE
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08/17/2004
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10422092
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04/24/2003
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METHOD OF DUAL CELL MEMORY DEVICE OPERATION FOR IMPROVED END-OF-LIFE READ MARGIN
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07/27/2004
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10422276
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04/24/2003
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METHOD OF PROGRAMMING AND READING A DUAL CELL MEMORY DEVICE
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08/10/2004
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10422489
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04/24/2003
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METHOD OF PROGRAMMING A DUAL CELL MEMORY DEVICE
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03/01/2005
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10429140
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05/03/2003
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STRUCTURE AND METHOD FOR A TWO-BIT MEMORY CELL
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08/10/2004
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10429150
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05/03/2003
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Title:
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METHOD FOR REDUCING SHORT CHANNEL EFFECTS IN MEMORY CELLS AND RELATED STRUCTURE
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05/25/2004
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10429447
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05/05/2003
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PROCESS FOR REDUCING HYDROGEN CONTAMINATION IN DIELECTRIC MATERIALS IN MEMORY DEVICES
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01/16/2007
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10430471
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05/06/2003
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METHOD OF FORMATION OF GATE STACK SPACER AND CHARGE STORAGE MATERIALS HAVING REDUCED HYDROGEN CONTENT IN CHARGE TRAPPING DIELECTRIC FLASH MEMORY DEVICE
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06/22/2004
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10430582
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05/06/2003
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TRENCH SIDE WALL CHARGE TRAPPING DIELECTRIC FLASH MEMORY DEVICE
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03/15/2005
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10430604
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05/06/2003
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MEMORY DEVICE WITH REDUCED OPERATING VOLTAGE HAVING DIELECTRIC STACK
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09/13/2005
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10431065
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05/06/2003
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METHOD TO OBTAIN TEMPERATURE INDEPENDENT PROGRAM THRESHOLD VOLTAGE DISTRIBUTION USING TEMPERATURE DEPENDENT VOLTAGE REFERENCE
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09/14/2004
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10431320
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05/06/2003
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NON-VOLATILE MEMORY READ CIRCUIT WITH END OF LIFE SIMULATION
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06/19/2007
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10431321
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05/06/2003
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A METHOD FOR MANUFACTURING A DOUBLE BITLINE IMPLANT
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04/12/2005
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10431322
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05/06/2003
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Title:
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METHOD AND SYSTEM FOR IMPROVING SHORT CHANNEL EFFECT ON A FLOATING GATE DEVICE
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11/01/2005
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10436786
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05/13/2003
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Pub Dt:
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11/18/2004
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Title:
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ERASING AND PROGRAMMING AN ORGANIC MEMORY DEVICE AND METHOD OF FABRICATING
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09/06/2005
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10437896
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05/15/2003
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11/27/2003
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NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THEREOF
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02/21/2006
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10438942
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05/16/2003
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LASER THERMAL ANNEALING METHODS FOR FLASH MEMORY DEVICES
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12/20/2005
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10452877
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06/02/2003
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Pub Dt:
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12/02/2004
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Title:
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PLANAR POLYMER MEMORY DEVICE
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07/12/2005
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10454517
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06/05/2003
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SEMICONDUTOR DEVICE HAVING CONDUCTIVE STRUCTURES FORMED NEAR A GATE ELECTRODE
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09/07/2004
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10454630
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06/05/2003
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Pub Dt:
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11/06/2003
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Title:
|
NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND DATA ERASING METHOD
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Patent #:
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Issue Dt:
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01/04/2005
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Application #:
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10455310
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Filing Dt:
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06/06/2003
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Publication #:
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Pub Dt:
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12/09/2004
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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03/01/2005
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Application #:
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10459102
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Filing Dt:
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06/11/2003
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Title:
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MEMORY DEVICE HAVING A THIN TOP DIELECTRIC AND METHOD OF ERASING SAME
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Patent #:
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Issue Dt:
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11/08/2005
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Application #:
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10459576
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Filing Dt:
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06/12/2003
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Publication #:
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Pub Dt:
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12/16/2004
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Title:
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NON-VOLATILE MEMORY DEVICE
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Patent #:
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Issue Dt:
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05/17/2005
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Application #:
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10460278
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Filing Dt:
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06/12/2003
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Title:
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STRUCTURE AND METHOD FOR PREVENTING UV RADIATION DAMAGE IN A MEMORY CELL AND IMPROVING CONTACT CD CONTROL
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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10460279
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Filing Dt:
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06/12/2003
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Title:
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STRUCTURE AND METHOD FOR PREVENTING UV RADIATION DAMAGE AND INCREASING DATA RETENTION IN MEMORY CELLS
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Patent #:
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Issue Dt:
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12/21/2004
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Application #:
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10460282
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Filing Dt:
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06/12/2003
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Title:
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STRUCTURE AND METHOD FOR PREVENTING PROCESS-INDUCED UV RADIATION DAMAGE IN A MEMORY CELL
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Patent #:
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Issue Dt:
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02/15/2005
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Application #:
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10463643
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Filing Dt:
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06/17/2003
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Title:
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METHOD OF FABRICATING A PLANAR STRUCTURE CHARGE TRAPPING MEMORY CELL ARRAY WITH RECTANGULAR GATES AND REDUCED BIT LINE RESISTANCE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10475997
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Filing Dt:
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04/14/2004
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Publication #:
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Pub Dt:
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09/09/2004
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Title:
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Remote maintenance system and remote maintenance method for semiconductor manufacturing apparatus
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10544902
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Filing Dt:
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05/11/2006
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Publication #:
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Pub Dt:
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07/12/2007
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Title:
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Radiation-sensitive resin composition, process for producing the same and process for producing semiconductor device therewith
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Patent #:
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Issue Dt:
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01/29/2008
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Application #:
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10600065
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Filing Dt:
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06/20/2003
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Publication #:
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Pub Dt:
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12/23/2004
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Title:
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MEMORY WITH A CORE-BASED VIRTUAL GROUND AND DYNAMIC REFERENCE SENSING SCHEME
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Patent #:
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Issue Dt:
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10/18/2005
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Application #:
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10603136
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Filing Dt:
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06/23/2003
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Title:
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SIMULTANEOUS EXECUTION COMMAND MODES IN A FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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03/27/2007
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Application #:
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10614177
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Filing Dt:
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07/08/2003
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Title:
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FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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10614397
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Filing Dt:
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07/07/2003
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Title:
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POLYMER MEMORY DEVICE FORMED IN VIA OPENING
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Patent #:
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Issue Dt:
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10/12/2004
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Application #:
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10614484
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Filing Dt:
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07/07/2003
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Title:
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SILICON CONTAINING MATERIAL FOR PATTERNING POLYMERIC MEMORY ELEMENT
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Patent #:
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Issue Dt:
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09/06/2005
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Application #:
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10616804
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Filing Dt:
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07/09/2003
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Title:
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METHOD FOR FABRICATING A FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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10617450
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Filing Dt:
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07/11/2003
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Publication #:
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Pub Dt:
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01/13/2005
| | | | |
Title:
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UNDOPED OXIDE LINER/BPSG FOR IMPROVED DATA RETENTION
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Patent #:
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Issue Dt:
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06/13/2006
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Application #:
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10617451
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Filing Dt:
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07/11/2003
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Publication #:
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Pub Dt:
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01/13/2005
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Title:
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PECVD SILICON-RICH OXIDE LAYER FOR REDUCED UV CHARGING
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Patent #:
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Issue Dt:
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08/30/2005
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Application #:
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10617971
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Filing Dt:
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07/10/2003
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Title:
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PROGRAMMING OF A FLASH MEMORY CELL
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Patent #:
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Issue Dt:
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07/18/2006
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Application #:
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10618156
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Filing Dt:
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07/11/2003
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Title:
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MEMORY STRUCTURE HAVING TUNABLE INTERLAYER DIELECTRIC AND METHOD FOR FABRICATING SAME
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Patent #:
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Issue Dt:
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05/24/2005
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Application #:
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10618191
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Filing Dt:
|
07/10/2003
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Title:
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FLASH MEMORY CELL HAVING REDUCED LEAKAGE CURRENT
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Patent #:
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|
Issue Dt:
|
09/06/2005
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Application #:
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10618514
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Filing Dt:
|
07/11/2003
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Title:
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METHOD OF FABRICATING SEMICONDUCTOR DEVICE HAVING TRIPLE LDD STRUCTURE AND LOWER GATE RESISTANCE FORMED WITH A SINGLE IMPLANT PROCESS
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Patent #:
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Issue Dt:
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12/28/2004
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Application #:
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10619797
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Filing Dt:
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07/14/2003
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Title:
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PARTIALLY DE-COUPLED CORE AND PERIPHERY GATE MODULE PROCESS
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Patent #:
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Issue Dt:
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03/01/2005
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Application #:
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10631199
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Filing Dt:
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07/31/2003
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Publication #:
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Pub Dt:
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02/05/2004
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Title:
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FULLY ISOLATED DIELECTRIC MEMORY CELL STRUCTURE FOR A DUAL BIT NITRIDE STORAGE DEVICE AND PROCESS FOR MAKING SAME
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Patent #:
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Issue Dt:
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08/23/2005
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Application #:
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10631812
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Filing Dt:
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08/01/2003
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Publication #:
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Pub Dt:
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02/12/2004
| | | | |
Title:
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NONVOLATILE MEMORY HAVING A TRAP LAYER
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|
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Patent #:
|
|
Issue Dt:
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03/14/2006
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Application #:
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10631856
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Filing Dt:
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08/01/2003
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Publication #:
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Pub Dt:
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04/01/2004
| | | | |
Title:
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE SUPPLYING PROPER PROGRAM POTENTIAL
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|
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Patent #:
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|
Issue Dt:
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06/13/2006
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Application #:
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10633535
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Filing Dt:
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08/05/2003
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Publication #:
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Pub Dt:
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03/18/2004
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING A PLURALITY OF BLOCKS AND A SENSING CIRCUIT PROVIDED IN EACH OF THE BLOCKS FOR
COMPARING DATA WITH A REFERENCE SIGNAL HAVING A LOAD IMPOSED
THEREON
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|
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Patent #:
|
|
Issue Dt:
|
10/25/2005
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Application #:
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10634042
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Filing Dt:
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08/04/2003
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Title:
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A METHOD OF FABRICATING A DUAL-LEVEL STACKED FLASH MEMORY CELL WITH A MOSFET STORAGE TRANSISTOR
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Patent #:
|
|
Issue Dt:
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06/13/2006
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Application #:
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10635089
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Filing Dt:
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08/06/2003
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Title:
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MEMORY DEVICE AND METHOD OF SIMULTANEOUS FABRICATION OF CORE AND PERIPHERY OF SAME
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|
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Patent #:
|
|
Issue Dt:
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07/25/2006
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Application #:
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10635431
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Filing Dt:
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08/07/2003
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Publication #:
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|
Pub Dt:
|
02/12/2004
| | | | |
Title:
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CONTROL METHOD OF SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE
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|
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Patent #:
|
|
Issue Dt:
|
01/17/2006
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Application #:
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10635781
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Filing Dt:
|
08/06/2003
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Title:
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MEMORY DEVICE HAVING SILICIDED BITLINES AND METHOD OF FORMING THE SAME
|
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