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09/12/2006
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11033941
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01/12/2005
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Title:
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MEMORY CELL CONTAINING COPOLYMER CONTAINING DIARYLACETYLENE PORTION
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09/25/2007
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11034071
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01/12/2005
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VARIABLE DENSITY AND VARIABLE PERSISTENT ORGANIC MEMORY DEVICES, METHODS, AND FABRICATION
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06/19/2007
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11034154
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01/12/2005
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Title:
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METHODS INVOLVING SPIN-ON POLYMERS THAT REVERSIBLY BIND CHARGE CARRIERS
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10/31/2006
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11034642
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01/13/2005
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07/13/2006
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Title:
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MULTI-LEVEL ONO FLASH PROGRAM ALGORITHM FOR THRESHOLD WIDTH CONTROL
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11/13/2007
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11035188
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01/13/2005
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METHOD FOR CONTROLLING POLY 1 THICKNESS AND UNIFORMITY IN A MEMORY ARRAY FABRICATION PROCESS
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04/17/2007
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11037477
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01/18/2005
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METHODS AND SYSTEMS FOR HIGH WRITE PERFORMANCE IN MULTI-BIT FLASH MEMORY DEVICES
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10/16/2007
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11041608
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01/24/2005
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07/27/2006
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AUTOMATED TESTS FOR BUILT-IN SELF TEST
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11/28/2006
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11045694
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01/27/2005
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BURIED WORD LINE MEMORY INTEGRATED CIRCUIT SYSTEM
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05/27/2008
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11052688
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02/07/2005
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08/10/2006
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MEMORY ELEMENT USING ACTIVE LAYER OF BLENDED MATERIALS
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12/26/2006
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11052689
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02/07/2005
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08/10/2006
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MEMORY DEVICE INCLUDING BARRIER LAYER FOR IMPROVED SWITCHING SPEED AND DATA RETENTION
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07/25/2006
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11057143
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02/15/2005
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06/23/2005
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VOLTAGE DETECTION CIRCUIT, SEMICONDUCTOR DEVICE, METHOD FOR CONTROLLING VOLTAGE DETECTION CIRCUIT
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05/16/2006
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11061119
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02/18/2005
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08/25/2005
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CURRENT-VOLTAGE CONVERTER CIRCUIT AND ITS CONTROL METHOD
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06/27/2006
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11061307
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02/18/2005
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08/25/2005
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SEMICONDUCTOR MEMORY STORAGE DEVICE AND A REDUNDANCY CONTROL METHOD THEREFOR
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06/13/2006
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11061365
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02/18/2005
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08/25/2005
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SEMICONDUCTOR MEMORY STORAGE DEVICE AND ITS REDUNDANT METHOD
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01/22/2008
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11062629
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02/23/2005
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SYSTEM AND METHOD FOR GATE FORMATION IN A SEMICONDUCTOR DEVICE
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01/23/2007
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11062641
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02/23/2005
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SYSTEM AND METHOD FOR ERASING A MEMORY CELL
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05/01/2007
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11062662
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02/23/2005
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06/30/2005
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NON-VOLATILE MEMORY AND WRITE METHOD OF THE SAME
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12/11/2007
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11063138
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02/22/2005
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MEMORY CELL AND METHOD OF MAKING THE MEMORY CELL
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07/03/2007
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11063560
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02/24/2005
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NON-VOLATILE MEMORY DEVICE WITH INCREASED RELIABILITY
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12/26/2006
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11064054
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02/22/2005
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03/16/2006
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SEMICONDUCTOR MEMORY STORAGE DEVICE AND ITS CONTROL METHOD
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08/07/2007
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11065305
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02/25/2005
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10/13/2005
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SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
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NONE
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11065306
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02/25/2005
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09/29/2005
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Semiconductor storage device and manufacturing method thereof
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NONE
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11065307
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02/25/2005
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09/29/2005
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Semiconductor device and method of manufacturing the same
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12/18/2007
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11065388
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02/24/2005
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Title:
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MEMORY DEVICE HAVING A NANOCRYSTAL CHARGE STORAGE REGION AND METHOD
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09/12/2006
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11066484
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02/28/2005
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06/30/2005
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Title:
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SEMICONDUCTOR MEMORY DEVICE AND METHOD OF READING DATA FROM SEMICONDUCTOR MEMORY DEVICE
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04/10/2007
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11066567
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02/28/2005
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10/20/2005
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Title:
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SEMICONDUCTOR MEMORY DEVICE
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03/18/2008
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11069181
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03/01/2005
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METHOD FOR PATTERNING ELECTRICALLY CONDUCTING POLY(PHENYL ACETYLENE) AND POLY(DIPHENYL ACETYLENE)
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10/24/2006
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11076252
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03/08/2005
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09/14/2006
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DECODER FOR MEMORY DEVICE
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09/25/2012
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11078873
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03/11/2005
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09/14/2006
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MEMORY DEVICE WITH IMPROVED SWITCHING SPEED AND DATA RETENTION
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02/03/2009
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11083016
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03/18/2005
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07/28/2005
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Title:
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FLASH MEMORY AND METHOD FOR CONTROLLING THE MEMORY
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02/20/2007
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11085496
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03/22/2005
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07/28/2005
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE WITH A PLURALITY OF SECTORS
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02/17/2009
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11086310
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03/23/2005
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09/28/2006
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HIGH K STACK FOR NON-VOLATILE MEMORY
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12/05/2006
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11086884
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03/22/2005
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09/28/2006
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TEMPERATURE COMPENSATION OF THIN FILM DIODE VOLTAGE THRESHOLD IN MEMORY SENSING CIRCUIT
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08/25/2009
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11087000
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03/22/2005
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09/28/2006
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VARIABLE BREAKDOWN CHARACTERISTIC DIODE
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10/09/2007
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11087735
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03/24/2005
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02/09/2006
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE THAT ERASES STORED DATA AFTER A PREDETERMINED TIME PERIOD WITHOUT THE USE OF A TIMER CIRCUIT
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03/27/2007
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11087793
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03/23/2005
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Title:
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ALUMINUM OXIDE AS LINER OR COVER LAYER TO SPACERS IN MEMORY DEVICE
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08/29/2006
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11087944
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03/23/2005
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CURRENT SENSING CIRCUIT WITH A CURRENT-COMPENSATED DRAIN VOLTAGE REGULATION
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12/11/2007
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11089707
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03/25/2005
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MEMORY DEVICE WITH IMPROVED DATA RETENTION
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11/09/2010
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11089708
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03/25/2005
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09/28/2006
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MEMORY DEVICE WITH IMPROVED DATA RETENTION
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01/02/2007
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11090716
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03/25/2005
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09/29/2005
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SEMICONDUCTOR DEVICE AND METHOD FOR WRITING DATA INTO THE SEMICONDUCTOR DEVICE
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09/26/2006
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11091982
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03/29/2005
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Title:
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QUAD BIT USING HOT-HOLE ERASE FOR CBD CONTROL
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01/17/2012
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11095849
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03/31/2005
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10/05/2006
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METHOD OF PROVIDING AN ERASE ACTIVATION ENERGY OF A MEMEORY DEVICE
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12/11/2007
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11099339
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04/04/2005
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10/05/2006
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NON-CRITICAL COMPLEMENTARY MASKING METHOD FOR POLY-1 DEFINITION IN FLASH MEMORY DEVICE FABRICATION
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03/18/2008
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11099847
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04/06/2005
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SPIN ON MEMORY CELL ACTIVE LAYER DOPED WITH METAL IONS
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03/11/2008
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11100563
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04/07/2005
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Title:
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DISPOSABLE HARD MASK FOR FORMING BIT LINES
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12/25/2007
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11101783
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04/07/2005
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10/12/2006
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SPLIT GATE MULTI-BIT MEMORY CELL
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01/29/2008
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11102004
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04/08/2005
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ETCH-BACK PROCESS FOR CAPPING A POLYMER MEMORY DEVICE
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NONE
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11103960
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04/12/2005
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10/27/2005
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Sector protection circuit for non-volatile semiconductor memory, sector protection method and non-volatile semiconductor memory
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05/15/2007
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11109964
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04/19/2005
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METHOD FOR MANUFACTURING A SEMICONDUCTOR COMPONENT THAT INHIBITS FORMATION OF WORMHOLES
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04/01/2008
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11110220
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04/20/2005
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10/26/2006
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NON-VOLATILE SEMICONDUCTOR DEVICE AND METHOD FOR AUTOMATICALLY RECOVERING ERASE FAILURE IN THE DEVICE
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04/08/2008
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11112607
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04/22/2005
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METHOD FOR FORMING MEMORY ARRAY BITLINES COMPRISING EPITAXIALLY GROWN SILICON AND RELATED STRUCTURE
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08/19/2008
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11112884
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04/22/2005
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Title:
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MEMORY CELL HAVING COMBINATION RAISED SOURCE AND DRAIN AND METHOD OF FABRICATING SAME
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06/19/2007
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11113507
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04/25/2005
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Title:
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RADICAL OXIDATION FOR BITLINE OXIDE OF SONOS
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07/03/2007
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11113508
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04/25/2005
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10/26/2006
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Title:
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FORMATION METHOD OF AN ARRAY SOURCE LINE IN NAND FLASH MEMORY
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12/04/2007
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11113509
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04/25/2005
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10/26/2006
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SELF-ALIGNED STI SONOS
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02/26/2008
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11116538
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04/27/2005
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METHOD FOR MANUFACTURING A MEMORY DEVICE HAVING A NANOCRYSTAL CHARGE STORAGE REGION
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05/27/2008
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11116551
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04/27/2005
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METHOD FOR MANUFACTURING A MEMORY DEVICE HAVING A NANOCRYSTAL CHARGE STORAGE REGION
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01/16/2007
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11116571
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04/27/2005
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11/02/2006
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MULTI-CHIP MODULE AND METHOD OF MANUFACTURE
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08/01/2006
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11120690
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05/02/2005
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A SEMICONDUCTOR DEVICE HAVING TRIPLE LDD STRUCTURE AND LOWER GATE RESISTANCE FORMED WITH A SINGLE IMPLANT PROCESS
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11/19/2013
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11125396
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05/04/2005
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11/09/2006
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Multi-chip module having a support structure and method of manufacture
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04/17/2007
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11126558
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05/11/2005
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12/15/2005
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SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD
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09/26/2006
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11126701
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05/11/2005
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11/17/2005
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NON-VOLATILE SEMICONDUCTOR MEMORY, SEMICONDUCTOR DEVICE AND CHARGE PUMP CIRCUIT
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05/22/2007
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11126738
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05/11/2005
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11/17/2005
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SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD
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10/23/2007
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11126739
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05/11/2005
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12/08/2005
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CARRIER FOR STACKED TYPE SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
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NONE
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11126800
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05/11/2005
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11/16/2006
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Resistive memory device with improved data retention and reduced power
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Issue Dt:
|
05/29/2007
|
Application #:
|
11126869
|
Filing Dt:
|
05/11/2005
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD HAVING DATA PROTECTION FEATURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2007
|
Application #:
|
11127175
|
Filing Dt:
|
05/12/2005
|
Title:
|
POLYMER SPACERS FOR CREATING SUB-LITHOGRAPHIC SPACES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11127712
|
Filing Dt:
|
05/12/2005
|
Publication #:
|
|
Pub Dt:
|
11/17/2005
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2008
|
Application #:
|
11127713
|
Filing Dt:
|
05/12/2005
|
Publication #:
|
|
Pub Dt:
|
11/17/2005
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND ITS CONTROL METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2009
|
Application #:
|
11128391
|
Filing Dt:
|
05/13/2005
|
Title:
|
AGGRESSIVE CLEANING PROCESS FOR SEMICONDUCTOR DEVICE CONTACT FORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/2016
|
Application #:
|
11133966
|
Filing Dt:
|
05/20/2005
|
Publication #:
|
|
Pub Dt:
|
12/01/2005
| | | | |
Title:
|
METHOD OF FABRICATING A SEMICONDUCTOR DEVICE USED IN A STACKED-TYPE SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2007
|
Application #:
|
11135231
|
Filing Dt:
|
05/23/2005
|
Title:
|
FLEXIBLE LATENCY IN FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2007
|
Application #:
|
11135492
|
Filing Dt:
|
05/24/2005
|
Title:
|
INTERFACE LAYER BETWEEN DUAL POLYCRYSTALLINE SILICON LAYERS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/05/2008
|
Application #:
|
11135925
|
Filing Dt:
|
05/24/2005
|
Title:
|
FAST WIDE OUTPUT RANGE CMOS VOLTAGE REFERENCE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11136981
|
Filing Dt:
|
05/25/2005
|
Publication #:
|
|
Pub Dt:
|
11/30/2006
| | | | |
Title:
|
Read-only memory array with dielectric breakdown programmability
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2007
|
Application #:
|
11139227
|
Filing Dt:
|
05/27/2005
|
Publication #:
|
|
Pub Dt:
|
11/30/2006
| | | | |
Title:
|
PAGE BUFFER ARCHITECTURE FOR PROGRAMMING, ERASING AND READING NANOSCALE RESISTIVE MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
11146126
|
Filing Dt:
|
06/07/2005
|
Title:
|
SYSTEM AND METHOD FOR REDUCING PROCESS-INDUCED CHARGING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
11146690
|
Filing Dt:
|
06/07/2005
|
Publication #:
|
|
Pub Dt:
|
12/07/2006
| | | | |
Title:
|
METHOD OF PROGRAMMING A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2007
|
Application #:
|
11147207
|
Filing Dt:
|
06/08/2005
|
Title:
|
SYSTEM AND METHOD FOR GATE FORMATION IN A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2007
|
Application #:
|
11147208
|
Filing Dt:
|
06/08/2005
|
Title:
|
INTERLAYER DIELECTRIC FOR CHARGE LOSS IMPROVEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2011
|
Application #:
|
11152375
|
Filing Dt:
|
06/15/2005
|
Publication #:
|
|
Pub Dt:
|
03/08/2007
| | | | |
Title:
|
JUNCTION LEAKAGE SUPPRESSION IN MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/18/2007
|
Application #:
|
11152547
|
Filing Dt:
|
06/14/2005
|
Publication #:
|
|
Pub Dt:
|
12/14/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2008
|
Application #:
|
11154070
|
Filing Dt:
|
06/16/2005
|
Publication #:
|
|
Pub Dt:
|
10/20/2005
| | | | |
Title:
|
DUAL-LEVEL STACKED FLASH MEMORY CELL WITH A MOSFET STORAGE TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2007
|
Application #:
|
11155510
|
Filing Dt:
|
06/20/2005
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
SEMICONDUCTOR STORAGE DEVICE AND METHOD OF SELECTING BIT LINE OF THE SEMICONDUCTOR STORAGE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2009
|
Application #:
|
11155707
|
Filing Dt:
|
06/16/2005
|
Publication #:
|
|
Pub Dt:
|
12/21/2006
| | | | |
Title:
|
METHOD AND SYSTEM FOR FORMING STRAIGHT WORD LINES IN A FLASH MEMORY ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2007
|
Application #:
|
11158509
|
Filing Dt:
|
06/22/2005
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
AUTOMATIC RESOURCE ASSIGNMENT IN STACKED MODULE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2007
|
Application #:
|
11165005
|
Filing Dt:
|
06/23/2005
|
Title:
|
RESISTIVE MEMORY DEVICE WITH IMPROVED DATA RETENTION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2007
|
Application #:
|
11165008
|
Filing Dt:
|
06/23/2005
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND SOURCE VOLTAGE CONTROL METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2007
|
Application #:
|
11165330
|
Filing Dt:
|
06/24/2005
|
Title:
|
METHOD OF FORMING A MEMORY DEVICE HAVING IMPROVED ERASE SPEED
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2007
|
Application #:
|
11166572
|
Filing Dt:
|
06/24/2005
|
Title:
|
METHOD OF PROGRAMMING A RESISTIVE MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2008
|
Application #:
|
11166575
|
Filing Dt:
|
06/24/2005
|
Publication #:
|
|
Pub Dt:
|
01/05/2006
| | | | |
Title:
|
VOLTAGE CONTROL CIRCUIT AND SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/25/2006
|
Application #:
|
11170183
|
Filing Dt:
|
06/30/2005
|
Publication #:
|
|
Pub Dt:
|
11/17/2005
| | | | |
Title:
|
FLASH MEMORY HAVING SPARE SECTOR WITH SHORTENED ACCESS TIME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2008
|
Application #:
|
11173244
|
Filing Dt:
|
07/01/2005
|
Publication #:
|
|
Pub Dt:
|
01/25/2007
| | | | |
Title:
|
PREAMORPHIZATION TO MINIMIZE VOID FORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
11173257
|
Filing Dt:
|
07/01/2005
|
Publication #:
|
|
Pub Dt:
|
02/01/2007
| | | | |
Title:
|
USE OF SUPERCRITICAL FLUID TO DRY WAFER AND CLEAN LENS IN IMMERSION LITHOGRAPHY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2007
|
Application #:
|
11173735
|
Filing Dt:
|
07/01/2005
|
Publication #:
|
|
Pub Dt:
|
01/05/2006
| | | | |
Title:
|
MEMORY SYSTEM AND TEST METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2007
|
Application #:
|
11173930
|
Filing Dt:
|
07/01/2005
|
Publication #:
|
|
Pub Dt:
|
01/04/2007
| | | | |
Title:
|
POWER INTERCONNECT STRUCTURE FOR BALANCED BITLINE CAPACITANCE IN A MEMORY ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
11174560
|
Filing Dt:
|
07/06/2005
|
Publication #:
|
|
Pub Dt:
|
01/11/2007
| | | | |
Title:
|
PROGRAMMING A MEMORY DEVICE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11174861
|
Filing Dt:
|
07/05/2005
|
Publication #:
|
|
Pub Dt:
|
01/11/2007
| | | | |
Title:
|
Memory device with improved data retention
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11174881
|
Filing Dt:
|
07/05/2005
|
Publication #:
|
|
Pub Dt:
|
01/11/2007
| | | | |
Title:
|
Stackable memory device and organic transistor structure
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2006
|
Application #:
|
11180943
|
Filing Dt:
|
07/12/2005
|
Title:
|
INTEGRATED CIRCUIT TEST SOCKET
|
|