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Patent #:
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01/12/2010
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11750724
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Filing Dt:
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05/18/2007
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Publication #:
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Pub Dt:
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09/27/2007
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Title:
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SELF ALIGNED MEMORY ELEMENT AND WORDLINE
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Patent #:
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08/14/2012
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11754877
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05/29/2007
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Pub Dt:
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05/01/2008
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Title:
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SEQUENCE OF ALGORITHMS TO COMPUTE EQUILIBRIUM PRICES IN NETWORKS
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07/28/2009
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11763510
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06/15/2007
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Pub Dt:
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12/18/2008
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Title:
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PROCESS FOR MAKING A RESISTIVE MEMORY CELL WITH SEPARATELY PATTERNED ELECTRODES
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03/29/2011
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11767620
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06/25/2007
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12/25/2008
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Title:
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FAULTY DANGLING METAL ROUTE DETECTION
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Patent #:
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Issue Dt:
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05/12/2009
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11767622
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06/25/2007
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Pub Dt:
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12/25/2008
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Title:
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COMPENSATION METHOD TO ACHIEVE UNIFORM PROGRAMMING SPEED OF FLASH MEMORY DEVICES
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09/21/2010
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11767623
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06/25/2007
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12/25/2008
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Title:
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PROCESS APPLYING DIE ATTACH FILM TO SINGULATED DIE
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NONE
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11770239
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06/28/2007
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Pub Dt:
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01/01/2009
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Title:
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A semiconductor device for stacking dies in a multi-die chip packing using film over wire as well as multi-die chip devices that include film over wire
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01/26/2010
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11771961
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06/29/2007
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Pub Dt:
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07/03/2008
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Title:
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MULTI-LEVEL OPERATION IN DUAL ELEMENT CELLS USING A SUPPLEMENTAL PROGRAMMING LEVEL
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NONE
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11781551
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07/23/2007
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Pub Dt:
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11/15/2007
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Title:
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DEVICE HAVING A PROTECTIVE CAP FORMED OVER AN ANTI-REFLECTIVE COATING LAYER AND OVER AN INSULATING MATERIAL
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Patent #:
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Issue Dt:
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09/28/2010
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11782507
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Filing Dt:
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07/24/2007
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Pub Dt:
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11/22/2007
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Title:
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SYSTEM AND METHOD FOR REDUCING PROCESS-INDUCED CHARGING
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Patent #:
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Issue Dt:
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06/28/2011
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11788264
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Filing Dt:
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04/19/2007
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Publication #:
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Pub Dt:
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10/23/2008
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Title:
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SELECTION OF A LOOKUP TABLE WITH DATA MASKED WITH A COMBINATION OF AN ADDITIVE AND MULTIPLICATIVE MASK
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Patent #:
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Issue Dt:
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03/10/2009
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Application #:
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11789888
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04/25/2007
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Publication #:
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Pub Dt:
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11/01/2007
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD
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Patent #:
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Issue Dt:
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12/23/2014
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11790305
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Filing Dt:
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04/24/2007
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Publication #:
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Pub Dt:
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03/27/2008
| | | | |
Title:
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EXHAUST SYSTEM
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Patent #:
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Issue Dt:
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02/12/2013
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11796073
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Filing Dt:
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04/26/2007
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Publication #:
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Pub Dt:
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10/30/2008
| | | | |
Title:
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MEMORY DEVICE WITH IMPROVED PERFORMANCE
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Patent #:
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Issue Dt:
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06/08/2010
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11796582
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Filing Dt:
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04/26/2007
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Publication #:
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Pub Dt:
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10/30/2008
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Title:
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SELF-ALIGNED PATTERNING METHOD BY USING NON-CONFORMAL FILM AND ETCH BACK FOR FLASH MEMORY AND OTHER SEMICONDUCTOR APPLICATIONS
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Patent #:
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Issue Dt:
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02/05/2013
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11801823
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Filing Dt:
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05/10/2007
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Publication #:
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Pub Dt:
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11/13/2008
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Title:
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FLASH MEMORY CELL WITH A FLAIR GATE
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Patent #:
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NONE
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Application #:
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11804170
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Filing Dt:
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05/16/2007
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Publication #:
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Pub Dt:
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11/20/2008
| | | | |
Title:
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Self reference sensing system and method
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Patent #:
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Issue Dt:
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06/30/2009
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Application #:
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11820278
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Filing Dt:
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06/18/2007
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Publication #:
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Pub Dt:
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12/18/2008
| | | | |
Title:
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DIE OFFSET DIE TO DIE BONDING
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Patent #:
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Issue Dt:
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03/08/2011
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Application #:
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11821653
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Filing Dt:
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06/25/2007
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Publication #:
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Pub Dt:
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12/25/2008
| | | | |
Title:
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METHOD OF CONSTRUCTING A STACKED-DIE SEMICONDUCTOR STRUCTURE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11829135
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Filing Dt:
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07/27/2007
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Publication #:
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Pub Dt:
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01/29/2009
| | | | |
Title:
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FUEL CELL USING DEUTERIUM
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Patent #:
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Issue Dt:
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05/19/2009
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Application #:
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11834420
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Filing Dt:
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08/06/2007
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Publication #:
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Pub Dt:
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02/12/2009
| | | | |
Title:
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READING MULTI-CELL MEMORY DEVICES UTILIZING COMPLEMENTARY BIT INFORMATION
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Patent #:
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Issue Dt:
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08/17/2010
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Application #:
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11835538
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Filing Dt:
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08/08/2007
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Publication #:
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Pub Dt:
|
02/12/2009
| | | | |
Title:
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USE OF A POLYMER SPACER AND SI TRENCH IN A BITLINE JUNCTION OF A FLASH MEMORY CELL TO IMPROVE TPD CHARACTERISTICS
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Patent #:
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Issue Dt:
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09/06/2011
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Application #:
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11835542
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Filing Dt:
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08/08/2007
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Publication #:
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Pub Dt:
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02/12/2009
| | | | |
Title:
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ORO AND ORPRO WITH BIT LINE TRENCH TO SUPPRESS TRANSPORT PROGRAM DISTURB
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11835545
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Filing Dt:
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08/08/2007
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Publication #:
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Pub Dt:
|
09/25/2008
| | | | |
Title:
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SINGULATED BARE DIE TESTING
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Patent #:
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Issue Dt:
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07/07/2009
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Application #:
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11837949
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Filing Dt:
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08/13/2007
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Publication #:
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Pub Dt:
|
02/19/2009
| | | | |
Title:
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EFFICIENT AND SYSTEMATIC MEASUREMENT FLOW ON DRAIN VOLTAGE FOR DIFFERENT TRIMMING IN FLASH SILICON CHARACTERIZATION
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Patent #:
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Issue Dt:
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07/07/2009
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Application #:
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11837976
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Filing Dt:
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08/13/2007
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Publication #:
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Pub Dt:
|
02/19/2009
| | | | |
Title:
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REGULATION OF BOOST-STRAP NODE RAMP RATE USING CAPACITANCE TO COUNTER PARASITIC ELEMENTS IN CHANNEL
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Patent #:
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Issue Dt:
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07/06/2010
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Application #:
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11838483
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Filing Dt:
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08/14/2007
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Publication #:
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Pub Dt:
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02/19/2009
| | | | |
Title:
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CAPACITOR STRUCTURE USED FOR FLASH MEMORY
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11842655
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Filing Dt:
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08/21/2007
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Publication #:
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Pub Dt:
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02/26/2009
| | | | |
Title:
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DIE STACKING IN MULTI-DIE STACKS USING DIE SUPPORT MECHANISMS
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11844518
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Filing Dt:
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08/24/2007
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Publication #:
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Pub Dt:
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02/26/2009
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Title:
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PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING DEPOSITING LAYERS WITHIN OPENINGS
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Patent #:
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Issue Dt:
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07/19/2011
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Application #:
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11847507
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Filing Dt:
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08/30/2007
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Publication #:
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Pub Dt:
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03/05/2009
| | | | |
Title:
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SACRIFICIAL NITRIDE AND GATE REPLACEMENT
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Patent #:
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Issue Dt:
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07/20/2010
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11847986
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Filing Dt:
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08/30/2007
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Publication #:
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Pub Dt:
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04/03/2008
| | | | |
Title:
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MAIN MEMORY IN A SYSTEM WITH A MEMORY CONTROLLER CONFIGURED TO CONTROL ACCESS TO NON-VOLATILE MEMORY, AND RELATED TECHNOLOGIES
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Patent #:
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Issue Dt:
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07/20/2010
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11848013
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08/30/2007
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Publication #:
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Pub Dt:
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04/03/2008
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Title:
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SYSTEMS AND APPARATUS FOR MAIN MEMORY WITH NON-VOLATILE TYPE MEMORY MODULES, AND RELATED TECHNOLOGIES
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Patent #:
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Issue Dt:
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07/20/2010
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Application #:
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11848040
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08/30/2007
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Publication #:
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Pub Dt:
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04/03/2008
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Title:
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METHODS FOR MAIN MEMORY WITH NON-VOLATILE TYPE MEMORY MODULES, AND RELATED TECHNOLOGIES
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Patent #:
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Issue Dt:
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07/20/2010
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Application #:
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11848083
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08/30/2007
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Publication #:
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Pub Dt:
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04/03/2008
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Title:
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METHODS FOR MAIN MEMORY IN A SYSTEM WITH A MEMORY CONTROLLER CONFIGURED TO CONTROL ACCESS TO NON-VOLATILE MEMORY, AND RELATED TECHNOLOGIES
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Patent #:
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06/04/2013
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11848515
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08/31/2007
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Pub Dt:
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03/05/2009
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Title:
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GATE REPLACEMENT WITH TOP OXIDE REGROWTH FOR THE TOP OXIDE IMPROVEMENT
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03/11/2014
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11852644
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09/10/2007
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Pub Dt:
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03/12/2009
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Title:
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CRYPTOGRAPHIC SYSTEM WITH MODULAR RANDOMIZATION OF EXPONENTIATION
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08/11/2009
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11855704
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09/14/2007
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Title:
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BACK-TO-BACK NPN/PNP PROTECTION DIODES
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Patent #:
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Issue Dt:
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03/20/2012
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11870102
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Filing Dt:
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10/10/2007
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Publication #:
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Pub Dt:
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04/16/2009
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Title:
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RANDOMIZED RSA-BASED CRYPTOGRAPHIC EXPONENTIATION RESISTANT TO SIDE CHANNEL AND FAULT ATTACKS
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Issue Dt:
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12/08/2009
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11872989
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10/16/2007
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Pub Dt:
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04/16/2009
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Title:
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CONTROLLED RAMP RATES FOR METAL BITLINES DURING WRITE OPERATIONS FROM HIGH VOLTAGE DRIVER FOR MEMORY APPLICATIONS
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Issue Dt:
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10/15/2013
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11873810
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10/17/2007
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Pub Dt:
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04/23/2009
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Title:
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HYBRID FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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11/09/2010
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11873822
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10/17/2007
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Pub Dt:
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04/23/2009
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Title:
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SPLIT CHARGE STORAGE NODE INNER SPACER PROCESS
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09/13/2011
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11873824
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10/17/2007
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04/23/2009
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Title:
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PHOTOVOLTAIC THIN COATING FOR COLLECTOR GENERATOR
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05/17/2011
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11873980
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10/17/2007
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04/23/2009
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Title:
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TAMPER REACTIVE MEMORY DEVICE TO SECURE DATA FROM TAMPER ATTACKS
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04/05/2011
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11874001
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10/17/2007
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Pub Dt:
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04/23/2009
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Title:
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OPTIMIZE PERSONALIZATION CONDITIONS FOR ELECTRONIC DEVICE TRANSMISSION RATES WITH INCREASED TRANSMITTING FREQUENCY
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06/12/2012
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11874036
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10/17/2007
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Pub Dt:
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04/23/2009
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Title:
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SECURE PERSONALIZATION OF MEMORY-BASED ELECTRONIC DEVICES
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02/02/2010
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11874076
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10/17/2007
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Pub Dt:
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04/23/2009
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Title:
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FAST SINGLE PHASE PROGRAM ALGORITHM FOR QUADBIT
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10/30/2012
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11877497
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10/23/2007
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04/23/2009
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Title:
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LOW-DENSITY PARITY-CHECK CODE BASED ERROR CORRECTION FOR MEMORY DEVICE
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08/12/2008
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11878296
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07/23/2007
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Pub Dt:
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11/15/2007
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Title:
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SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
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07/21/2009
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11879989
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07/18/2007
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Pub Dt:
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02/28/2008
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Title:
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NONVOLATILE STORAGE AND ERASE CONTROL
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Issue Dt:
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04/29/2014
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11881969
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07/30/2007
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Pub Dt:
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02/05/2009
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Title:
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CONTACT CONFIGURATION FOR UNDERTAKING TESTS ON CIRCUIT BOARD
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Issue Dt:
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02/08/2011
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11886139
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03/13/2008
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Pub Dt:
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08/14/2008
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Title:
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IC CARRIER, IC SOCKET AND METHOD FOR TESTING IC DEVICE
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Issue Dt:
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01/05/2010
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11894828
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08/22/2007
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Pub Dt:
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12/20/2007
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Title:
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CARRIER FOR STACKED TYPE SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
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Patent #:
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Issue Dt:
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09/25/2012
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11894921
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08/22/2007
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Publication #:
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Pub Dt:
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12/20/2007
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Title:
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EXPOSURE SYSTEM, SEMICONDUCTOR DEVICE, AND METHOD FOR FABRICATING THE SEMICONDUCTOR DEVICE
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Issue Dt:
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07/20/2010
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11895901
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08/28/2007
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Publication #:
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Pub Dt:
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03/05/2009
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Title:
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METHOD AND STRUCTURE OF MINIMIZING MOLD BLEEDING ON A SUBSTRATE SURFACE OF A SEMICONDUCTOR PACKAGE
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Patent #:
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NONE
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Application #:
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11899575
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Filing Dt:
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09/06/2007
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Publication #:
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Pub Dt:
|
03/12/2009
| | | | |
Title:
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Ta-lined tungsten plugs for transistor-local hydrogen gathering
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Patent #:
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Issue Dt:
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02/03/2015
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Application #:
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11899597
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Filing Dt:
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09/06/2007
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Publication #:
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Pub Dt:
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03/12/2009
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Title:
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Method of forming controllably conductive oxide
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Patent #:
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Issue Dt:
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02/08/2011
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Application #:
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11924169
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Filing Dt:
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10/25/2007
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Publication #:
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Pub Dt:
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04/30/2009
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Title:
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SPLIT CHARGE STORAGE NODE OUTER SPACER PROCESS
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Patent #:
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Issue Dt:
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04/06/2010
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Application #:
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11924823
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Filing Dt:
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10/26/2007
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Publication #:
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Pub Dt:
|
04/30/2009
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Title:
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SELECTIVE SILICIDE FORMATION USING RESIST ETCHBACK
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Patent #:
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Issue Dt:
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01/28/2014
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Application #:
|
11928372
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Filing Dt:
|
10/30/2007
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Publication #:
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|
Pub Dt:
|
04/30/2009
| | | | |
Title:
|
SIGNAL DESCRAMBLING DETECTOR
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|
|
Patent #:
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|
Issue Dt:
|
08/07/2012
|
Application #:
|
11928434
|
Filing Dt:
|
10/30/2007
|
Publication #:
|
|
Pub Dt:
|
04/30/2009
| | | | |
Title:
|
ERROR CORRECTION CODING IN FLASH MEMORY DEVICES
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|
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Patent #:
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|
Issue Dt:
|
11/01/2011
|
Application #:
|
11928864
|
Filing Dt:
|
10/30/2007
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Publication #:
|
|
Pub Dt:
|
05/22/2008
| | | | |
Title:
|
FUEL CELL STACK STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2014
|
Application #:
|
11928865
|
Filing Dt:
|
10/30/2007
|
Publication #:
|
|
Pub Dt:
|
04/30/2009
| | | | |
Title:
|
NON-VOLATILE MEMORY ARRAY PARTITIONING ARCHITECTURE AND METHOD TO UTILIZE SINGLE LEVEL CELLS AND MULTI-LEVEL CELLS WITHIN THE SAME MEMORY
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|
|
Patent #:
|
|
Issue Dt:
|
08/03/2010
|
Application #:
|
11929097
|
Filing Dt:
|
10/30/2007
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Publication #:
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|
Pub Dt:
|
04/30/2009
| | | | |
Title:
|
CONTROL OF TEMPERATURE SLOPE FOR BAND GAP REFERENCE VOLTAGE IN A MEMORY DEVICE
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|
Patent #:
|
|
Issue Dt:
|
07/28/2009
|
Application #:
|
11929724
|
Filing Dt:
|
10/30/2007
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Publication #:
|
|
Pub Dt:
|
04/30/2009
| | | | |
Title:
|
NONVOLATILE MEMORY ARRAY ARCHITECTURE
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|
|
Patent #:
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|
Issue Dt:
|
02/22/2011
|
Application #:
|
11929741
|
Filing Dt:
|
10/30/2007
|
Publication #:
|
|
Pub Dt:
|
04/30/2009
| | | | |
Title:
|
DETERMINISTIC PROGRAMMING ALGORITHM THAT PROVIDES TIGHTER CELL DISTRIBUTIONS WITH A REDUCED NUMBER OF PROGRAMMING PULSES
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|
Patent #:
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|
Issue Dt:
|
08/09/2011
|
Application #:
|
11929761
|
Filing Dt:
|
10/30/2007
|
Publication #:
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|
Pub Dt:
|
04/30/2009
| | | | |
Title:
|
MEMORY ARRAY OF PAIRS OF NONVOLATILE MEMORY CELLS USING FOWLER-NORDHEIM PROGRAMMING AND ERASING
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|
Patent #:
|
|
Issue Dt:
|
11/18/2008
|
Application #:
|
11931992
|
Filing Dt:
|
10/31/2007
|
Publication #:
|
|
Pub Dt:
|
02/28/2008
| | | | |
Title:
|
FLASH MEMORY DEVICE HAVING IMPROVED PROGRAM RATE
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|
|
Patent #:
|
|
Issue Dt:
|
03/29/2011
|
Application #:
|
11934628
|
Filing Dt:
|
11/02/2007
|
Publication #:
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|
Pub Dt:
|
05/07/2009
| | | | |
Title:
|
PROCESSES FOR FORMING ELECTRONIC DEVICES INCLUDING POLISHING METAL-CONTAINING LAYERS
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|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
11935049
|
Filing Dt:
|
11/05/2007
|
Publication #:
|
|
Pub Dt:
|
05/07/2009
| | | | |
Title:
|
DECODING SYSTEM CAPABLE OF REDUCING SECTOR SELECT AREA OVERHEAD FOR FLASH MEMORY
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11935544
|
Filing Dt:
|
11/06/2007
|
Publication #:
|
|
Pub Dt:
|
05/07/2009
| | | | |
Title:
|
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING DEPOSITING A CONDUCTIVE LAYER OVER A SEED LAYER
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|
|
Patent #:
|
|
Issue Dt:
|
10/05/2010
|
Application #:
|
11935717
|
Filing Dt:
|
11/06/2007
|
Publication #:
|
|
Pub Dt:
|
05/07/2009
| | | | |
Title:
|
CONTROLLED BIT LINE DISCHARGE FOR CHANNEL ERASES IN NONVOLATILE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2010
|
Application #:
|
11942526
|
Filing Dt:
|
11/19/2007
|
Publication #:
|
|
Pub Dt:
|
05/21/2009
| | | | |
Title:
|
HIGH RELIABLE AND LOW POWER STATIC RANDOM ACCESS MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2014
|
Application #:
|
11943544
|
Filing Dt:
|
11/20/2007
|
Publication #:
|
|
Pub Dt:
|
05/21/2009
| | | | |
Title:
|
MEMORY BUFFERING SYSTEM THAT IMPROVES READ/WRITE PERFORMANCE AND PROVIDES LOW LATENCY FOR MOBILE SYSTEMS
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|
|
Patent #:
|
|
Issue Dt:
|
07/12/2011
|
Application #:
|
11945292
|
Filing Dt:
|
11/27/2007
|
Publication #:
|
|
Pub Dt:
|
05/28/2009
| | | | |
Title:
|
SPI BANK ADDRESSING SCHEME FOR MEMORY DENSITIES ABOVE 128MB
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2011
|
Application #:
|
11945316
|
Filing Dt:
|
11/27/2007
|
Publication #:
|
|
Pub Dt:
|
05/28/2009
| | | | |
Title:
|
SPI AUTO-BOOT MODE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2014
|
Application #:
|
11945534
|
Filing Dt:
|
11/27/2007
|
Publication #:
|
|
Pub Dt:
|
05/28/2009
| | | | |
Title:
|
MULTI-BUS ARCHITECTURE FOR MASS STORAGE SYSTEM-ON-CHIP CONTROLLERS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2011
|
Application #:
|
11945785
|
Filing Dt:
|
11/27/2007
|
Publication #:
|
|
Pub Dt:
|
05/28/2009
| | | | |
Title:
|
ROOM TEMPERATURE DRIFT SUPPRESSION VIA SOFT PROGRAM AFTER ERASE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/2010
|
Application #:
|
11947424
|
Filing Dt:
|
11/29/2007
|
Publication #:
|
|
Pub Dt:
|
06/04/2009
| | | | |
Title:
|
WEAVABLE FIBER PHOTOVOLTAIC COLLECTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2012
|
Application #:
|
11949521
|
Filing Dt:
|
12/03/2007
|
Publication #:
|
|
Pub Dt:
|
06/04/2009
| | | | |
Title:
|
DIRECT INTERCONNECTION BETWEEN PROCESSOR AND MEMORY COMPONENT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2009
|
Application #:
|
11949637
|
Filing Dt:
|
12/03/2007
|
Title:
|
FORMING METAL-SEMICONDUCTOR FILMS HAVING DIFFERENT THICKNESSES WITHIN DIFFERENT REGIONS OF AN ELECTRONIC DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2012
|
Application #:
|
11950006
|
Filing Dt:
|
12/04/2007
|
Publication #:
|
|
Pub Dt:
|
06/04/2009
| | | | |
Title:
|
DATA TRANSMISSION SYSTEM-ON-CHIP MEMORY MODEL BASED VALIDATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/2015
|
Application #:
|
11950339
|
Filing Dt:
|
12/04/2007
|
Publication #:
|
|
Pub Dt:
|
06/04/2009
| | | | |
Title:
|
Method of operating a processing chamber used in forming electronic devices
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
11950811
|
Filing Dt:
|
12/05/2007
|
Publication #:
|
|
Pub Dt:
|
06/05/2008
| | | | |
Title:
|
METHOD AND APPARATUS FOR HIGH VOLTAGE OPERATION FOR A HIGH PERFORMANCE SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2011
|
Application #:
|
11951262
|
Filing Dt:
|
12/05/2007
|
Publication #:
|
|
Pub Dt:
|
06/11/2009
| | | | |
Title:
|
CIRCUIT PRE-CHARGE TO SENSE A MEMORY LINE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/15/2009
|
Application #:
|
11951263
|
Filing Dt:
|
12/05/2007
|
Publication #:
|
|
Pub Dt:
|
06/11/2009
| | | | |
Title:
|
FLEXIBLE WORD LINE BOOSTING ACROSS VCC SUPPLY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2011
|
Application #:
|
11953501
|
Filing Dt:
|
12/10/2007
|
Publication #:
|
|
Pub Dt:
|
06/11/2009
| | | | |
Title:
|
MEMORY ARRAY SEARCH ENGINE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2010
|
Application #:
|
11953689
|
Filing Dt:
|
12/10/2007
|
Publication #:
|
|
Pub Dt:
|
06/11/2009
| | | | |
Title:
|
SELECTIVE APPLICATION OF WORD LINE BIAS TO MINIMIZE FRINGE EFFECTS IN ELECTROMAGNETIC FIELDS DURING ERASE OF NONVOLATILE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/2010
|
Application #:
|
11953690
|
Filing Dt:
|
12/10/2007
|
Publication #:
|
|
Pub Dt:
|
06/11/2009
| | | | |
Title:
|
WORK FUNCTION ENGINEERING FOR FN ERASE OF A MEMORY DEVICE WITH MULTIPLE CHARGE STORAGE ELEMENTS IN AN UNDERCUT REGION
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|
|
Patent #:
|
|
Issue Dt:
|
07/14/2009
|
Application #:
|
11955802
|
Filing Dt:
|
12/13/2007
|
Publication #:
|
|
Pub Dt:
|
06/18/2009
| | | | |
Title:
|
REFERENCE-FREE SAMPLED SENSING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2010
|
Application #:
|
11955934
|
Filing Dt:
|
12/13/2007
|
Publication #:
|
|
Pub Dt:
|
06/18/2009
| | | | |
Title:
|
POWER SAFE TRANSLATION TABLE OPERATION IN FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2010
|
Application #:
|
11956032
|
Filing Dt:
|
12/13/2007
|
Publication #:
|
|
Pub Dt:
|
06/18/2009
| | | | |
Title:
|
PROGRAMMING IN MEMORY DEVICES USING SOURCE BITLINE VOLTAGE BIAS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/2010
|
Application #:
|
11957027
|
Filing Dt:
|
12/14/2007
|
Publication #:
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|
Pub Dt:
|
06/18/2009
| | | | |
Title:
|
CLOCK ENCODED PRE-FETCH TO ACCESS MEMORY DATA IN CLUSTERING NETWORK ENVIRONMENT
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11957028
|
Filing Dt:
|
12/14/2007
|
Publication #:
|
|
Pub Dt:
|
06/18/2009
| | | | |
Title:
|
REDUCING NOISE AND DISTURBANCE BETWEEN MEMORY STORAGE ELEMENTS USING ANGLED WORDLINES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
11957226
|
Filing Dt:
|
12/14/2007
|
Publication #:
|
|
Pub Dt:
|
06/18/2009
| | | | |
Title:
|
INTELLIGENT MEMORY DATA MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/2009
|
Application #:
|
11957309
|
Filing Dt:
|
12/14/2007
|
Publication #:
|
|
Pub Dt:
|
06/18/2009
| | | | |
Title:
|
READING ELECTRONIC MEMORY UTILIZING RELATIONSHIPS BETWEEN CELL STATE DISTRIBUTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/2009
|
Application #:
|
11957366
|
Filing Dt:
|
12/14/2007
|
Publication #:
|
|
Pub Dt:
|
06/18/2009
| | | | |
Title:
|
SCAN SENSING METHOD THAT IMPROVES SENSING MARGINS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/2011
|
Application #:
|
11957737
|
Filing Dt:
|
12/17/2007
|
Publication #:
|
|
Pub Dt:
|
06/18/2009
| | | | |
Title:
|
SI TRENCH BETWEEN BITLINE HDP FOR BVDSS IMPROVEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/2009
|
Application #:
|
11957787
|
Filing Dt:
|
12/17/2007
|
Publication #:
|
|
Pub Dt:
|
06/18/2009
| | | | |
Title:
|
HETERO-STRUCTURE VARIABLE SILICON RICH NITRIDE FOR MULTIPLE LEVEL MEMORY FLASH MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2011
|
Application #:
|
11957793
|
Filing Dt:
|
12/17/2007
|
Publication #:
|
|
Pub Dt:
|
06/18/2009
| | | | |
Title:
|
ADAPTIVE SYSTEM BOOT ACCELERATOR FOR COMPUTING SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/2011
|
Application #:
|
11958223
|
Filing Dt:
|
12/17/2007
|
Publication #:
|
|
Pub Dt:
|
06/18/2009
| | | | |
Title:
|
METHODS OF FORMING ELECTRONIC DEVICES BY ION IMPLANTING
|
|