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02/23/1999
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03/07/2000
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09/07/1999
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07/27/1999
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10/26/1999
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07/18/2000
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12/12/2000
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02/12/2002
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09/12/2000
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12/12/2000
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11/02/1999
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07/17/1998
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06/01/1999
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04/18/2000
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08/12/1998
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08/08/2000
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08/14/1998
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08/22/2000
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08/14/1998
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10/26/1999
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08/28/1998
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09/26/2000
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10/17/2000
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08/31/1998
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11/14/2000
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05/09/2000
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01/04/2000
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12/14/1999
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09/16/1998
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03/07/2000
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09/23/1998
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12/21/1999
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08/14/2001
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01/14/2003
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09/25/1998
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09/06/2001
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11/23/1999
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09/24/1998
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06/05/2001
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06/26/2001
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09/30/1998
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03/20/2001
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10/17/2000
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12/19/2000
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10/13/1998
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04/11/2000
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10/14/1998
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11/30/1999
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11/02/1999
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10/20/1998
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04/03/2001
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01/23/2001
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10/23/1998
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04/09/2002
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10/30/1998
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11/12/2002
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06/13/2000
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11/11/1998
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04/17/2001
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11/24/1998
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06/27/2000
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11/25/1998
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05/29/2001
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11/25/1998
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04/30/2002
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12/04/1998
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06/27/2000
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01/14/1999
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02/04/2003
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02/04/1999
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06/12/2001
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02/18/1999
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12/23/2003
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02/18/1999
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06/12/2001
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09/08/1998
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01/08/2002
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02/22/1999
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04/24/2001
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03/12/2002
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03/05/1999
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EFFECT OF DOPED AMORPHOUS SI THICKNESS ON BETTER POLY 1 CONTACT RESISTANCE PERFORMANCE FOR NAND TYPE FLASH MEMORY DEVICES
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02/06/2001
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03/05/1999
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10/30/2001
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03/05/1999
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11/29/2001
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METHOD OF FORMING HIGH K TANTALUM PENTOXIDE TA205 INSTEAD OF ONO STACKED FILMS TO INCREASE COUPLING RATIO AND IMPROVE RELIABILITY FOR FLASH MEMORY DEVICES
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12/19/2000
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03/11/1999
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05/23/2000
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03/18/1999
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09/25/2001
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03/19/1999
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SHARED MEMORY APPARATUS AND METHOD FOR MULTIPROCESSOR SYSTEMS
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11/07/2000
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03/31/1999
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04/16/2002
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04/06/1999
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02/13/2001
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05/06/1999
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RAMPED OR STEPPED GATE CHANNEL ERASE FOR FLASH MEMORY APPLICATION
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11/12/2002
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05/07/1999
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02/07/2002
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05/08/2001
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05/11/1999
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06/24/2003
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05/18/1999
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08/20/2002
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Application #:
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09314575
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Filing Dt:
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05/18/1999
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Title:
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METHOD OF DUAL USE OF NON-VOLATILE MEMORY FOR ERROR CORRECTION
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09322195
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Filing Dt:
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05/28/1999
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Title:
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METHOD OF UTILIZING FAST CHIP ERASE TO SCREEN ENDURANCE REJECTS
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Patent #:
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Issue Dt:
|
03/28/2000
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Application #:
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09334393
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Filing Dt:
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06/16/1999
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Title:
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THREE-DIMENSIONAL NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
|
12/12/2000
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Application #:
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09336057
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Filing Dt:
|
06/18/1999
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Title:
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METHOD OF SPACER FORMATION AND SOURCE PROTECTION AFTER SELF-ALIGNED SOURCE FORMED AND A DEVICE PROVIDED BY SUCH A METHOD
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Patent #:
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Issue Dt:
|
05/15/2001
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Application #:
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09348583
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Filing Dt:
|
07/07/1999
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Title:
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LIGHT FLOATING GATE DOPING TO IMPROVE TUNNEL OXIDE RELIABILITY
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Patent #:
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Issue Dt:
|
03/20/2001
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Application #:
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09349603
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Filing Dt:
|
07/09/1999
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Title:
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METHOD OF FORMING SELECT GATE TO IMPROVE RELIABILITY AND PERFORMANCE FOR NAND TYPE FLASH MEMORY DEVICES
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Patent #:
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|
Issue Dt:
|
05/22/2001
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Application #:
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09352801
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Filing Dt:
|
07/13/1999
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Title:
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THIN FLOATING GATE AND CONDUCTIVE SELECT GATE IN SITU DOPED AMORPHOUS SILICON MATERIAL FOR NAND TYPE FLASH MEMORY DEVICE APPLICATIONS
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Patent #:
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Issue Dt:
|
05/29/2001
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Application #:
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09353267
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Filing Dt:
|
07/14/1999
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Title:
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REDUCTION OF VOLTAGE STRESS ACROSS A GATE OXIDE AND ACROSS A JUNCTION WITHIN A HIGH VOLTAGE TRANSISTOR OF AN ERASABLE MEMORY DEVICE
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Patent #:
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Issue Dt:
|
04/03/2001
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Application #:
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09353781
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Filing Dt:
|
07/15/1999
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Title:
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SEMICONDUCTOR DEVICE WITH MULTIPLE CONTACT SIZES
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Patent #:
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|
Issue Dt:
|
08/13/2002
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Application #:
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09357333
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Filing Dt:
|
07/20/1999
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Title:
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METHODS AND ARRANGEMENTS FOR FORMING A SINGLE INTERPOLY DIELECTRIC LAYER IN A SEMICONDUCTOR DEVICE
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|
Patent #:
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|
Issue Dt:
|
07/31/2001
|
Application #:
|
09364982
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Filing Dt:
|
07/31/1999
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Title:
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METHOD FOR INHIBITING TUNNEL OXIDE GROWTH AT THE EDGES OF A FLOATING GATE DURING SEMICONDUCOR DEVICE PROCESSING
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|
Patent #:
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|
Issue Dt:
|
03/04/2003
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Application #:
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09366369
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Filing Dt:
|
08/03/1999
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Title:
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DEVICE MODELING AND CHARACTERIZATION STRUCTURE WITH MULTIPLEXED PADS
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|
Patent #:
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|
Issue Dt:
|
10/09/2001
|
Application #:
|
09368073
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Filing Dt:
|
08/03/1999
|
Title:
|
METHOD FOR REDUCED GATE ASPECT RATIO TO IMPROVE GAP-FILL AFTER SPACER ETCH
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|
|
Patent #:
|
|
Issue Dt:
|
11/27/2001
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Application #:
|
09368247
|
Filing Dt:
|
08/03/1999
|
Title:
|
METHOD FOR MONITORING SECOND GATE OVER-ETCH IN A SEMICONDUCTOR DEVICE
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|
Patent #:
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|
Issue Dt:
|
02/13/2001
|
Application #:
|
09369600
|
Filing Dt:
|
08/06/1999
|
Title:
|
MULTI STATE SENSING OF NAND MEMORY CELLS BY VARYING SOURCE BIAS
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|
Patent #:
|
|
Issue Dt:
|
04/17/2001
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Application #:
|
09369638
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Filing Dt:
|
08/06/1999
|
Title:
|
METHOD FOR PROVIDING A DOPANT LEVEL FOR POLYSILICON FOR FLASH MEMORY DEVICES
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|
|
Patent #:
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|
Issue Dt:
|
12/26/2000
|
Application #:
|
09370010
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Filing Dt:
|
08/06/1999
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Title:
|
MULTI STATE SENSING OF NAND MEMORY CELLS BY APPLYING REVERSE-BIAS VOLTAGE
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|
Patent #:
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|
Issue Dt:
|
01/09/2001
|
Application #:
|
09370380
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Filing Dt:
|
08/09/1999
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Title:
|
RAMPED GATE TECHNIQUE FOR SOFT PROGRAMMING TO TIGHTEN THE VT DISTRIBUTION
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|
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Patent #:
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|
Issue Dt:
|
06/17/2003
|
Application #:
|
09372406
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Filing Dt:
|
08/10/1999
|
Title:
|
METHOD OF REDUCING PROGRAM DISTURBS IN NAND TYPE FLASH MEMORY DEVICES
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|
|
Patent #:
|
|
Issue Dt:
|
11/28/2000
|
Application #:
|
09374059
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Filing Dt:
|
08/12/1999
|
Title:
|
FLOATING GATE ENGINEERING TO IMPROVE TUNNEL OXIDE RELIABILITY FOR FLASH MEMORY DEVICES
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|
Patent #:
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|
Issue Dt:
|
05/07/2002
|
Application #:
|
09375504
|
Filing Dt:
|
08/17/1999
|
Title:
|
METHOD FOR ETCHING MEMORY GATE STACK USING THIN RESIST LAYER
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|
|
Patent #:
|
|
Issue Dt:
|
06/19/2001
|
Application #:
|
09376658
|
Filing Dt:
|
08/18/1999
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Title:
|
METHOD FOR PROTECTING GATE EDGES FROM CHARGE GAIN/LOSS IN SEMICONDUCTOR DEVICE
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|
Patent #:
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|
Issue Dt:
|
10/26/2004
|
Application #:
|
09376659
|
Filing Dt:
|
08/18/1999
|
Title:
|
METHOD FOR PROTECTING GATE EDGES FROM CHARGE GAIN/LOSS IN SEMICONDUCTOR DEVICE
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|
|
Patent #:
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|
Issue Dt:
|
06/26/2001
|
Application #:
|
09377183
|
Filing Dt:
|
08/19/1999
|
Title:
|
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING ASSYMETRICALLY NITROGEN DOPED GATE OXIDE
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|
|
Patent #:
|
|
Issue Dt:
|
07/11/2000
|
Application #:
|
09379479
|
Filing Dt:
|
08/23/1999
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Title:
|
FLASH MEMORY ARCHITECTURE EMPLOYING THREE LAYER METAL INTERCONNECT FOR WORD LINE DECODING
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|
Patent #:
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|
Issue Dt:
|
06/05/2001
|
Application #:
|
09385550
|
Filing Dt:
|
08/30/1999
|
Title:
|
USING POLYSILICON FUSE FOR IC PROGRAMMING
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|
|
Patent #:
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|
Issue Dt:
|
06/25/2002
|
Application #:
|
09387018
|
Filing Dt:
|
08/31/1999
|
Title:
|
CONTINOUS CAPACITOR DIVIDER SAMPLED REGULATION SCHEME
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|
|
Patent #:
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|
Issue Dt:
|
07/09/2002
|
Application #:
|
09387421
|
Filing Dt:
|
08/31/1999
|
Title:
|
EMBEDDED METHODOLOGY TO PROGRAM/ERASE REFERENCE CELLS USED IN SENSING FLASH CELLS
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|
|
Patent #:
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|
Issue Dt:
|
06/10/2003
|
Application #:
|
09387710
|
Filing Dt:
|
08/30/1999
|
Title:
|
INTEGRATED CIRCUIT HAVING OPTIMIZED GATE COUPLING CAPACITANCE
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|