|
|
Patent #:
|
|
Issue Dt:
|
10/23/2007
|
Application #:
|
11699268
|
Filing Dt:
|
01/29/2007
|
Publication #:
|
|
Pub Dt:
|
05/31/2007
| | | | |
Title:
|
DELAY LOCKED LOOP CIRCUIT AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/2010
|
Application #:
|
11703634
|
Filing Dt:
|
02/08/2007
|
Publication #:
|
|
Pub Dt:
|
08/14/2008
| | | | |
Title:
|
SIMPLIFIED BIAS CIRCUITRY FOR DIFFERENTIAL BUFFER STAGE WITH SYMMETRIC LOADS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2011
|
Application #:
|
11708540
|
Filing Dt:
|
02/21/2007
|
Publication #:
|
|
Pub Dt:
|
06/28/2007
| | | | |
Title:
|
MODULAR OUTLET
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2008
|
Application #:
|
11708545
|
Filing Dt:
|
02/21/2007
|
Publication #:
|
|
Pub Dt:
|
06/28/2007
| | | | |
Title:
|
LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/2010
|
Application #:
|
11709128
|
Filing Dt:
|
02/22/2007
|
Publication #:
|
|
Pub Dt:
|
06/28/2007
| | | | |
Title:
|
TELEPHONE SYSTEM HAVING MULTIPLE DISTINCT SOURCES AND ACCESSORIES THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2010
|
Application #:
|
11709199
|
Filing Dt:
|
02/22/2007
|
Publication #:
|
|
Pub Dt:
|
06/28/2007
| | | | |
Title:
|
TELEPHONE SYSTEM HAVING MULTIPLE SOURCES AND ACCESSORIES THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2009
|
Application #:
|
11711043
|
Filing Dt:
|
02/27/2007
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
DECODING CONTROL WITH ADDRESS TRANSITION DETECTION IN PAGE ERASE FUNCTION
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11712508
|
Filing Dt:
|
03/01/2007
|
Publication #:
|
|
Pub Dt:
|
07/05/2007
| | | | |
Title:
|
Telephone system having multiple distinct sources and accessories therefor
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/2009
|
Application #:
|
11715838
|
Filing Dt:
|
03/08/2007
|
Publication #:
|
|
Pub Dt:
|
10/04/2007
| | | | |
Title:
|
NON-VOLATILE SEMICONDUCTOR MEMORY WITH PAGE ERASE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2008
|
Application #:
|
11716683
|
Filing Dt:
|
03/12/2007
|
Publication #:
|
|
Pub Dt:
|
07/05/2007
| | | | |
Title:
|
ADAPTER FOR MOUNTING A FACEPLATE OF A FIRST STYLE TO AN ELECTRICAL OUTLET CAVITY OF A SECOND STYLE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2008
|
Application #:
|
11732181
|
Filing Dt:
|
04/02/2007
|
Publication #:
|
|
Pub Dt:
|
08/02/2007
| | | | |
Title:
|
LOW LEAKAGE AND DATA RETENTION CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/2009
|
Application #:
|
11736260
|
Filing Dt:
|
04/17/2007
|
Publication #:
|
|
Pub Dt:
|
08/09/2007
| | | | |
Title:
|
CLEANING SOLUTION AND CLEANING METHOD OF A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2010
|
Application #:
|
11741383
|
Filing Dt:
|
04/27/2007
|
Publication #:
|
|
Pub Dt:
|
10/30/2008
| | | | |
Title:
|
VOLTAGE LEVEL SHIFTER AND BUFFER USING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2010
|
Application #:
|
11741647
|
Filing Dt:
|
04/27/2007
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
Title:
|
SRAM LEAKAGE REDUCTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/2009
|
Application #:
|
11747428
|
Filing Dt:
|
05/11/2007
|
Publication #:
|
|
Pub Dt:
|
09/06/2007
| | | | |
Title:
|
LOW POWER MATCH-LINE SENSING CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/18/2012
|
Application #:
|
11750649
|
Filing Dt:
|
05/18/2007
|
Publication #:
|
|
Pub Dt:
|
10/04/2007
| | | | |
Title:
|
APPARATUS AND METHOD FOR ESTABLISHING DEVICE IDENTIFIERS FOR SERIALLY INTERCONNECTED DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/2009
|
Application #:
|
11762330
|
Filing Dt:
|
06/13/2007
|
Publication #:
|
|
Pub Dt:
|
03/13/2008
| | | | |
Title:
|
FLASH MULTI-LEVEL THRESHOLD DISTRIBUTION SCHEME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/30/2013
|
Application #:
|
11771023
|
Filing Dt:
|
06/29/2007
|
Publication #:
|
|
Pub Dt:
|
06/12/2008
| | | | |
Title:
|
ADDRESS ASSIGNMENT AND TYPE RECOGNITION OF SERIALLY INTERCONNECTED MEMORY DEVICES OF MIXED TYPE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/2011
|
Application #:
|
11771241
|
Filing Dt:
|
06/29/2007
|
Publication #:
|
|
Pub Dt:
|
06/12/2008
| | | | |
Title:
|
SYSTEM AND METHOD OF OPERATING MEMORY DEVICES OF MIXED TYPE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2008
|
Application #:
|
11774881
|
Filing Dt:
|
07/09/2007
|
Publication #:
|
|
Pub Dt:
|
11/08/2007
| | | | |
Title:
|
MATCHLINE SENSE CIRCUIT AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/2010
|
Application #:
|
11779587
|
Filing Dt:
|
07/18/2007
|
Publication #:
|
|
Pub Dt:
|
01/22/2009
| | | | |
Title:
|
STORAGE OF DATA IN MEMORY VIA PACKET STROBING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2010
|
Application #:
|
11779685
|
Filing Dt:
|
07/18/2007
|
Publication #:
|
|
Pub Dt:
|
09/11/2008
| | | | |
Title:
|
PARTIAL BLOCK ERASE ARCHITECTURE FOR FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/2010
|
Application #:
|
11780231
|
Filing Dt:
|
07/19/2007
|
Publication #:
|
|
Pub Dt:
|
01/22/2009
| | | | |
Title:
|
MEMORY SYSTEM HAVING INCORRUPTED STROBE SIGNALS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/16/2011
|
Application #:
|
11781005
|
Filing Dt:
|
07/20/2007
|
Publication #:
|
|
Pub Dt:
|
01/17/2008
| | | | |
Title:
|
TELEPHONE COMMUNICATION SYSTEM OVER A SINGLE TELEPHONE LINE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/2009
|
Application #:
|
11781581
|
Filing Dt:
|
07/23/2007
|
Publication #:
|
|
Pub Dt:
|
08/07/2008
| | | | |
Title:
|
VOLTAGE DOWN CONVERTER FOR HIGH SPEED MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/26/2011
|
Application #:
|
11782827
|
Filing Dt:
|
07/25/2007
|
Publication #:
|
|
Pub Dt:
|
11/15/2007
| | | | |
Title:
|
LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2009
|
Application #:
|
11782856
|
Filing Dt:
|
07/25/2007
|
Publication #:
|
|
Pub Dt:
|
11/15/2007
| | | | |
Title:
|
TELEPHONE COMMUNICATION SYSTEM AND METHOD OVER LOCAL AREA NETWORK WIRING
|
|
|
Patent #:
|
|
Issue Dt:
|
03/10/2009
|
Application #:
|
11787667
|
Filing Dt:
|
04/17/2007
|
Publication #:
|
|
Pub Dt:
|
01/31/2008
| | | | |
Title:
|
CONTENT ADDRESSABLE MEMORY ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2014
|
Application #:
|
11790555
|
Filing Dt:
|
04/26/2007
|
Publication #:
|
|
Pub Dt:
|
08/23/2007
| | | | |
Title:
|
LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2008
|
Application #:
|
11796773
|
Filing Dt:
|
04/30/2007
|
Publication #:
|
|
Pub Dt:
|
09/06/2007
| | | | |
Title:
|
METHODS FOR ENHANCING CAPACITORS IN INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2010
|
Application #:
|
11804381
|
Filing Dt:
|
05/18/2007
|
Publication #:
|
|
Pub Dt:
|
09/27/2007
| | | | |
Title:
|
PORT PACKET QUEUING
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/2010
|
Application #:
|
11806562
|
Filing Dt:
|
06/01/2007
|
Publication #:
|
|
Pub Dt:
|
12/13/2007
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING NO CRACKS IN ONE OR MORE LAYERS UNDERLYING A METAL LINE LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2012
|
Application #:
|
11809244
|
Filing Dt:
|
05/30/2007
|
Publication #:
|
|
Pub Dt:
|
01/03/2008
| | | | |
Title:
|
MEMORY CHIP ARCHITECTURE HAVING NON-RECTANGULAR MEMORY BANKS AND METHOD FOR ARRANGING MEMORY BANKS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2011
|
Application #:
|
11822496
|
Filing Dt:
|
07/06/2007
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
SYSTEM AND METHOD OF PAGE BUFFER OPERATION FOR MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2009
|
Application #:
|
11824165
|
Filing Dt:
|
06/28/2007
|
Publication #:
|
|
Pub Dt:
|
03/27/2008
| | | | |
Title:
|
ON-DIE TERMINATION CIRCUIT AND DRIVING METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/2010
|
Application #:
|
11829410
|
Filing Dt:
|
07/27/2007
|
Publication #:
|
|
Pub Dt:
|
08/21/2008
| | | | |
Title:
|
NON-VOLATILE MEMORY WITH DYNAMIC MULTI-MODE OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/2009
|
Application #:
|
11830077
|
Filing Dt:
|
07/30/2007
|
Publication #:
|
|
Pub Dt:
|
12/27/2007
| | | | |
Title:
|
ERROR CORRECTION SCHEME FOR MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/22/2011
|
Application #:
|
11833559
|
Filing Dt:
|
08/03/2007
|
Publication #:
|
|
Pub Dt:
|
02/14/2008
| | | | |
Title:
|
DUAL CONTROL ANALOG DELAY ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/2009
|
Application #:
|
11835663
|
Filing Dt:
|
08/08/2007
|
Publication #:
|
|
Pub Dt:
|
12/13/2007
| | | | |
Title:
|
DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR SELF-REFRESHING MEMORY CELLS WITH TEMPERATURE COMPENSATED SELF-REFRESH
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2010
|
Application #:
|
11837239
|
Filing Dt:
|
08/10/2007
|
Publication #:
|
|
Pub Dt:
|
11/29/2007
| | | | |
Title:
|
LOCAL AREA NETWORK FOR DISTRIBUTING DATA COMMUNICATION, SENSING AND CONTROL SIGNALS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2013
|
Application #:
|
11837323
|
Filing Dt:
|
08/10/2007
|
Publication #:
|
|
Pub Dt:
|
11/29/2007
| | | | |
Title:
|
OUTLET ADD-ON MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2010
|
Application #:
|
11839184
|
Filing Dt:
|
08/15/2007
|
Publication #:
|
|
Pub Dt:
|
05/15/2008
| | | | |
Title:
|
CONGESTION LEVEL MANAGEMENT IN A NETWORK DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/2011
|
Application #:
|
11840692
|
Filing Dt:
|
08/17/2007
|
Publication #:
|
|
Pub Dt:
|
02/28/2008
| | | | |
Title:
|
MODULAR COMMAND STRUCTURE FOR MEMORY AND MEMORY SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2012
|
Application #:
|
11841463
|
Filing Dt:
|
08/20/2007
|
Publication #:
|
|
Pub Dt:
|
12/13/2007
| | | | |
Title:
|
AN ADDRESSABLE OUTLET FOR USE IN WIRED LOCAL AREA NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2012
|
Application #:
|
11843024
|
Filing Dt:
|
08/22/2007
|
Publication #:
|
|
Pub Dt:
|
08/21/2008
| | | | |
Title:
|
REDUCED PIN COUNT INTERFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/26/2013
|
Application #:
|
11843440
|
Filing Dt:
|
08/22/2007
|
Publication #:
|
|
Pub Dt:
|
02/28/2008
| | | | |
Title:
|
SCALABLE MEMORY SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/2009
|
Application #:
|
11844746
|
Filing Dt:
|
08/24/2007
|
Publication #:
|
|
Pub Dt:
|
12/13/2007
| | | | |
Title:
|
METHOD AND APPARATUS FOR SYNCHRONIZATION OF ROW AND COLUMN ACCESS OPERATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2011
|
Application #:
|
11855496
|
Filing Dt:
|
09/14/2007
|
Publication #:
|
|
Pub Dt:
|
03/19/2009
| | | | |
Title:
|
DYNAMIC RANDOM ACCESS MEMORY AND BOOSTED VOLTAGE PRODUCER THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/2009
|
Application #:
|
11857148
|
Filing Dt:
|
09/18/2007
|
Publication #:
|
|
Pub Dt:
|
02/21/2008
| | | | |
Title:
|
TELEPHONE COMMUNICATION SYSTEM OVER A SINGLE TELEPHONE LINE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/29/2009
|
Application #:
|
11866035
|
Filing Dt:
|
10/02/2007
|
Publication #:
|
|
Pub Dt:
|
05/08/2008
| | | | |
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT HAVING CURRENT LEAKAGE REDUCTION SCHEME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2010
|
Application #:
|
11872353
|
Filing Dt:
|
10/15/2007
|
Title:
|
SINGLE CHIP FRAME BUFFER AND GRAPHICS ACCELERATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/25/2015
|
Application #:
|
11873330
|
Filing Dt:
|
10/16/2007
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
Title:
|
BALANCED PSEUDO-RANDOM BINARY SEQUENCE GENERATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2011
|
Application #:
|
11873475
|
Filing Dt:
|
10/17/2007
|
Publication #:
|
|
Pub Dt:
|
04/23/2009
| | | | |
Title:
|
SINGLE-STROBE OPERATION OF MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2011
|
Application #:
|
11882805
|
Filing Dt:
|
08/06/2007
|
Publication #:
|
|
Pub Dt:
|
11/29/2007
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING METAL LINES WITH SLITS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11897105
|
Filing Dt:
|
08/29/2007
|
Publication #:
|
|
Pub Dt:
|
03/05/2009
| | | | |
Title:
|
Daisy-chain memory configuration and usage
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2008
|
Application #:
|
11900971
|
Filing Dt:
|
09/14/2007
|
Publication #:
|
|
Pub Dt:
|
01/10/2008
| | | | |
Title:
|
SYSTEMS AND METHODS FOR MINIMIZING STATIC LEAKAGE OF AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2012
|
Application #:
|
11906756
|
Filing Dt:
|
10/03/2007
|
Publication #:
|
|
Pub Dt:
|
03/13/2008
| | | | |
Title:
|
HIGH BANDWIDTH MEMORY INTERFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/2009
|
Application #:
|
11925208
|
Filing Dt:
|
10/26/2007
|
Publication #:
|
|
Pub Dt:
|
02/28/2008
| | | | |
Title:
|
COMPARE CIRCUIT FOR A CONTENT ADDRESSABLE MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2009
|
Application #:
|
11930292
|
Filing Dt:
|
10/31/2007
|
Publication #:
|
|
Pub Dt:
|
03/06/2008
| | | | |
Title:
|
APPARATUS AND METHOD FOR SELF-REFRESHING DYNAMIC RANDOM ACCESS MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2009
|
Application #:
|
11930527
|
Filing Dt:
|
10/31/2007
|
Publication #:
|
|
Pub Dt:
|
03/06/2008
| | | | |
Title:
|
VOLTAGE LEVEL SHIFTER CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/2009
|
Application #:
|
11932451
|
Filing Dt:
|
10/31/2007
|
Publication #:
|
|
Pub Dt:
|
04/30/2009
| | | | |
Title:
|
TEMPERATURE DETECTOR IN AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2010
|
Application #:
|
11941131
|
Filing Dt:
|
11/16/2007
|
Publication #:
|
|
Pub Dt:
|
05/21/2009
| | | | |
Title:
|
METHODS AND SYSTEMS FOR FAILURE ISOLATION AND DATA RECOVERY IN A CONFIGURATION OF SERIES-CONNECTED SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2010
|
Application #:
|
11942173
|
Filing Dt:
|
11/19/2007
|
Publication #:
|
|
Pub Dt:
|
07/10/2008
| | | | |
Title:
|
APPARATUS AND METHOD FOR COMMUNICATING WITH SEMICONDUCTOR DEVICES OF A SERIAL INTERCONNECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2010
|
Application #:
|
11944535
|
Filing Dt:
|
11/23/2007
|
Publication #:
|
|
Pub Dt:
|
05/29/2008
| | | | |
Title:
|
NON-VOLATILE MEMORY SERIAL CORE ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2009
|
Application #:
|
11946767
|
Filing Dt:
|
11/28/2007
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
Title:
|
CIRCUIT AND METHOD FOR GLITCH CORRECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/25/2009
|
Application #:
|
11955024
|
Filing Dt:
|
12/12/2007
|
Publication #:
|
|
Pub Dt:
|
06/05/2008
| | | | |
Title:
|
ADAPTER FOR MOUNTING A FACEPLATE OF A FIRST STYLE TO AN ELECTRICAL OUTLET CAVITY OF A SECOND STYLE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/29/2009
|
Application #:
|
11955754
|
Filing Dt:
|
12/13/2007
|
Publication #:
|
|
Pub Dt:
|
08/21/2008
| | | | |
Title:
|
NON-VOLATILE SEMICONDUCTOR MEMORY HAVING MULTIPLE EXTERNAL POWER SUPPLIES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2011
|
Application #:
|
11959996
|
Filing Dt:
|
12/19/2007
|
Publication #:
|
|
Pub Dt:
|
09/18/2008
| | | | |
Title:
|
METHODS AND APPARATUS FOR CLOCK SIGNAL SYNCHRONIZATION IN A CONFIGURATION OF SERIES-CONNECTED SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2009
|
Application #:
|
11966152
|
Filing Dt:
|
12/28/2007
|
Publication #:
|
|
Pub Dt:
|
11/06/2008
| | | | |
Title:
|
MULTI-LEVEL CELL ACCESS BUFFER WITH DUAL FUNCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2014
|
Application #:
|
11978529
|
Filing Dt:
|
10/29/2007
|
Publication #:
|
|
Pub Dt:
|
04/30/2009
| | | | |
Title:
|
Data processing with time-based memory access
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/2010
|
Application #:
|
11978896
|
Filing Dt:
|
10/30/2007
|
Publication #:
|
|
Pub Dt:
|
05/22/2008
| | | | |
Title:
|
APPARATUSES FOR SYNCHRONOUS TRANSFER OF INFORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2012
|
Application #:
|
11978988
|
Filing Dt:
|
10/30/2007
|
Publication #:
|
|
Pub Dt:
|
05/22/2008
| | | | |
Title:
|
HIGH BANDWIDTH MEMORY INTERFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2012
|
Application #:
|
11981409
|
Filing Dt:
|
10/31/2007
|
Publication #:
|
|
Pub Dt:
|
05/29/2008
| | | | |
Title:
|
TRUNKING IN A MATRIX
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2008
|
Application #:
|
11998725
|
Filing Dt:
|
11/30/2007
|
Publication #:
|
|
Pub Dt:
|
04/10/2008
| | | | |
Title:
|
LOW LEAKAGE AND DATA RETENTION CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/05/2010
|
Application #:
|
11998762
|
Filing Dt:
|
11/30/2007
|
Publication #:
|
|
Pub Dt:
|
04/17/2008
| | | | |
Title:
|
SYSTEMS AND METHODS FOR MINIMIZING STATIC LEAKAGE OF AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/16/2011
|
Application #:
|
11999162
|
Filing Dt:
|
12/04/2007
|
Publication #:
|
|
Pub Dt:
|
04/17/2008
| | | | |
Title:
|
WIDE FREQUENCY RANGE DELAY LOCKED LOOP
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2013
|
Application #:
|
12013148
|
Filing Dt:
|
01/11/2008
|
Publication #:
|
|
Pub Dt:
|
07/16/2009
| | | | |
Title:
|
RING-OF-CLUSTERS NETWORK TOPOLOGIES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/2011
|
Application #:
|
12015810
|
Filing Dt:
|
01/17/2008
|
Publication #:
|
|
Pub Dt:
|
06/05/2008
| | | | |
Title:
|
OUTLET WITH ANALOG SIGNAL ADAPTER, A METHOD FOR USE THEREOF AND A NETWORK USING SAID OUTLET
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12016324
|
Filing Dt:
|
01/18/2008
|
Publication #:
|
|
Pub Dt:
|
07/24/2008
| | | | |
Title:
|
ADDRESSABLE OUTLET, AND A NETWORK USING THE SAME
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12018272
|
Filing Dt:
|
01/23/2008
|
Publication #:
|
|
Pub Dt:
|
08/21/2008
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR REDUCING POWER CONSUMPTION IN A SYSTEM HAVING INTERCONNECTED DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/2010
|
Application #:
|
12018310
|
Filing Dt:
|
01/23/2008
|
Publication #:
|
|
Pub Dt:
|
05/22/2008
| | | | |
Title:
|
OUTLET WITH ANALOG SIGNAL ADAPTER, A METHOD FOR USE THEREOF AND A NETWORK USING SAID OUTLET
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2011
|
Application #:
|
12018371
|
Filing Dt:
|
01/23/2008
|
Publication #:
|
|
Pub Dt:
|
05/22/2008
| | | | |
Title:
|
OUTLET WITH ANALOG SIGNAL ADAPTER, A METHOD FOR USE THEREOF AND A NETWORK USING SAID OUTLET
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2011
|
Application #:
|
12021912
|
Filing Dt:
|
01/29/2008
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
ADDRESSABLE OUTLET, AND A NETWORK USING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2011
|
Application #:
|
12025177
|
Filing Dt:
|
02/04/2008
|
Publication #:
|
|
Pub Dt:
|
08/14/2008
| | | | |
Title:
|
APPARATUS AND METHOD FOR IDENTIFYING DEVICE TYPES OF SERIES-CONNECTED DEVICES OF MIXED TYPE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2010
|
Application #:
|
12025866
|
Filing Dt:
|
02/05/2008
|
Publication #:
|
|
Pub Dt:
|
08/21/2008
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR SELECTION AND DE-SELECTION OF MEMORY DEVICES INTERCONNECTED IN SERIES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2008
|
Application #:
|
12026321
|
Filing Dt:
|
02/05/2008
|
Publication #:
|
|
Pub Dt:
|
06/05/2008
| | | | |
Title:
|
SYSTEM FOR TRANSMISSION LINE TERMINATION BY SIGNAL CANCELLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2011
|
Application #:
|
12026813
|
Filing Dt:
|
02/06/2008
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
PROCESS, VOLTAGE, TEMPERATURE INDEPENDENT SWITCHED DELAY COMPENSATION SCHEME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/2011
|
Application #:
|
12026825
|
Filing Dt:
|
02/06/2008
|
Publication #:
|
|
Pub Dt:
|
08/07/2008
| | | | |
Title:
|
SOURCE SIDE ASYMMETRICAL PRECHARGE PROGRAMMING SCHEME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2011
|
Application #:
|
12028335
|
Filing Dt:
|
02/08/2008
|
Publication #:
|
|
Pub Dt:
|
10/22/2009
| | | | |
Title:
|
DATA CHANNEL TEST APPARATUS AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2011
|
Application #:
|
12029634
|
Filing Dt:
|
02/12/2008
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
APPARATUS AND METHOD FOR USING A PAGE BUFFER OF A MEMORY DEVICE AS A TEMPORARY CACHE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2013
|
Application #:
|
12030013
|
Filing Dt:
|
02/12/2008
|
Publication #:
|
|
Pub Dt:
|
09/18/2008
| | | | |
Title:
|
OUTLET ADD-ON MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2010
|
Application #:
|
12030235
|
Filing Dt:
|
02/13/2008
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
APPARATUS AND METHOD OF PAGE PROGRAM OPERATION FOR MEMORY DEVICES WITH MIRROR BACK-UP OF DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2011
|
Application #:
|
12030418
|
Filing Dt:
|
02/13/2008
|
Publication #:
|
|
Pub Dt:
|
08/21/2008
| | | | |
Title:
|
ADDRESSABLE OUTLET, AND A NETWORK USING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/05/2011
|
Application #:
|
12031788
|
Filing Dt:
|
02/15/2008
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
DEVICE, METHOD AND SYSTEM FOR ESTIMATING THE TERMINATION TO A WIRED TRANSMISSION-LINE BASED ON DETERMINATION OF CHARACTERISTIC IMPEDANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2011
|
Application #:
|
12032249
|
Filing Dt:
|
02/15/2008
|
Publication #:
|
|
Pub Dt:
|
02/12/2009
| | | | |
Title:
|
CLOCK MODE DETERMINATION IN A MEMORY SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2014
|
Application #:
|
12033577
|
Filing Dt:
|
02/19/2008
|
Publication #:
|
|
Pub Dt:
|
08/21/2008
| | | | |
Title:
|
SYSTEM HAVING ONE OR MORE MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/2010
|
Application #:
|
12034686
|
Filing Dt:
|
02/21/2008
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
DATA FLOW CONTROL IN MULTIPLE INDEPENDENT PORT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2010
|
Application #:
|
12038855
|
Filing Dt:
|
02/28/2008
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR SELF-REFRESHING MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2010
|
Application #:
|
12042551
|
Filing Dt:
|
03/05/2008
|
Publication #:
|
|
Pub Dt:
|
07/23/2009
| | | | |
Title:
|
NONVOLATILE MEMORY HAVING NON-POWER OF TWO MEMORY CAPACITY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2010
|
Application #:
|
12042576
|
Filing Dt:
|
03/05/2008
|
Publication #:
|
|
Pub Dt:
|
09/18/2008
| | | | |
Title:
|
OUTLET ADD-ON MODULE
|
|