|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
09944488
|
Filing Dt:
|
08/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
APPARATUS FOR STEREOLITHOGRAPHIC PROCESSING OF COMPONENTS AND ASSEMBLIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2003
|
Application #:
|
09945252
|
Filing Dt:
|
08/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
LOCALIZED ARRAY THRESHOLD VOLTAGE IMPLANT TO ENHANCE CHARGE STORAGE WITHIN DRAM MEMORY CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/2004
|
Application #:
|
09945316
|
Filing Dt:
|
08/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
METHOD FOR CONTROLLING RADIATION BEAM INTENSITY DIRECTED TO MICROLITHOGRAPHIC SUBSTRATES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/09/2007
|
Application #:
|
09945393
|
Filing Dt:
|
08/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
DIELECTRIC MATERIAL FORMING METHODS AND ENHANCED DIELECTRIC MATERIALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/2004
|
Application #:
|
09945536
|
Filing Dt:
|
08/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/21/2002
| | | | |
|
Title:
|
THERMAL PROCESSING OF METAL ALLOYS FOR AN IMPROVED CMP PROCESS IN INTEGRATED CIRCUIT FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2003
|
Application #:
|
09947295
|
Filing Dt:
|
09/05/2001
|
|
Publication #:
|
|
Pub Dt:
|
07/04/2002
| | | | |
|
Title:
|
MEASUREMENT PROBE FOR DETECTING ELECTRICAL SIGNALS IN AN INTEGRATED SEMICONDUCTOR CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2003
|
Application #:
|
09948201
|
Filing Dt:
|
09/06/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/05/2002
| | | | |
|
Title:
|
TRANSFER CIRCUIT OF SEMICONDUCTOR DEVICE AND STRUCTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2003
|
Application #:
|
09956917
|
Filing Dt:
|
09/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/23/2003
| | | | |
|
Title:
|
BITLINE PRECHARGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/22/2005
|
Application #:
|
09966391
|
Filing Dt:
|
09/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/01/2002
| | | | |
|
Title:
|
CASCADED CHARGE PUMP POWER SUPPLY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2004
|
Application #:
|
09968897
|
Filing Dt:
|
10/03/2001
|
|
Publication #:
|
|
Pub Dt:
|
02/07/2002
| | | | |
|
Title:
|
PROCESS, VOLTAGE, TEMPERATURE INDEPENDENT SWITCHED DELAY COMPENSATION SCHEME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2003
|
Application #:
|
09977239
|
Filing Dt:
|
10/16/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/30/2002
| | | | |
|
Title:
|
WAFER POLISHING SLURRY AND CHEMICAL MECHANICAL POLISHING (CMP) METHOD USING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2003
|
Application #:
|
09977323
|
Filing Dt:
|
10/16/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/16/2002
| | | | |
|
Title:
|
PATTERN FORMATION METHOD USING TWO ALTERNATING PHASE SHIFT MASKS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2002
|
Application #:
|
09977982
|
Filing Dt:
|
10/17/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/18/2002
| | | | |
|
Title:
|
DYNAMIC CONTENT ADDRESSABLE MEMORY CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2003
|
Application #:
|
09982841
|
Filing Dt:
|
10/18/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/16/2002
| | | | |
|
Title:
|
METHOD OF FORMING DUAL-METAL GATES IN SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2003
|
Application #:
|
09985972
|
Filing Dt:
|
11/07/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/07/2002
| | | | |
|
Title:
|
DUAL CONTROL ANALOG DELAY ELEMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2003
|
Application #:
|
09988657
|
Filing Dt:
|
11/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2002
| | | | |
|
Title:
|
REFERENCE VOLTAGE GENERATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2004
|
Application #:
|
09988987
|
Filing Dt:
|
11/19/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2003
| | | | |
|
Title:
|
PSEUDO VARIABLE RESISTOR FOR TESTER PLATFORM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2002
|
Application #:
|
09990715
|
Filing Dt:
|
11/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/04/2002
| | | | |
|
Title:
|
METHODS OF FORMING CAPACITORS AND RESULTANT CAPACITOR STRUCTURES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2004
|
Application #:
|
09992290
|
Filing Dt:
|
11/16/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/20/2002
| | | | |
|
Title:
|
METHOD OF CALIBRATING A TEST SYSTEM FOR SEMICONDUCTOR COMPONENTS, AND TEST SUBSTRATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2003
|
Application #:
|
09993817
|
Filing Dt:
|
11/14/2001
|
|
Publication #:
|
|
Pub Dt:
|
11/28/2002
| | | | |
|
Title:
|
REFERENCE VOLTAGE GENERATOR TOLERANT TO TEMPERATURE VARIATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2003
|
Application #:
|
09996240
|
Filing Dt:
|
11/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/12/2002
| | | | |
|
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING CHANGEABLE SPARE MEMORY ADDRESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2005
|
Application #:
|
09997073
|
Filing Dt:
|
11/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2003
| | | | |
|
Title:
|
CVD OF PTRH WITH GOOD ADHESION AND MORPHOLOGY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2003
|
Application #:
|
09998729
|
Filing Dt:
|
11/30/2001
|
|
Title:
|
DRY LOW K FILM APPLICATION FOR INTERLEVEL DIELECTRIC AND METHOD OF CLEANING ETCHED FEATURES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2002
|
Application #:
|
09999840
|
Filing Dt:
|
10/24/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/09/2002
| | | | |
|
Title:
|
SOLUTIONS OF METAL-COMPRISING MATERIALS, METHODS OF FORMING METAL-COMPRISING LAYERS, METHODS OF STORING METAL-COMPRISING MATERIALS, AND METHODS OF FORMING CAPACITORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2002
|
Application #:
|
09999885
|
Filing Dt:
|
10/31/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/04/2002
| | | | |
|
Title:
|
METHODS OF FORMING FIELD EFFECT TRANSISTORS AND RELATED FIELD EFFECT TRANSISTOR CONSTRUCTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/2002
|
Application #:
|
09999886
|
Filing Dt:
|
10/31/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/28/2002
| | | | |
|
Title:
|
METHODS OF FORMING FIELD EFFECT TRANSISTORS AND RELATED FIELD EFFECT TRANSISTOR CONSTRUCTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/2004
|
Application #:
|
10002779
|
Filing Dt:
|
10/29/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/28/2002
| | | | |
|
Title:
|
METHODS FOR FORMING AND INTEGRATED CIRCUIT STRUCTURES CONTAINING RUTHENIUM AND TUNGSTEN CONTAINING LAYERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2003
|
Application #:
|
10002906
|
Filing Dt:
|
10/29/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/09/2002
| | | | |
|
Title:
|
METHODS FOR FORMING AND INTEGRATED CIRCUIT STRUCTURES CONTAINING RUTHENIUM AND TUNGSTEN CONTAINING LAYERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2003
|
Application #:
|
10003261
|
Filing Dt:
|
12/06/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/23/2002
| | | | |
|
Title:
|
METHOD OF FABRICATING AN SRRUO3 FILM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2003
|
Application #:
|
10005877
|
Filing Dt:
|
12/07/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/27/2002
| | | | |
|
Title:
|
CIRCUIT AND METHOD FOR CONTROLLING BUFFERS IN SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
|
10006303
|
Filing Dt:
|
12/06/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/09/2002
| | | | |
|
Title:
|
WIRING STRUCTURE OF SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2004
|
Application #:
|
10010504
|
Filing Dt:
|
12/05/2001
|
|
Publication #:
|
|
Pub Dt:
|
07/11/2002
| | | | |
|
Title:
|
TEST CONFIGURATION AND TEST METHOD FOR TESTING A PLURALITY OF INTEGRATED CIRCUITS IN PARALLEL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2003
|
Application #:
|
10010625
|
Filing Dt:
|
11/08/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/15/2002
| | | | |
|
Title:
|
MEMORY CELL DECODER NOT INCLUDING A CHARGE PUMP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2003
|
Application #:
|
10011134
|
Filing Dt:
|
12/07/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
|
Title:
|
CHEMICAL VAPOR DEPOSITION OF TITANIUM FROM TITANIUM TETRACHLORIDE AND HYDROCARBON REACTANTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2003
|
Application #:
|
10012233
|
Filing Dt:
|
12/05/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/09/2002
| | | | |
|
Title:
|
DRAM CELL CONSTRUCTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2003
|
Application #:
|
10012668
|
Filing Dt:
|
10/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/09/2002
| | | | |
|
Title:
|
SOLVATED RUTHENIUM PRECURSORS FOR DIRECT LIQUID INJECTION OFRUTHENIUM AND RUTHENIUM OXIDE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2003
|
Application #:
|
10013402
|
Filing Dt:
|
12/13/2001
|
|
Title:
|
CAPACITOR FOR SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2003
|
Application #:
|
10021397
|
Filing Dt:
|
12/07/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/27/2002
| | | | |
|
Title:
|
EFFICIENT DIGITAL ITU-COMPLIANT ZERO-BUFFERING DTMF DETECTION USING THE NON-UNIFORM DISCRETE FOURIER TRANSFORM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2002
|
Application #:
|
10022932
|
Filing Dt:
|
12/18/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/06/2002
| | | | |
|
Title:
|
MULTI-STAGE LOOKUP FOR TRANSLATING BETWEEN SIGNALS OF DIFFERENT BIT LENGTHS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2003
|
Application #:
|
10022934
|
Filing Dt:
|
12/18/2001
|
|
Publication #:
|
|
Pub Dt:
|
11/28/2002
| | | | |
|
Title:
|
METHOD OF FORMING SEMICONDUCTOR DEVICE HAVING A GAA TYPE TRANSISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
|
10024366
|
Filing Dt:
|
12/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
|
Title:
|
LOW POWER SEMICONDUCTOR MEMORY DEVICE HAVING A NORMAL MODE AND A PARTIAL ARRAY SELF REFRESH MODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
10027519
|
Filing Dt:
|
12/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
07/25/2002
| | | | |
|
Title:
|
CHEMICAL TREATMENT OF SEMICONDUCTOR SUBSTRATES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2003
|
Application #:
|
10028704
|
Filing Dt:
|
12/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
|
Title:
|
CIRCUIT FOR GENERATING INTERNAL ADDRESS IN SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2003
|
Application #:
|
10033509
|
Filing Dt:
|
12/27/2001
|
|
Publication #:
|
|
Pub Dt:
|
07/04/2002
| | | | |
|
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES WITH TITANIUM ALUMINUM NITRIDE WORK FUNCTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2002
|
Application #:
|
10033574
|
Filing Dt:
|
11/02/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/16/2002
| | | | |
|
Title:
|
DELAY-LOCKED LOOP WITH BINARY-COUPLED CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2003
|
Application #:
|
10033989
|
Filing Dt:
|
12/28/2001
|
|
Title:
|
DUTY CORRECTION CIRCUIT AND A METHOD OF CORRECTING A DUTY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2002
|
Application #:
|
10034242
|
Filing Dt:
|
12/28/2001
|
|
Title:
|
METHOD OF FORMING A CONTACT PLUG FOR A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
|
Application #:
|
10034504
|
Filing Dt:
|
12/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/10/2003
| | | | |
|
Title:
|
METHOD OF MANUFACTURING A CONTACT PLUG FOR A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2003
|
Application #:
|
10035082
|
Filing Dt:
|
12/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
07/04/2002
| | | | |
|
Title:
|
DUTY CYCLE CORRECTION CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/2004
|
Application #:
|
10035247
|
Filing Dt:
|
01/04/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/12/2002
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING NO CRACKS IN ONE OR MORE LAYERS UNDERLYING A METAL LINE LAYER AND METHOD OF MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2004
|
Application #:
|
10035390
|
Filing Dt:
|
12/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/16/2002
| | | | |
|
Title:
|
METHODS OF FORMING MATERIALS COMPRISING TUNGSTEN AND NITROGEN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2007
|
Application #:
|
10036156
|
Filing Dt:
|
12/26/2001
|
|
Publication #:
|
|
Pub Dt:
|
07/04/2002
| | | | |
|
Title:
|
METHOD OF FORMING A METAL GATE IN A SEMICONDUCTOR DEVICE USING ATOMIC LAYER DEPOSITION PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2003
|
Application #:
|
10036246
|
Filing Dt:
|
10/22/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/17/2002
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR DETERMINING INTERPOLATED INTERMEDIATE VALUES OF A SAMPLED SIGNAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2003
|
Application #:
|
10039022
|
Filing Dt:
|
01/02/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/16/2002
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Title:
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SELECTIVE METHOD TO FORM ROUGHENED SILICON
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Patent #:
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Issue Dt:
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03/18/2003
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Application #:
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10039165
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Filing Dt:
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01/03/2002
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Publication #:
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Pub Dt:
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09/26/2002
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Title:
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METHOD FOR DEPOSITING A TUNGSTEN SILICIDE LAYER
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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10039215
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Filing Dt:
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01/03/2002
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Publication #:
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Pub Dt:
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07/04/2002
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Title:
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TOP ELECTRODE IN A STRONGLY OXIDIZING ENVIRONMENT
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Patent #:
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Issue Dt:
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09/09/2003
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Application #:
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10039950
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Filing Dt:
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12/31/2001
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Publication #:
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Pub Dt:
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05/16/2002
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Title:
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INTEGRATED CIRCUIT DEVICES HAVING CONTACT AND CONTAINER STRUCTURES
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Patent #:
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Issue Dt:
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12/31/2002
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Application #:
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10043330
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Filing Dt:
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01/14/2002
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Publication #:
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Pub Dt:
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07/18/2002
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Title:
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SEMICONDUCTOR DEVICE HAVING TRENCH ISOLATION STRUCTURE AND METHOD OF FORMING SAME
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Patent #:
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Issue Dt:
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09/23/2003
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Application #:
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10044991
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Filing Dt:
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01/15/2002
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Publication #:
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Pub Dt:
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07/11/2002
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Title:
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METHOD OF FORMING T-SHAPED ISOLATION LAYER, METHOD OF FORMING ELEVATED SALICIDE SOURCE/DRAIN REGION USING THE SAME, AND SEMICONDUCTOR DEVICE HAVING T-SHAPED ISOLATION LAYER
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Patent #:
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Issue Dt:
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07/22/2003
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Application #:
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10046174
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Filing Dt:
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01/16/2002
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Publication #:
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Pub Dt:
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07/18/2002
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Title:
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APPARATUS AND METHOD FOR OPERATION OF MULTI-BANK SEMICONDUCTOR MEMORY DEVICE WITH AN UP/DOWN COUNTER
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Patent #:
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Issue Dt:
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04/08/2003
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Application #:
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10051768
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Filing Dt:
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01/18/2002
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Publication #:
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Pub Dt:
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07/18/2002
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Title:
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GRADED LAYER FOR USE IN SEMICONDUCTOR CIRCUITS AND METHOD FOR MAKING SAME
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|
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Patent #:
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Issue Dt:
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09/28/2004
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Application #:
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10056797
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Filing Dt:
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01/18/2002
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Publication #:
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Pub Dt:
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09/05/2002
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Title:
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METHOD AND APPARATUS INCLUDING REVERSE PLAY OF A MULTIPLEXED PACKET DATA STREAM
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Patent #:
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Issue Dt:
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05/16/2006
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Application #:
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10059727
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Filing Dt:
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01/29/2002
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Publication #:
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Pub Dt:
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06/05/2003
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Title:
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MEMORY CELL ARRAYS
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Patent #:
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Issue Dt:
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03/09/2004
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Application #:
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10064770
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Filing Dt:
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08/15/2002
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Publication #:
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Pub Dt:
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02/19/2004
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Title:
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DUAL MATCH-LINE, TWIN-CELL, BINARY-TERNARY CAM
|
|
|
|
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Patent #:
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|
Issue Dt:
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12/25/2007
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Application #:
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10066550
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Filing Dt:
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01/31/2002
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Publication #:
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Pub Dt:
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07/31/2003
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Title:
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TRUNKING IN A MATRIX
|
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Patent #:
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|
Issue Dt:
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05/18/2004
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Application #:
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10075574
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Filing Dt:
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02/12/2002
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Publication #:
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Pub Dt:
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06/20/2002
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Title:
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METHOD OF MANUFACTURING A CAPACITOR HAVING RUSIXOY-CONTAINING ADHESION LAYERS
|
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Patent #:
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Issue Dt:
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09/09/2003
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Application #:
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10075819
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Filing Dt:
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02/12/2002
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Publication #:
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Pub Dt:
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06/20/2002
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Title:
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A CAPACITOR HAVING RUSIXOY-CONTAINING ADHESION LAYERS
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Patent #:
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Issue Dt:
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10/05/2004
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Application #:
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10075863
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Filing Dt:
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02/12/2002
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Publication #:
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Pub Dt:
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09/12/2002
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Title:
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RUSIXOY-CONTAINING ADHESION LAYERS
|
|
|
|
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Patent #:
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|
Issue Dt:
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01/18/2005
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Application #:
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10082594
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Filing Dt:
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02/22/2002
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Publication #:
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Pub Dt:
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07/04/2002
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Title:
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METHODS OF FORMING CAPACITORS AND RESULTANT CAPACITOR STRUCTURES
|
|
|
|
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Patent #:
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|
Issue Dt:
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05/03/2005
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Application #:
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10084619
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Filing Dt:
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02/28/2002
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Publication #:
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|
Pub Dt:
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10/03/2002
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Title:
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CONTENT ADDRESSABLE MEMORY CELL
|
|
|
|
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Patent #:
|
|
Issue Dt:
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03/25/2003
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Application #:
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10084620
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Filing Dt:
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02/28/2002
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Title:
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DIGITALLY CONTROLLED PULSE WIDTH ADJUSTING CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
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02/04/2003
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Application #:
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10092829
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Filing Dt:
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03/06/2002
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Title:
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NANOTUBE SEMICONDUCTOR DEVICES AND METHODS FOR MAKING THE SAME
|
|
|
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Patent #:
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|
Issue Dt:
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05/04/2004
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Application #:
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10093528
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Filing Dt:
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03/11/2002
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Publication #:
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Pub Dt:
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08/15/2002
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Title:
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DYNAMIC MEMORY BASED ON SINGLE ELECTRON STORAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
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03/30/2004
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Application #:
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10099220
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Filing Dt:
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03/13/2002
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Publication #:
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Pub Dt:
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07/18/2002
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Title:
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CIRCUIT AND METHOD FOR TESTING A MEMORY DEVICE
|
|
|
|
|
Patent #:
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|
Issue Dt:
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07/01/2003
|
Application #:
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10100856
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Filing Dt:
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03/19/2002
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Title:
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ERASE BLOCK ARCHITECTURE FOR NON-VOLATILE MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
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06/03/2003
|
Application #:
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10101776
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Filing Dt:
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03/21/2002
|
|
Publication #:
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Pub Dt:
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09/26/2002
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Title:
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PECVD METHOD OF FORMING A TUNGSTEN SILICIDE LAYER ON A POLYSILICON LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
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08/10/2004
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Application #:
|
10105590
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Filing Dt:
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03/25/2002
|
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Publication #:
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Pub Dt:
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09/26/2002
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|
Title:
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METHOD FOR RELEASABLE CONTACT-CONNECTION OF A PLURALITY OF INTEGRATED SEMICONDUCTOR MODULES ON A WAFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2003
|
Application #:
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10107821
|
Filing Dt:
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03/28/2002
|
|
Title:
|
PROGRAMMABLE INTERCONNECT FOR SEMICONDUCTOR DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2003
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Application #:
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10116941
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Filing Dt:
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04/05/2002
|
|
Publication #:
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Pub Dt:
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11/28/2002
| | | | |
|
Title:
|
METHOD FOR FORMING WIRE IN SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/2003
|
Application #:
|
10118338
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Filing Dt:
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04/09/2002
|
|
Publication #:
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Pub Dt:
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12/05/2002
| | | | |
|
Title:
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MULTILEVEL DRAM SENSING ANALOG-TO-DIGITAL CONVERTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/2003
|
Application #:
|
10118946
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Filing Dt:
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04/10/2002
|
|
Publication #:
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Pub Dt:
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08/15/2002
| | | | |
|
Title:
|
METHOD OF FORMING LOW DIELECTRIC SILICON OXYNITRIDE SPACER FILMS HIGHLY SELECTIVE TO ETCHANTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2003
|
Application #:
|
10121805
|
Filing Dt:
|
04/12/2002
|
|
Publication #:
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|
Pub Dt:
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08/15/2002
| | | | |
|
Title:
|
REDUCED AREA SENSE AMPLIFIER ISOLATION LAYOUT IN A DYNAMIC RAM ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2005
|
Application #:
|
10122555
|
Filing Dt:
|
04/15/2002
|
|
Publication #:
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Pub Dt:
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09/26/2002
| | | | |
|
Title:
|
REDUCING ASYMMETRICALLY DEPOSITED FILM INDUCED REGISTRATION ERROR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/2004
|
Application #:
|
10122786
|
Filing Dt:
|
04/15/2002
|
|
Publication #:
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Pub Dt:
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09/26/2002
| | | | |
|
Title:
|
REDUCING ASYMMETRICALLY DEPOSITED FILM INDUCED REGISTRATION ERROR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2004
|
Application #:
|
10122870
|
Filing Dt:
|
04/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/19/2002
| | | | |
|
Title:
|
BARRIER-METAL-FREE COPPER DAMASCENE TECHNOLOGY USING ATOMIC HYDROGEN ENHANCED REFLOW
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/25/2006
|
Application #:
|
10123441
|
Filing Dt:
|
04/15/2002
|
|
Publication #:
|
|
Pub Dt:
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08/15/2002
| | | | |
|
Title:
|
APPARATUS FOR PRODUCING WATER FOR USE IN MANUFACTURING SEMICONDUCTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2004
|
Application #:
|
10125762
|
Filing Dt:
|
04/18/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/05/2002
| | | | |
|
Title:
|
METHOD FOR PRODUCING WATER FOR USE IN MANUFACTURING SEMICONDUCTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2002
|
Application #:
|
10125853
|
Filing Dt:
|
04/19/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/15/2002
| | | | |
|
Title:
|
RETICLE CLEANING WITHOUT DAMAGING PELLICLE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/2003
|
Application #:
|
10131371
|
Filing Dt:
|
04/24/2002
|
|
Publication #:
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|
Pub Dt:
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09/26/2002
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|
Title:
|
APPARATUS AND SYSTEM FOR REMOVING PHOTORESIST THROUGH THE USE OF HOT DEIONIZED WATER BATH, WATER VAPOR AND OZONE GAS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/2004
|
Application #:
|
10131374
|
Filing Dt:
|
04/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2002
| | | | |
|
Title:
|
CIRCUIT CONFIGURATION FOR SELECTIVELY TRANSMITTING INFORMATION ITEMS FROM A MEASURING DEVICE TO CHIPS ON A WAFER DURING CHIP FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/2004
|
Application #:
|
10131473
|
Filing Dt:
|
04/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/13/2003
| | | | |
|
Title:
|
METHOD OF FORMING A METAL OXIDE FILM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2005
|
Application #:
|
10133386
|
Filing Dt:
|
04/29/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/30/2003
| | | | |
|
Title:
|
SYNCHRONOUS DRAM WITH SELECTABLE INTERNAL PREFETCH SIZE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2004
|
Application #:
|
10134132
|
Filing Dt:
|
04/29/2002
|
|
Publication #:
|
|
Pub Dt:
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10/31/2002
| | | | |
|
Title:
|
TEST APPARATUS FOR PARALLEL TESTING A NUMBER OF ELECTRONIC COMPONENTS AND A METHOD FOR CALIBRATING THE TEST APPARATUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2003
|
Application #:
|
10134753
|
Filing Dt:
|
04/30/2002
|
|
Title:
|
LOW POWER CONTENT ADDRESSABLE MEMORY ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2004
|
Application #:
|
10140280
|
Filing Dt:
|
05/06/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
|
Title:
|
DELAY CIRCUIT OF CLOCK SYNCHRONIZATION DEVICE USING DELAY CELLS HAVING WIDE DELAY RANGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2003
|
Application #:
|
10141881
|
Filing Dt:
|
05/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/14/2002
| | | | |
|
Title:
|
CAPACITOR OF AN INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/2004
|
Application #:
|
10142773
|
Filing Dt:
|
05/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2002
| | | | |
|
Title:
|
METHOD FOR FABRICATING A CAPACITOR OF A SEMICONDUCTOR DEVICE AND A CAPACITOR MADE THEREBY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2004
|
Application #:
|
10143264
|
Filing Dt:
|
05/08/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2002
| | | | |
|
Title:
|
METHODS OF FORMING FIELD EFFECT TRANSISTORS AND RELATED FIELD EFFECT TRANSISTOR CONSTRUCTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/2004
|
Application #:
|
10145250
|
Filing Dt:
|
05/14/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2002
| | | | |
|
Title:
|
CAPACITOR STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2004
|
Application #:
|
10145435
|
Filing Dt:
|
05/14/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/03/2002
| | | | |
|
Title:
|
CAPACITOR STRUCTURE
|
|
