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Reel/Frame:036797/0356   Pages: 92
Recorded: 10/06/2015
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR'S NAME PREVIOUSLY RECORDED AT REEL: 036711 FRAME: 0160. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER.
Total properties: 340
Page 2 of 4
Pages: 1 2 3 4
1
Patent #:
7126365
Issue Dt:
10/24/2006
Application #:
10870752
Filing Dt:
06/16/2004
Publication #:
US20050212543
Pub Dt:
09/29/2005
Title:
SYSTEM AND METHOD FOR MEASURING NEGATIVE BIAS THERMAL INSTABILITY WITH A RING OSCILLATOR
2
Patent #:
7151417
Issue Dt:
12/19/2006
Application #:
10870754
Filing Dt:
06/16/2004
Title:
SYSTEM AND METHOD FOR CHARACTERIZING A POTENTIAL DISTRIBUTION
3
Patent #:
7774625
Issue Dt:
08/10/2010
Application #:
10874407
Filing Dt:
06/22/2004
Title:
ADAPTIVE VOLTAGE CONTROL BY ACCESSING INFORMATION STORED WITHIN AND SPECIFIC TO A MICROPROCESSOR
4
Patent #:
7562233
Issue Dt:
07/14/2009
Application #:
10874772
Filing Dt:
06/22/2004
Title:
ADAPTIVE CONTROL OF OPERATING AND BODY BIAS VOLTAGES
5
Patent #:
7304503
Issue Dt:
12/04/2007
Application #:
10879645
Filing Dt:
06/28/2004
Publication #:
US20050270067
Pub Dt:
12/08/2005
Title:
REPEATER CIRCUIT WITH HIGH PERFORMANCE REPEATER MODE AND NORMAL REPEATER MODE, WHEREIN HIGH PERFORMANCE REPEATER MODE HAS FAST RESET CAPABILITY
6
Patent #:
7142018
Issue Dt:
11/28/2006
Application #:
10879807
Filing Dt:
06/28/2004
Publication #:
US20050270068
Pub Dt:
12/08/2005
Title:
CIRCUITS AND METHODS FOR DETECTING AND ASSISTING WIRE TRANSITIONS
7
Patent #:
7173455
Issue Dt:
02/06/2007
Application #:
10879808
Filing Dt:
06/28/2004
Publication #:
US20050270069
Pub Dt:
12/08/2005
Title:
REPEATER CIRCUIT HAVING DIFFERENT OPERATING AND RESET VOLTAGE RANGES, AND METHODS THEREOF
8
Patent #:
7119580
Issue Dt:
10/10/2006
Application #:
10879879
Filing Dt:
06/28/2004
Publication #:
US20050270070
Pub Dt:
12/08/2005
Title:
REPEATER CIRCUIT WITH HIGH PERFORMANCE REPEATER MODE AND NORMAL REPEATER MODE
9
Patent #:
7337307
Issue Dt:
02/26/2008
Application #:
10938091
Filing Dt:
09/10/2004
Title:
EXCEPTION HANDLING WITH INSERTED STATUS CHECK COMMAND ACCOMMODATING FLOATING POINT INSTRUCTION FORWARD MOVE ACROSS BRANCH
10
Patent #:
7180322
Issue Dt:
02/20/2007
Application #:
10956207
Filing Dt:
09/30/2004
Title:
CLOSED LOOP FEEDBACK CONTROL OF INTEGRATED CIRCUITS
11
Patent #:
7112978
Issue Dt:
09/26/2006
Application #:
10956217
Filing Dt:
09/30/2004
Title:
FREQUENCY SPECIFIC CLOSED LOOP FEEDBACK CONTROL OF INTEGRATED CIRCUITS
12
Patent #:
7256639
Issue Dt:
08/14/2007
Application #:
10956218
Filing Dt:
09/30/2004
Title:
SYSTEMS AND METHODS FOR INTEGRATED CIRCUITS COMPRISING MULTIPLE BODY BIAS DOMAINS
13
Patent #:
7509504
Issue Dt:
03/24/2009
Application #:
10956219
Filing Dt:
09/30/2004
Title:
SYSTEMS AND METHODS FOR CONTROL OF INTEGRATED CIRCUITS COMPRISING BODY BIASING SYSTEMS
14
Patent #:
7859062
Issue Dt:
12/28/2010
Application #:
10956722
Filing Dt:
09/30/2004
Title:
SYSTEMS AND METHODS FOR INTEGRATED CIRCUITS COMPRISING MULTIPLE BODY BIASING DOMAINS
15
Patent #:
7108420
Issue Dt:
09/19/2006
Application #:
10961311
Filing Dt:
10/07/2004
Title:
SYSTEM FOR ON-CHIP TEMPERATURE MEASUREMENT IN INTEGRATED CIRCUITS
16
Patent #:
7313779
Issue Dt:
12/25/2007
Application #:
10964409
Filing Dt:
10/12/2004
Title:
METHOD AND SYSTEM FOR TILING A BIAS DESIGN TO FACILITATE EFFICIENT DESIGN RULE CHECKING
17
Patent #:
7496868
Issue Dt:
02/24/2009
Application #:
10964448
Filing Dt:
10/12/2004
Title:
METHOD AND SYSTEM FOR AUTOMATED SCHEMATIC DIAGRAM CONVERSION TO SUPPORT SEMICONDUCTOR BODY BIAS DESIGNS
18
Patent #:
7640450
Issue Dt:
12/29/2009
Application #:
10980127
Filing Dt:
11/01/2004
Title:
METHOD AND APPARATUS FOR HANDLING NESTED FAULTS
19
Patent #:
7330080
Issue Dt:
02/12/2008
Application #:
10981964
Filing Dt:
11/04/2004
Title:
RING BASED IMPEDANCE CONTROL OF AN OUTPUT DRIVER
20
Patent #:
7667288
Issue Dt:
02/23/2010
Application #:
10990885
Filing Dt:
11/16/2004
Publication #:
US20060102960
Pub Dt:
05/18/2006
Title:
SYSTEMS AND METHODS FOR VOLTAGE DISTRIBUTION VIA EPITAXIAL LAYERS
21
Patent #:
7598573
Issue Dt:
10/06/2009
Application #:
10990886
Filing Dt:
11/16/2004
Publication #:
US20060102958
Pub Dt:
05/18/2006
Title:
SYSTEMS AND METHODS FOR VOLTAGE DISTRIBUTION VIA MULTIPLE EPITAXIAL LAYERS
22
Patent #:
7295041
Issue Dt:
11/13/2007
Application #:
11005762
Filing Dt:
12/06/2004
Title:
CIRCUITS AND METHODS FOR DETECTING AND ASSISTING WIRE TRANSITIONS
23
Patent #:
7802223
Issue Dt:
09/21/2010
Application #:
11018880
Filing Dt:
12/20/2004
Title:
METHOD AND SYSTEM FOR CONFIGURABLE CONTACTS FOR IMPLEMENTING DIFFERENT BIAS DESIGNS OF AN INTEGRATED CIRCUIT DEVICE
24
Patent #:
7310008
Issue Dt:
12/18/2007
Application #:
11020746
Filing Dt:
12/23/2004
Title:
CONFIGURABLE DELAY CHAIN WITH STACKED INVERTER DELAY ELEMENTS
25
Patent #:
7332931
Issue Dt:
02/19/2008
Application #:
11021197
Filing Dt:
12/23/2004
Title:
LEAKAGE EFFICIENT ANTI-GLITCH FILTER WITH VARIABLE DELAY STAGES
26
Patent #:
7656212
Issue Dt:
02/02/2010
Application #:
11021221
Filing Dt:
12/23/2004
Title:
CONFIGURABLE DELAY CHAIN WITH SWITCHING CONTROL FOR TAIL DELAY ELEMENTS
27
Patent #:
7635992
Issue Dt:
12/22/2009
Application #:
11021222
Filing Dt:
12/23/2004
Title:
CONFIGURABLE TAPERED DELAY CHAIN WITH MULTIPLE SIZES OF DELAY ELEMENTS
28
Patent #:
7498846
Issue Dt:
03/03/2009
Application #:
11021632
Filing Dt:
12/23/2004
Title:
POWER EFFICIENT MULTIPLEXER
29
Patent #:
7330054
Issue Dt:
02/12/2008
Application #:
11021633
Filing Dt:
12/23/2004
Title:
LEAKAGE EFFICIENT ANTI-GLITCH FILTER
30
Patent #:
7334109
Issue Dt:
02/19/2008
Application #:
11026623
Filing Dt:
12/30/2004
Title:
METHOD AND APPARATUS FOR IMPROVING SEGMENTED MEMORY ADDRESSING
31
Patent #:
7793347
Issue Dt:
09/07/2010
Application #:
11053080
Filing Dt:
02/07/2005
Publication #:
US20060179483
Pub Dt:
08/10/2006
Title:
METHOD AND SYSTEM FOR VALIDATING A COMPUTER SYSTEM
32
Patent #:
7212064
Issue Dt:
05/01/2007
Application #:
11056549
Filing Dt:
02/11/2005
Title:
METHODS AND SYSTEMS FOR MEASURING TEMPERATURE USING DIGITAL SIGNALS
33
Patent #:
7694113
Issue Dt:
04/06/2010
Application #:
11069497
Filing Dt:
02/28/2005
Title:
METHOD FOR TRANSLATING INSTRUCTIONS IN A SPECULATIVE MICROPROCESSOR
34
Patent #:
7038483
Issue Dt:
05/02/2006
Application #:
11070630
Filing Dt:
03/01/2005
Title:
SYSTEM AND METHOD FOR MEASURING TRANSISTOR LEAKAGE CURRENT WITH A RING OSCILLATOR
35
Patent #:
7331041
Issue Dt:
02/12/2008
Application #:
11077623
Filing Dt:
03/10/2005
Title:
METHOD OF OPTIMIZING COMPILER VS INTERPRETER MODE OPERATION IN A CODE TRANSLATOR BASED UPON AMOUNT OF TIME SPENT IN EACH MODE
36
Patent #:
7724027
Issue Dt:
05/25/2010
Application #:
11096354
Filing Dt:
03/31/2005
Publication #:
US20060220678
Pub Dt:
10/05/2006
Title:
METHOD AND SYSTEM FOR ELASTIC SIGNAL PIPELINING
37
Patent #:
7227397
Issue Dt:
06/05/2007
Application #:
11096770
Filing Dt:
03/31/2005
Title:
SYSTEM, METHOD AND CIRCUITS FOR GENERATING A SIGNAL
38
Patent #:
7734892
Issue Dt:
06/08/2010
Application #:
11096922
Filing Dt:
03/31/2005
Title:
MEMORY PROTECTION AND ADDRESS TRANSLATION HARDWARE SUPPORT FOR VIRTUAL MACHINES
39
Patent #:
7376798
Issue Dt:
05/20/2008
Application #:
11102127
Filing Dt:
04/07/2005
Title:
MEMORY MANAGEMENT METHODS AND SYSTEMS THAT SUPPORT CACHE CONSISTENCY
40
Patent #:
8751753
Issue Dt:
06/10/2014
Application #:
11102171
Filing Dt:
04/07/2005
Title:
Coherence de-coupling buffer
41
Patent #:
7971002
Issue Dt:
06/28/2011
Application #:
11102538
Filing Dt:
04/07/2005
Title:
MAINTAINING INSTRUCTION COHERENCY IN A TRANSLATION-BASED COMPUTER SYSTEM ARCHITECTURE
42
Patent #:
7617088
Issue Dt:
11/10/2009
Application #:
11110085
Filing Dt:
01/18/2005
Title:
INTERPAGE PROLOGUE TO PROTECT VIRTUAL ADDRESS MAPPINGS
43
Patent #:
7495497
Issue Dt:
02/24/2009
Application #:
11125555
Filing Dt:
05/09/2005
Title:
TEMPERATURE COMPENSATED INTEGRATED CIRCUITS
44
Patent #:
8803584
Issue Dt:
08/12/2014
Application #:
11132052
Filing Dt:
05/17/2005
Title:
Level shifter for noise and leakage suppression
45
Patent #:
7242205
Issue Dt:
07/10/2007
Application #:
11136038
Filing Dt:
05/23/2005
Title:
SYSTEM AND METHOD FOR REDUCING HEAT DISSIPATION DURING BURN-IN
46
Patent #:
7463050
Issue Dt:
12/09/2008
Application #:
11139116
Filing Dt:
05/26/2005
Title:
SYSTEM AND METHOD FOR CONTROLLING TEMPERATURE DURING BURN-IN
47
Patent #:
7600166
Issue Dt:
10/06/2009
Application #:
11169403
Filing Dt:
06/28/2005
Title:
METHOD AND SYSTEM FOR PROVIDING TRUSTED ACCESS TO A JTAG SCAN INTERFACE IN A MICROPROCESSOR
48
Patent #:
8413162
Issue Dt:
04/02/2013
Application #:
11169404
Filing Dt:
06/28/2005
Title:
MULTI-THREADING BASED ON ROLLBACK
49
Patent #:
7730440
Issue Dt:
06/01/2010
Application #:
11171668
Filing Dt:
06/30/2005
Publication #:
US20070025493
Pub Dt:
02/01/2007
Title:
CLOCK SIGNAL DISTRIBUTION SYSTEM AND METHOD
50
Patent #:
7217962
Issue Dt:
05/15/2007
Application #:
11171673
Filing Dt:
06/30/2005
Title:
WIRE MESH PATTERNS FOR SEMICONDUCTOR DEVICES
51
Patent #:
7663408
Issue Dt:
02/16/2010
Application #:
11171695
Filing Dt:
06/30/2005
Publication #:
US20070008012
Pub Dt:
01/11/2007
Title:
SCANNABLE DYNAMIC CIRCUIT LATCH
52
Patent #:
7375556
Issue Dt:
05/20/2008
Application #:
11171845
Filing Dt:
06/30/2005
Title:
ADVANCED REPEATER UTILIZING SIGNAL DISTRIBUTION DELAY
53
Patent #:
7405597
Issue Dt:
07/29/2008
Application #:
11172013
Filing Dt:
06/30/2005
Title:
ADVANCED REPEATER WITH DUTY CYCLE ADJUSTMENT
54
Patent #:
7256634
Issue Dt:
08/14/2007
Application #:
11176918
Filing Dt:
07/06/2005
Publication #:
US20070008021
Pub Dt:
01/11/2007
Title:
ELASTIC PIPELINE LATCH WITH A SAFE MODE
55
Patent #:
7305647
Issue Dt:
12/04/2007
Application #:
11193723
Filing Dt:
07/28/2005
Title:
USING STANDARD PATTERN TILES AND CUSTOM PATTERN TILES TO GENERATE A SEMICONDUCTOR DESIGN LAYOUT HAVING A DEEP WELL STRUCTURE FOR ROUTING BODY-BIAS VOLTAGE
56
Patent #:
7211478
Issue Dt:
05/01/2007
Application #:
11199896
Filing Dt:
08/08/2005
Title:
DIAGONAL DEEP WELL REGION FOR ROUTING BODY-BIAS VOLTAGE FOR MOSFETS IN SURFACE WELL REGIONS
57
Patent #:
7221189
Issue Dt:
05/22/2007
Application #:
11199950
Filing Dt:
08/08/2005
Title:
DYNAMIC NODE KEEPER SYSTEM AND METHOD
58
Patent #:
7730330
Issue Dt:
06/01/2010
Application #:
11201624
Filing Dt:
08/10/2005
Title:
A SYSTEM AND METHOD FOR SAVING AND RESTORING A PROCESSOR STATE WITHOUT EXECUTING ANY INSTRUCTIONS FROM A FIRST INSTRUCTION SET
59
Patent #:
7949864
Issue Dt:
05/24/2011
Application #:
11238446
Filing Dt:
09/28/2005
Title:
BALANCED ADAPTIVE BODY BIAS CONTROL
60
Patent #:
7334173
Issue Dt:
02/19/2008
Application #:
11241104
Filing Dt:
09/29/2005
Publication #:
US20070022341
Pub Dt:
01/25/2007
Title:
METHOD AND SYSTEM FOR PROTECTING PROCESSORS FROM UNAUTHORIZED DEBUG ACCESS
61
Patent #:
7786756
Issue Dt:
08/31/2010
Application #:
11241552
Filing Dt:
09/30/2005
Title:
METHOD AND SYSTEM FOR LATCHUP SUPPRESSION
62
Patent #:
7315178
Issue Dt:
01/01/2008
Application #:
11248440
Filing Dt:
10/11/2005
Title:
SYSTEM AND METHOD FOR MEASURING NEGATIVE BIAS THERMAL INSTABILITY WITH A RING OSCILLATOR
63
Patent #:
8055877
Issue Dt:
11/08/2011
Application #:
11248813
Filing Dt:
10/11/2005
Title:
TRANSLATED MEMORY PROTECTION APPARATUS FOR AN ADVANCED MICROPROCESSOR
64
Patent #:
7235998
Issue Dt:
06/26/2007
Application #:
11269989
Filing Dt:
11/08/2005
Title:
SYSTEM AND METHOD FOR MEASURING TIME DEPENDENT DIELECTRIC BREAKDOWN WITH A RING OSCILLATOR
65
Patent #:
7394681
Issue Dt:
07/01/2008
Application #:
11273897
Filing Dt:
11/14/2005
Title:
COLUMN SELECT MULTIPLEXER CIRCUIT FOR A DOMINO RANDOM ACCESS MEMORY ARRAY
66
Patent #:
7755193
Issue Dt:
07/13/2010
Application #:
11274098
Filing Dt:
11/14/2005
Title:
NON-RECTILINEAR ROUTING IN RECTILINEAR MESH OF A METALLIZATION LAYER OF AN INTREGRATED CIRCUIT
67
Patent #:
7496727
Issue Dt:
02/24/2009
Application #:
11296591
Filing Dt:
12/06/2005
Title:
SECURE MEMORY ACCESS SYSTEM AND METHOD
68
Patent #:
7676629
Issue Dt:
03/09/2010
Application #:
11314494
Filing Dt:
12/20/2005
Title:
DATA STRUCTURE FOR ENFORCING CONSISTENT PER-PHYSICAL PAGE CACHEABILITY ATTRIBUTES
69
Patent #:
7414485
Issue Dt:
08/19/2008
Application #:
11322595
Filing Dt:
12/30/2005
Title:
CIRCUITS, SYSTEMS AND METHODS RELATING TO DYNAMIC RING OSCILLATORS
70
Patent #:
7642866
Issue Dt:
01/05/2010
Application #:
11322896
Filing Dt:
12/30/2005
Title:
CIRCUITS, SYSTEMS AND METHODS RELATING TO A DYNAMIC DUAL DOMINO RING OSCILLATOR
71
Patent #:
7719344
Issue Dt:
05/18/2010
Application #:
11358482
Filing Dt:
02/21/2006
Title:
STABILIZATION COMPONENT FOR A SUBSTRATE POTENTIAL REGULATION CIRCUIT
72
Patent #:
7579221
Issue Dt:
08/25/2009
Application #:
11393555
Filing Dt:
03/29/2006
Title:
CONVERSION OF AN SOI DESIGN LAYOUT TO A BULK DESIGN LAYOUT
73
Patent #:
8522253
Issue Dt:
08/27/2013
Application #:
11394521
Filing Dt:
03/31/2006
Title:
Hardware support for virtual machine and operating system context switching in translation lookaside buffers and virtually tagged caches
74
Patent #:
8067970
Issue Dt:
11/29/2011
Application #:
11395017
Filing Dt:
03/31/2006
Publication #:
US20070247197
Pub Dt:
10/25/2007
Title:
MULTI-WRITE MEMORY CIRCUIT WITH A DATA INPUT AND A CLOCK INPUT
75
Patent #:
7904789
Issue Dt:
03/08/2011
Application #:
11395710
Filing Dt:
03/31/2006
Title:
TECHNIQUES FOR DETECTING AND CORRECTING ERRORS IN A MEMORY DEVICE
76
Patent #:
7592836
Issue Dt:
09/22/2009
Application #:
11396114
Filing Dt:
03/31/2006
Title:
MULTI-WRITE MEMORY CIRCUIT WITH MULTIPLE DATA INPUTS
77
Patent #:
7816742
Issue Dt:
10/19/2010
Application #:
11400368
Filing Dt:
04/06/2006
Title:
SYSTEMS AND METHODS FOR INTEGRATED CIRCUITS COMPRISING MULTIPLE BODY BIASING DOMAINS
78
Patent #:
7634635
Issue Dt:
12/15/2009
Application #:
11400631
Filing Dt:
04/07/2006
Title:
SYSTEMS AND METHODS FOR REORDERING PROCESSOR INSTRUCTIONS
79
Patent #:
7596708
Issue Dt:
09/29/2009
Application #:
11411309
Filing Dt:
04/25/2006
Title:
ADAPTIVE POWER CONTROL
80
Patent #:
7646228
Issue Dt:
01/12/2010
Application #:
11435692
Filing Dt:
05/16/2006
Title:
INVERTING ZIPPER REPEATER CIRCUIT
81
Patent #:
7620779
Issue Dt:
11/17/2009
Application #:
11439361
Filing Dt:
05/22/2006
Title:
SYSTEM AND METHOD FOR HANDLING DIRECT MEMORY ACCESSES
82
Patent #:
7380096
Issue Dt:
05/27/2008
Application #:
11449950
Filing Dt:
06/08/2006
Title:
SYSTEM AND METHOD FOR IDENTIFYING TLB ENTRIES ASSOCIATED WITH A PHYSICAL ADDRESS OF A SPECIFIED RANGE
83
Patent #:
7645664
Issue Dt:
01/12/2010
Application #:
11449952
Filing Dt:
06/08/2006
Title:
LAYOUT PATTERN FOR DEEP WELL REGION TO FACILITATE ROUTING BODY-BIAS VOLTAGE
84
Patent #:
7380098
Issue Dt:
05/27/2008
Application #:
11454355
Filing Dt:
06/16/2006
Title:
METHOD AND SYSTEM FOR CACHING ATTRIBUTE DATA FOR MATCHING ATTRIBUTES WITH PHYSICAL ADDRESSES
85
Patent #:
7652507
Issue Dt:
01/26/2010
Application #:
11473608
Filing Dt:
06/22/2006
Title:
CIRCUITS AND METHODS FOR DETECTING AND ASSISTING WIRE TRANSITIONS
86
Patent #:
7689963
Issue Dt:
03/30/2010
Application #:
11477970
Filing Dt:
06/28/2006
Title:
DOUBLE DIAMOND CLOCK AND POWER DISTRIBUTION
87
Patent #:
8661265
Issue Dt:
02/25/2014
Application #:
11479486
Filing Dt:
06/29/2006
Title:
Processor modifications to increase computer system security
88
Patent #:
7661086
Issue Dt:
02/09/2010
Application #:
11479616
Filing Dt:
06/30/2006
Title:
ENHANCED CLOCK SIGNAL FLEXIBLE DISTRIBUTION SYSTEM AND METHOD
89
Patent #:
7710153
Issue Dt:
05/04/2010
Application #:
11479618
Filing Dt:
06/30/2006
Title:
CROSS POINT SWITCH
90
Patent #:
7747896
Issue Dt:
06/29/2010
Application #:
11479630
Filing Dt:
06/30/2006
Title:
DUAL PORTED REPLICATED DATA CACHE
91
Patent #:
7925815
Issue Dt:
04/12/2011
Application #:
11479703
Filing Dt:
06/29/2006
Title:
Modifications to increase computer system security
92
Patent #:
7495466
Issue Dt:
02/24/2009
Application #:
11480107
Filing Dt:
06/30/2006
Title:
TRIPLE LATCH FLIP FLOP SYSTEM AND METHOD
93
Patent #:
7336092
Issue Dt:
02/26/2008
Application #:
11490356
Filing Dt:
07/19/2006
Title:
CLOSED LOOP FEEDBACK CONTROL OF INTEGRATED CIRCUITS
94
Patent #:
8041876
Issue Dt:
10/18/2011
Application #:
11500575
Filing Dt:
08/07/2006
Title:
METHOD AND SYSTEM FOR PROVIDING HARDWARE SUPPORT FOR MEMORY PROTECTION AND VIRTUAL MEMORY ADDRESS TRANSLATION FOR A VIRTUAL MACHINE
95
Patent #:
7404181
Issue Dt:
07/22/2008
Application #:
11507779
Filing Dt:
08/21/2006
Title:
SWITCHING TO ORIGINAL CODE COMPARISON OF MODIFIABLE CODE FOR TRANSLATED CODE VALIDITY WHEN FREQUENCY OF DETECTING MEMORY OVERWRITES EXCEEDS THRESHOLD
96
Patent #:
7336090
Issue Dt:
02/26/2008
Application #:
11512900
Filing Dt:
08/29/2006
Title:
FREQUENCY SPECIFIC CLOSED LOOP FEEDBACK CONTROL OF INTEGRATED CIRCUITS
97
Patent #:
7644210
Issue Dt:
01/05/2010
Application #:
11524044
Filing Dt:
09/19/2006
Title:
A METHOD AND SYSTEM FOR STORING AND RETRIEVING A TRANSLATION OF TARGET PROGRAM INSTRUCTION FROM A HOST PROCESSOR USING FAST LOOK-UP OF INDIRECT BRANCH DESTINATION IN A DYNAMIC TRANSLATION SYSTEM
98
Patent #:
7626409
Issue Dt:
12/01/2009
Application #:
11528031
Filing Dt:
09/26/2006
Title:
FREQUENCY SPECIFIC CLOSED LOOP FEEDBACK CONTROL OF INTEGRATED CIRCUITS
99
Patent #:
7917772
Issue Dt:
03/29/2011
Application #:
11529865
Filing Dt:
09/29/2006
Title:
DYNAMIC CHIP CONTROL
100
Patent #:
7683442
Issue Dt:
03/23/2010
Application #:
11529972
Filing Dt:
09/29/2006
Title:
RAISED SOURCE/DRAIN WITH SUPER STEEP RETROGRADE CHANNEL
Assignor
1
INTELLECTUAL VENTURES FUNDING LLC
Exec Dt:
08/27/2015
Assignee
1
INTELLECTUAL VENTURES HOLDING 81 LLC
7251 W. LAKE MEAD BLVD
STE 300
LAS VEGAS, NEVADA 89128
Correspondence name and address
MURABITO, HAO & BARNES LLP
TWO NORTH MARKET STREET
THIRD FLOOR
SAN JOSE, CA 95113

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