Total properties:
340
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4
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4
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1 2 3 4
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13103952
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Filing Dt:
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05/09/2011
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Publication #:
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Pub Dt:
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09/08/2011
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Title:
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ADAPTIVE POWER CONTROL
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13113798
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Filing Dt:
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05/23/2011
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Publication #:
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Pub Dt:
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09/15/2011
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Title:
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BALANCED ADAPTIVE BODY BIAS CONTROL
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13118762
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Filing Dt:
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05/31/2011
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Publication #:
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Pub Dt:
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09/22/2011
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Title:
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ADAPTIVE POWER CONTROL BASED ON POST PACKAGE CHARACTERIZATION OF INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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10/01/2013
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Application #:
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13155291
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Filing Dt:
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06/07/2011
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Publication #:
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Pub Dt:
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09/29/2011
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Title:
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SYSTEM AND METHOD OF INSTRUCTION MODIFICATION
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Patent #:
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Issue Dt:
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01/22/2013
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Application #:
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13165560
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Filing Dt:
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06/21/2011
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Publication #:
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Pub Dt:
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06/21/2012
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Title:
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SECURE MEMORY ACCESS SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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02/05/2013
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Application #:
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13168800
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Filing Dt:
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06/24/2011
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Publication #:
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Pub Dt:
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06/28/2012
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Title:
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METHOD AND SYSTEM FOR CACHING ATTRIBUTE DATA FOR MATCHING ATTRIBUTES WITH PHYSICAL ADDRESSES
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Patent #:
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Issue Dt:
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12/11/2012
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Application #:
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13168894
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Filing Dt:
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06/24/2011
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Publication #:
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Pub Dt:
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06/28/2012
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Title:
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INVERTING ZIPPER REPEATER CIRCUIT
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Patent #:
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Issue Dt:
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02/05/2013
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Application #:
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13168896
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Filing Dt:
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06/24/2011
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Publication #:
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Pub Dt:
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10/20/2011
| | | | |
Title:
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SOFTWARE CONTROLLED TRANSISTOR BODY BIAS
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Patent #:
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Issue Dt:
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10/30/2012
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Application #:
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13214593
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Filing Dt:
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08/22/2011
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Publication #:
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Pub Dt:
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12/08/2011
| | | | |
Title:
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FORMATION OF A SUPER STEEP RETROGRADE CHANNEL
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Patent #:
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Issue Dt:
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06/11/2013
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Application #:
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13221812
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Filing Dt:
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08/30/2011
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Publication #:
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Pub Dt:
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03/29/2012
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Title:
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SETTING A FLAG BIT TO DEFER EVENT HANDLING TO ONE OF MULTIPLE SAFE POINTS IN AN INSTRUCTION STREAM
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Patent #:
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Issue Dt:
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08/13/2013
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Application #:
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13227166
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Filing Dt:
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09/07/2011
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Publication #:
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Pub Dt:
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12/29/2011
| | | | |
Title:
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SIGNAL GENERATOR WITH OUTPUT FREQUENCY GREATER THAN THE OSCILLATOR FREQUENCY
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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13235301
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Filing Dt:
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09/16/2011
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Publication #:
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Pub Dt:
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01/05/2012
| | | | |
Title:
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FREQUENCY SPECIFIC CLOSED LOOP FEEDBACK CONTROL OF INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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05/28/2013
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Application #:
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13236554
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Filing Dt:
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09/19/2011
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Publication #:
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Pub Dt:
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09/27/2012
| | | | |
Title:
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ADVANCED REPEATER WITH DUTY CYCLE ADJUSTMENT
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Patent #:
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Issue Dt:
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12/25/2012
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Application #:
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13242070
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Filing Dt:
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09/23/2011
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Publication #:
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Pub Dt:
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01/19/2012
| | | | |
Title:
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METHOD AND SYSTEM FOR PROVIDING HARDWARE SUPPORT FOR MEMORY PROTECTION AND VIRTUAL MEMORY ADDRESS TRANSLATION FOR A VIRTUAL MACHINE
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Patent #:
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Issue Dt:
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05/06/2014
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Application #:
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13243943
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Filing Dt:
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09/23/2011
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Publication #:
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Pub Dt:
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05/03/2012
| | | | |
Title:
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TRANSLATED MEMORY PROTECTION APPARATUS FOR AN ADVANCED MICROPROCESSOR
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Patent #:
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Issue Dt:
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12/29/2015
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Application #:
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13243976
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Filing Dt:
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09/23/2011
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Publication #:
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Pub Dt:
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01/19/2012
| | | | |
Title:
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SYSTEM FOR ON-CHIP TEMPERATURE MEASUREMENT IN INTEGRATED CIRCUITS
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Patent #:
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|
Issue Dt:
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11/19/2013
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Application #:
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13356396
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Filing Dt:
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01/23/2012
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Publication #:
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Pub Dt:
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09/27/2012
| | | | |
Title:
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POWER EFFICIENT MULTIPLEXER
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|
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Patent #:
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Issue Dt:
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08/20/2013
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Application #:
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13362863
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Filing Dt:
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01/31/2012
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Publication #:
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Pub Dt:
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06/28/2012
| | | | |
Title:
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PIPELINE REPLAY SUPPORT FOR MULTICYCLE OPERATIONS
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Patent #:
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Issue Dt:
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12/10/2013
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Application #:
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13363050
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Filing Dt:
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01/31/2012
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Publication #:
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Pub Dt:
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05/24/2012
| | | | |
Title:
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DATA STRUCTURE FOR ENFORCING CONSISTENT PER-PHYSICAL PAGE CACHEABILITY ATTRIBUTES
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13370241
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Filing Dt:
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02/09/2012
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Publication #:
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Pub Dt:
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08/16/2012
| | | | |
Title:
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STORING CONTEXT INFORMATION PRIOR TO NOT SUPPLYING POWER TO A PROCESSOR
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Patent #:
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Issue Dt:
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06/04/2013
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Application #:
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13406434
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Filing Dt:
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02/27/2012
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Publication #:
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Pub Dt:
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06/28/2012
| | | | |
Title:
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SYSTEMS AND METHODS FOR CONTROL OF INTEGRATED CIRCUITS COMPRISING BODY BIASING SYSTEMS
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|
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Patent #:
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Issue Dt:
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06/04/2013
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Application #:
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13411469
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Filing Dt:
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03/02/2012
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Publication #:
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Pub Dt:
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09/27/2012
| | | | |
Title:
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SUPPORTING MULTIPLE BYTE ORDER FORMATS IN A COMPUTER SYSTEM
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Patent #:
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Issue Dt:
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01/14/2014
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Application #:
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13461588
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Filing Dt:
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05/01/2012
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Publication #:
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Pub Dt:
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08/23/2012
| | | | |
Title:
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PRECISE CONTROL COMPONENT FOR A SUBSTARATE POTENTIAL REGULATION CIRCUIT
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|
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Patent #:
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|
Issue Dt:
|
07/14/2015
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Application #:
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13488138
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Filing Dt:
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06/04/2012
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Publication #:
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Pub Dt:
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09/27/2012
| | | | |
Title:
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METHOD AND APPARATUS FOR ENHANCING SCHEDULING IN AN ADVANCED MICROPROCESSOR
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|
|
Patent #:
|
|
Issue Dt:
|
05/16/2017
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Application #:
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13532517
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Filing Dt:
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06/25/2012
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Publication #:
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Pub Dt:
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10/18/2012
| | | | |
Title:
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PROCESSING BYPASS DIRECTORY TRACKING SYSTEM AND METHOD
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|
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Patent #:
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|
Issue Dt:
|
08/04/2015
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Application #:
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13550459
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Filing Dt:
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07/16/2012
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Publication #:
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Pub Dt:
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11/08/2012
| | | | |
Title:
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SYSTEMS AND METHODS FOR ADJUSTING THRESHOLD VOLTAGE
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Patent #:
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Issue Dt:
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08/02/2016
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Application #:
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13587827
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Filing Dt:
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08/16/2012
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Publication #:
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Pub Dt:
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12/20/2012
| | | | |
Title:
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CLOSED LOOP FEEDBACK CONTROL OF INTEGRATED CIRCUITS
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|
|
Patent #:
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|
Issue Dt:
|
10/22/2013
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Application #:
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13714328
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Filing Dt:
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12/13/2012
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Publication #:
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Pub Dt:
|
05/02/2013
| | | | |
Title:
|
METHOD AND SYSTEM FOR CACHING ATTRIBUTE DATA FOR MATCHING ATTRIBUTES WITH PHYSICAL ADDRESSES
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|
|
Patent #:
|
|
Issue Dt:
|
12/03/2013
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Application #:
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13714351
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Filing Dt:
|
12/13/2012
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Publication #:
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Pub Dt:
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04/25/2013
| | | | |
Title:
|
SECURE MEMORY ACCESS SYSTEM AND METHOD
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|
|
Patent #:
|
|
Issue Dt:
|
10/01/2013
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Application #:
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13714356
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Filing Dt:
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12/13/2012
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Publication #:
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|
Pub Dt:
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04/25/2013
| | | | |
Title:
|
METHOD AND SYSTEM FOR PROVIDING HARDWARE SUPPORT FOR MEMORY PROTECTION AND VIRTUAL MEMORY ADDRESS TRANSLATION FOR A VIRTUAL MACHINE
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|
|
Patent #:
|
|
Issue Dt:
|
08/12/2014
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Application #:
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13725901
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Filing Dt:
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12/21/2012
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Publication #:
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Pub Dt:
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05/23/2013
| | | | |
Title:
|
ADAPTIVE POWER CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/2015
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Application #:
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13731491
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Filing Dt:
|
12/31/2012
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Publication #:
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|
Pub Dt:
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01/09/2014
| | | | |
Title:
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ADAPTIVE CONTROL OF OPERATING AND BODY BIAS VOLTAGES
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|
Patent #:
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|
Issue Dt:
|
11/25/2014
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Application #:
|
13741246
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Filing Dt:
|
01/14/2013
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Publication #:
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|
Pub Dt:
|
01/30/2014
| | | | |
Title:
|
SOFTWARE CONTROLLED TRANSISTOR BODY BIAS
|
|
|
Patent #:
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NONE
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Issue Dt:
|
|
Application #:
|
13950495
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Filing Dt:
|
07/25/2013
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Publication #:
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Pub Dt:
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11/21/2013
| | | | |
Title:
|
MAINTAINING PROCESSOR CONTEXT BEFORE ENTERING POWER SAVING MODE
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Patent #:
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|
Issue Dt:
|
12/30/2014
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Application #:
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14033314
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Filing Dt:
|
09/20/2013
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Title:
|
METHOD AND SYSTEM FOR CACHING ATTRIBUTE DATA FOR MATCHING ATTRIBUTES WITH PHYSICAL ADDRESSES
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|
|
Patent #:
|
|
Issue Dt:
|
10/13/2015
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Application #:
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14083348
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Filing Dt:
|
11/18/2013
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Publication #:
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|
Pub Dt:
|
03/13/2014
| | | | |
Title:
|
POWER EFFICIENT MULTIPLEXER
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|
|
Patent #:
|
|
Issue Dt:
|
01/17/2017
|
Application #:
|
14091255
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Filing Dt:
|
11/26/2013
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Publication #:
|
|
Pub Dt:
|
03/27/2014
| | | | |
Title:
|
FREQUENCY SPECIFIC CLOSED LOOP FEEDBACK CONTROL OF INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2018
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Application #:
|
14143926
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Filing Dt:
|
12/30/2013
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Publication #:
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Pub Dt:
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04/24/2014
| | | | |
Title:
|
METHOD FOR INCREASING THE SPEED OF SPECULATIVE EXECUTION
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|
|
Patent #:
|
|
Issue Dt:
|
08/02/2016
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Application #:
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14160200
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Filing Dt:
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01/21/2014
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Publication #:
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|
Pub Dt:
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05/15/2014
| | | | |
Title:
|
BODY-BIAS VOLTAGE ROUTING STRUCTURES
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|
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Patent #:
|
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Issue Dt:
|
01/31/2017
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Application #:
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14295062
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Filing Dt:
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06/03/2014
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Publication #:
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Pub Dt:
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09/25/2014
| | | | |
Title:
|
COHERENCE DE-COUPLING BUFFER
|
|