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Reel/Frame:039277/0363   Pages: 6
Recorded: 07/07/2016
Attorney Dkt #:113585-0101
Conveyance: CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
Total properties: 6
1
Patent #:
Issue Dt:
11/23/2010
Application #:
12419599
Filing Dt:
04/07/2009
Publication #:
Pub Dt:
07/01/2010
Title:
ERROR ESTIMATION AND CORRECTION IN A TWO-CHANNEL TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTER
2
Patent #:
Issue Dt:
11/23/2010
Application #:
12691449
Filing Dt:
01/21/2010
Publication #:
Pub Dt:
10/07/2010
Title:
CALIBRATION OF OFFSET, GAIN AND PHASE ERRORS IN M-CHANNEL TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTERS
3
Patent #:
Issue Dt:
10/04/2011
Application #:
12765615
Filing Dt:
04/22/2010
Publication #:
Pub Dt:
05/05/2011
Title:
FINE RESISTANCE ADJUSTMENT FOR POLYSILICON
4
Patent #:
Issue Dt:
09/18/2012
Application #:
12818762
Filing Dt:
06/18/2010
Publication #:
Pub Dt:
05/05/2011
Title:
BACKGROUND CALIBRATION OF OFFSETS IN INTERLEAVED ANALOG TO DIGITAL CONVERTERS
5
Patent #:
Issue Dt:
11/04/2014
Application #:
13683118
Filing Dt:
11/21/2012
Title:
ERROR ESTIMATION AND CORRECTION IN A TWO-CHANNEL TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTER
6
Patent #:
Issue Dt:
01/20/2015
Application #:
13683139
Filing Dt:
11/21/2012
Title:
CALIBRATION OF OFFSET GAIN AND PHASE ERRORS IN M-CHANNEL TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTERS
Assignor
1
Exec Dt:
12/27/2011
Assignee
1
1001 MURPHY RANCH ROAD
MILPITAS, CALIFORNIA 95035
Correspondence name and address
MARK J. DANIELSON
975 PAGE MILL ROAD
FOLEY & LARDNER, LLP
PALO ALTO, CA 94304-1013

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