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Total properties:
20
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Patent #:
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Issue Dt:
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05/05/1998
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Application #:
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08703388
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Filing Dt:
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08/26/1996
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Title:
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DRAM IMPLEMENTATION FOR MORE EFFICIENT USE OF SILICON AREA
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Patent #:
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Issue Dt:
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11/18/1997
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Application #:
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08739868
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Filing Dt:
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10/31/1996
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Title:
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SYSTEM AND METHOD FOR PROVIDING EFFICIENT ACCESS TO A MEMORY BANK
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Patent #:
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Issue Dt:
|
09/15/1998
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Application #:
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08740320
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Filing Dt:
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10/28/1996
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Title:
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ADAPTIVE AUTO REFRESH
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Patent #:
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Issue Dt:
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12/26/2000
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Application #:
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08820541
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Filing Dt:
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03/19/1997
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Title:
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METHOD AND SYSTEM FOR IMPROVED Z-TEST DURING IMAGE RENDERING
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Patent #:
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Issue Dt:
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02/29/2000
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Application #:
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08834550
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Filing Dt:
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03/19/1997
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Title:
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CIRCUIT AND METHOD FOR REDUCING LOCK-IN TIME IN PHASE-LOCKED AND DELAY-LOCKED LOOPS
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Patent #:
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Issue Dt:
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09/07/1999
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Application #:
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08879069
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Filing Dt:
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06/19/1997
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Title:
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DUAL-EDGE EXTENDED DATA OUT MEMORY
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Patent #:
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Issue Dt:
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04/27/1999
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Application #:
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08879208
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Filing Dt:
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06/19/1997
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Title:
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REDUNDANCY PROGRAMMING CIRCUIT AND SYSTEM FOR SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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02/15/2000
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Application #:
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08947754
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Filing Dt:
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10/08/1997
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Title:
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SELF-BOOTSTRAPPING WORD-LINE DRIVER CIRCUIT AND METHOD
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Patent #:
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Issue Dt:
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08/15/2000
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Application #:
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09055566
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Filing Dt:
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04/06/1998
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Title:
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METHOD AND SYSTEM FOR IMPROVED MEMORY INTERFACE DURING IMAGE RENDERING
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Patent #:
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Issue Dt:
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05/30/2000
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Application #:
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09083790
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Filing Dt:
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05/22/1998
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Title:
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CIRCUIT AND METHOD FOR REDUCING DELAY LINE LENGTH IN DELAY-LOCKED LOOPS
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Patent #:
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Issue Dt:
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08/01/2000
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Application #:
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09088426
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Filing Dt:
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06/01/1998
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Title:
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METHOD AND STRUCTURE FOR REFRESH OPERATION WITH A LOW VOLTAGE OF LOGIC HIGH IN A MEMORY DEVICE
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Patent #:
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Issue Dt:
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06/05/2001
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Application #:
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09399116
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Filing Dt:
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09/20/1999
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Title:
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DELAY LOCK LOOP CIRCUIT, SYSTEM AND METHOD FOR SYNCHRONIZING A REFERENCE SIGNAL WITH AN OUTPUT SIGNAL
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Patent #:
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Issue Dt:
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10/29/2002
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Application #:
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09464327
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Filing Dt:
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12/15/1999
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Title:
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METHOD AND SYSTEM FOR CONCURRENT PROCESSING OF SLICES OF A BITSTREAM IN A MULTIPROCESSOR (MP) SYSTEM
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Patent #:
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Issue Dt:
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12/03/2002
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Application #:
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09464331
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Filing Dt:
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12/15/1999
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Title:
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METHOD AND SYSTEM FOR GENERATING CRT TIMING SIGNALS IN A GRAPHICS ACCELERATOR
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Patent #:
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Issue Dt:
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11/18/2003
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Application #:
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09542893
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Filing Dt:
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04/04/2000
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Title:
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METHOD AND SYSTEM FOR MULTIPLE COLUMN SYNDROME GENERATION
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Patent #:
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Issue Dt:
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02/24/2004
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Application #:
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09560877
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Filing Dt:
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04/28/2000
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Title:
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METHOD AND SYSTEM FOR PROVIDING TIMING ADJUSTMENT TO PERFORM RELIABLE OPTICAL RECORDING AT HIGH SPEEDS
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Patent #:
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Issue Dt:
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02/17/2004
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Application #:
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09595423
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Filing Dt:
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06/15/2000
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Title:
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METHOD AND SYSTEM FOR WINDOW REALIGNMENT USING PIPELINE AND SYNC CORRECTION TO CORRECT DATA FRAME BOUNDARIES
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Patent #:
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Issue Dt:
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02/03/2004
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Application #:
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09596861
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Filing Dt:
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06/19/2000
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Title:
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AUTOMATED SERVO CONTROL SYSTEM
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Patent #:
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Issue Dt:
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02/10/2004
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Application #:
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09652254
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Filing Dt:
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08/30/2000
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Title:
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INTEGRATED CONTROLLER TO PROCESS BOTH OPTICAL READS AND OPTICAL WRITES OF MULTIPLE OPTICAL MEDIA
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Patent #:
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Issue Dt:
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02/17/2004
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Application #:
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09656502
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Filing Dt:
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09/07/2000
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Title:
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METHOD AND SYSTEM FOR AUTOMATICALLY VALIDATING A HEADER SEARCH IN READING DATA FROM AN OPTICAL MEDIUM
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