Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 020325/0366 | |
| Pages: | 4 |
| | Recorded: | 01/07/2008 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
5
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Patent #:
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Issue Dt:
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10/26/1999
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Application #:
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09047751
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Filing Dt:
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03/25/1998
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Title:
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OBTAINING ACCURATE ON-CHIP TIME-CONSTANTS AND CONDUCTANCES
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Patent #:
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Issue Dt:
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04/10/2007
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Application #:
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11129996
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Filing Dt:
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05/16/2005
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Publication #:
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Pub Dt:
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11/17/2005
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Title:
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DUTY-CYCLE CORRECTION CIRCUIT
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Patent #:
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Issue Dt:
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04/29/2008
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Application #:
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11239200
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Filing Dt:
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09/30/2005
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Publication #:
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Pub Dt:
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07/27/2006
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Title:
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SYSTEM AND METHOD FOR JITTER CONTROL
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Patent #:
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Issue Dt:
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11/11/2008
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Application #:
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11732901
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Filing Dt:
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04/05/2007
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Publication #:
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Pub Dt:
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10/25/2007
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Title:
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SWITCHED-CAPACITOR RESET ARCHITECTURE FOR OPAMP
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Patent #:
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Issue Dt:
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05/01/2012
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Application #:
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11998695
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Filing Dt:
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11/30/2007
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Publication #:
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Pub Dt:
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06/05/2008
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Title:
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SERIALIZER DESERIALIZER CIRCUITS
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Assignee
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| 970 FRASER DRIVE |
| BURLINGTON, ONTARIO, CANADA L7L 5M4 |
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Correspondence name and address
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BLAKE, CASSELS & GRAYDON LLP
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BOX 25, COMMERCE COURT WEST
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199 BAY STREET, SUITE 2800
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TORONTO, ON CANADA M5L 1A9
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