skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:033706/0367   Pages: 143
Recorded: 09/09/2014
Attorney Dkt #:046660-0056
Conveyance: U.S. PATENT SECURITY AGREEMENT (FOR NON-U.S. GRANTORS)
Total properties: 1430
Page 13 of 15
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
1
Patent #:
8625352
Issue Dt:
01/07/2014
Application #:
13099791
Filing Dt:
05/03/2011
Publication #:
US20120127798
Pub Dt:
05/24/2012
Title:
METHOD AND APPARATUS FOR SHARING INTERNAL POWER SUPPLIES IN INTEGRATED CIRCUIT DEVICES
2
Patent #:
NONE
Issue Dt:
Application #:
13102310
Filing Dt:
05/06/2011
Publication #:
US20110276775
Pub Dt:
11/10/2011
Title:
METHOD AND APPARATUS FOR CONCURRENTLY READING A PLURALITY OF MEMORY DEVICES USING A SINGLE BUFFER
3
Patent #:
RE43947
Issue Dt:
01/29/2013
Application #:
13105749
Filing Dt:
05/11/2011
Title:
DELAY LOCKED LOOP CIRCUIT AND METHOD
4
Patent #:
8526227
Issue Dt:
09/03/2013
Application #:
13110399
Filing Dt:
05/18/2011
Publication #:
US20110317482
Pub Dt:
12/29/2011
Title:
PHASE CHANGE MEMORY WORD LINE DRIVER
5
Patent #:
8296598
Issue Dt:
10/23/2012
Application #:
13113550
Filing Dt:
05/23/2011
Publication #:
US20110228626
Pub Dt:
09/22/2011
Title:
DOUBLE DATA RATE OUTPUT CIRCUIT AND METHOD
6
Patent #:
8274825
Issue Dt:
09/25/2012
Application #:
13114523
Filing Dt:
05/24/2011
Publication #:
US20110222350
Pub Dt:
09/15/2011
Title:
MULTI-LEVEL CELL ACCESS BUFFER WITH DUAL FUNCTION
7
Patent #:
8724382
Issue Dt:
05/13/2014
Application #:
13117715
Filing Dt:
05/27/2011
Publication #:
US20110317487
Pub Dt:
12/29/2011
Title:
MULTIPLE-BIT PER CELL (MBC) NON-VOLATILE MEMORY APPARATUS AND SYSTEM HAVING POLARITY CONTROL AND METHOD OF PROGRAMMING SAME
8
Patent #:
8125257
Issue Dt:
02/28/2012
Application #:
13117934
Filing Dt:
05/27/2011
Publication #:
US20110316598
Pub Dt:
12/29/2011
Title:
APPARATUS AND METHOD FOR MODELING COARSE STEPSIZE DELAY ELEMENT AND DELAY LOCKED LOOP USING SAME
9
Patent #:
8125256
Issue Dt:
02/28/2012
Application #:
13152478
Filing Dt:
06/03/2011
Publication #:
US20110234308
Pub Dt:
09/29/2011
Title:
BIAS GENERATOR PROVIDING FOR LOW POWER, SELF-BIASED DELAY ELEMENT AND DELAY LINE
10
Patent #:
8208306
Issue Dt:
06/26/2012
Application #:
13154891
Filing Dt:
06/07/2011
Publication #:
US20110235424
Pub Dt:
09/29/2011
Title:
HIERARCHICAL COMMON SOURCE LINE STRUCTURE IN NAND FLASH MEMORY
11
Patent #:
8134406
Issue Dt:
03/13/2012
Application #:
13158862
Filing Dt:
06/13/2011
Publication #:
US20120001684
Pub Dt:
01/05/2012
Title:
SYSTEMS AND METHODS FOR MINIMIZING STATIC LEAKAGE OF AN INTEGRATED CIRCUIT
12
Patent #:
8270244
Issue Dt:
09/18/2012
Application #:
13159060
Filing Dt:
06/13/2011
Publication #:
US20110242906
Pub Dt:
10/06/2011
Title:
DUAL FUNCTION COMPATIBLE NON-VOLATILE MEMORY DEVICE
13
Patent #:
8782590
Issue Dt:
07/15/2014
Application #:
13164362
Filing Dt:
06/20/2011
Publication #:
US20120043812
Pub Dt:
02/23/2012
Title:
POWER MANAGERS FOR AN INTEGRATED CIRCUIT
14
Patent #:
8230129
Issue Dt:
07/24/2012
Application #:
13168157
Filing Dt:
06/24/2011
Publication #:
US20110258399
Pub Dt:
10/20/2011
Title:
APPARATUS AND METHOD FOR IDENTIFYING DEVICE TYPES OF SERIES-CONNECTED DEVICES OF MIXED TYPE
15
Patent #:
8213240
Issue Dt:
07/03/2012
Application #:
13169231
Filing Dt:
06/27/2011
Publication #:
US20110267896
Pub Dt:
11/03/2011
Title:
NON-VOLATILE SEMICONDUCTOR MEMORY WITH PAGE ERASE
16
Patent #:
8743610
Issue Dt:
06/03/2014
Application #:
13171667
Filing Dt:
06/29/2011
Publication #:
US20110255339
Pub Dt:
10/20/2011
Title:
METHOD AND SYSTEM FOR ACCESSING A FLASH MEMORY DEVICE
17
Patent #:
8213561
Issue Dt:
07/03/2012
Application #:
13186104
Filing Dt:
07/19/2011
Publication #:
US20110291721
Pub Dt:
12/01/2011
Title:
WIDE FREQUENCY RANGE DELAY LOCKED LOOP
18
Patent #:
9484097
Issue Dt:
11/01/2016
Application #:
13186789
Filing Dt:
07/20/2011
Publication #:
US20120020155
Pub Dt:
01/26/2012
Title:
MULTIPAGE PROGRAM SCHEME FOR FLASH MEMORY
19
Patent #:
8630304
Issue Dt:
01/14/2014
Application #:
13204145
Filing Dt:
08/05/2011
Publication #:
US20110286455
Pub Dt:
11/24/2011
Title:
METHOD AND APPARATUS FOR REDUCING POOL STARVATION IN A SHARED MEMORY SWITCH
20
Patent #:
8300468
Issue Dt:
10/30/2012
Application #:
13208732
Filing Dt:
08/12/2011
Publication #:
US20110299331
Pub Dt:
12/08/2011
Title:
FLASH MEMORY PROGRAM INHIBIT SCHEME
21
Patent #:
8235755
Issue Dt:
08/07/2012
Application #:
13213761
Filing Dt:
08/19/2011
Publication #:
US20110299810
Pub Dt:
12/08/2011
Title:
MODULAR OUTLET
22
Patent #:
8880780
Issue Dt:
11/04/2014
Application #:
13215789
Filing Dt:
08/23/2011
Publication #:
US20110314206
Pub Dt:
12/22/2011
Title:
APPARATUS AND METHOD FOR USING A PAGE BUFFER OF A MEMORY DEVICE AS A TEMPORARY CACHE
23
Patent #:
8913443
Issue Dt:
12/16/2014
Application #:
13236381
Filing Dt:
09/19/2011
Publication #:
US20130070540
Pub Dt:
03/21/2013
Title:
VOLTAGE REGULATION FOR 3D PACKAGES AND METHOD OF MANUFACTURING SAME
24
Patent #:
8503250
Issue Dt:
08/06/2013
Application #:
13237202
Filing Dt:
09/20/2011
Publication #:
US20120008426
Pub Dt:
01/12/2012
Title:
HIGH SPEED DRAM ARCHITECTURE WITH UNIFORM ACCESS LATENCY
25
Patent #:
8391064
Issue Dt:
03/05/2013
Application #:
13239813
Filing Dt:
09/22/2011
Publication #:
US20120023285
Pub Dt:
01/26/2012
Title:
NON-VOLATILE MEMORY WITH DYNAMIC MULTI-MODE OPERATION
26
Patent #:
NONE
Issue Dt:
Application #:
13239977
Filing Dt:
09/22/2011
Publication #:
US20120096292
Pub Dt:
04/19/2012
Title:
METHOD, SYSTEM AND APPARATUS FOR MULTI-LEVEL PROCESSING
27
Patent #:
8847623
Issue Dt:
09/30/2014
Application #:
13248330
Filing Dt:
09/29/2011
Publication #:
US20120019282
Pub Dt:
01/26/2012
Title:
DYNAMIC IMPEDANCE CONTROL FOR INPUT/OUTPUT BUFFERS
28
Patent #:
8351265
Issue Dt:
01/08/2013
Application #:
13249744
Filing Dt:
09/30/2011
Publication #:
US20120020168
Pub Dt:
01/26/2012
Title:
POWER SUPPLIES IN FLASH MEMORY DEVICES AND SYSTEMS
29
Patent #:
8886871
Issue Dt:
11/11/2014
Application #:
13250301
Filing Dt:
09/30/2011
Publication #:
US20120023286
Pub Dt:
01/26/2012
Title:
APPARATUS AND METHOD OF PAGE PROGRAM OPERATION FOR MEMORY DEVICES WITH MIRROR BACK-UP OF DATA
30
Patent #:
8360810
Issue Dt:
01/29/2013
Application #:
13253166
Filing Dt:
10/05/2011
Publication #:
US20120028506
Pub Dt:
02/02/2012
Title:
MODULAR OUTLET
31
Patent #:
8379450
Issue Dt:
02/19/2013
Application #:
13276856
Filing Dt:
10/19/2011
Publication #:
US20120033497
Pub Dt:
02/09/2012
Title:
NON-VOLATILE MEMORY DEVICE HAVING CONFIGURABLE PAGE SIZE
32
Patent #:
8222937
Issue Dt:
07/17/2012
Application #:
13283023
Filing Dt:
10/27/2011
Publication #:
US20120098581
Pub Dt:
04/26/2012
Title:
CHARGE PUMP FOR PLL/DLL
33
Patent #:
8471591
Issue Dt:
06/25/2013
Application #:
13284338
Filing Dt:
10/28/2011
Publication #:
US20120126849
Pub Dt:
05/24/2012
Title:
TERMINATION CIRCUIT FOR ON-DIE TERMINATION
34
Patent #:
8416633
Issue Dt:
04/09/2013
Application #:
13291360
Filing Dt:
11/08/2011
Publication #:
US20120057416
Pub Dt:
03/08/2012
Title:
SRAM LEAKAGE REDUCTION CIRCUIT
35
Patent #:
NONE
Issue Dt:
Application #:
13293778
Filing Dt:
11/10/2011
Publication #:
US20120120549
Pub Dt:
05/17/2012
Title:
Mixed Composition Interface Layer and Method of Forming
36
Patent #:
8558573
Issue Dt:
10/15/2013
Application #:
13295433
Filing Dt:
11/14/2011
Publication #:
US20120056643
Pub Dt:
03/08/2012
Title:
SYSTEM FOR TRANSMISSION LINE TERMINATION BY SIGNAL CANCELLATION
37
Patent #:
8498543
Issue Dt:
07/30/2013
Application #:
13296530
Filing Dt:
11/15/2011
Publication #:
US20120057881
Pub Dt:
03/08/2012
Title:
DISPERSION TOLERANT OPTICAL SYSTEM AND METHOD
38
Patent #:
8843694
Issue Dt:
09/23/2014
Application #:
13302413
Filing Dt:
11/22/2011
Publication #:
US20120066442
Pub Dt:
03/15/2012
Title:
SYSTEM AND METHOD OF PAGE BUFFER OPERATION FOR MEMORY DEVICES
39
Patent #:
8526260
Issue Dt:
09/03/2013
Application #:
13305064
Filing Dt:
11/28/2011
Publication #:
US20120069693
Pub Dt:
03/22/2012
Title:
DYNAMIC RANDOM ACCESS MEMORY AND BOOSTED VOLTAGE PRODUCER THEREFOR
40
Patent #:
8601231
Issue Dt:
12/03/2013
Application #:
13327154
Filing Dt:
12/15/2011
Publication #:
US20120144131
Pub Dt:
06/07/2012
Title:
SEMICONDUCTOR MEMORY ASYNCHRONOUS PIPELINE
41
Patent #:
8462551
Issue Dt:
06/11/2013
Application #:
13328762
Filing Dt:
12/16/2011
Publication #:
US20120087193
Pub Dt:
04/12/2012
Title:
FLASH MULTI-LEVEL THRESHOLD DISTRIBUTION SCHEME
42
Patent #:
8619493
Issue Dt:
12/31/2013
Application #:
13348107
Filing Dt:
01/11/2012
Publication #:
US20120113721
Pub Dt:
05/10/2012
Title:
FLEXIBLE MEMORY OPERATIONS IN NAND FLASH DEVICES
43
Patent #:
8582598
Issue Dt:
11/12/2013
Application #:
13351874
Filing Dt:
01/17/2012
Publication #:
US20120185908
Pub Dt:
07/19/2012
Title:
LOCAL AREA NETWORK FOR DISTRIBUTING DATA COMMUNICATION, SENSING AND CONTROL SIGNALS
44
Patent #:
8665696
Issue Dt:
03/04/2014
Application #:
13355851
Filing Dt:
01/23/2012
Publication #:
US20120163511
Pub Dt:
06/28/2012
Title:
FREQUENCY DIVISION MULTIPLEXING SYSTEM WITH SELECTABLE RATE
45
Patent #:
8363444
Issue Dt:
01/29/2013
Application #:
13365895
Filing Dt:
02/03/2012
Publication #:
US20120134194
Pub Dt:
05/31/2012
Title:
BRIDGE DEVICE ARCHITECTURE FOR CONNECTING DISCRETE MEMORY DEVICES TO A SYSTEM
46
Patent #:
8537617
Issue Dt:
09/17/2013
Application #:
13365913
Filing Dt:
02/03/2012
Publication #:
US20120262986
Pub Dt:
10/18/2012
Title:
SOURCE SIDE ASYMMETRICAL PRECHARGE PROGRAMMING SCHEME
47
Patent #:
NONE
Issue Dt:
Application #:
13369593
Filing Dt:
02/09/2012
Publication #:
US20120137070
Pub Dt:
05/31/2012
Title:
METHOD AND APPARATUS FOR PROVIDING A PACKET BUFFER RANDOM ACCESS MEMORY
48
Patent #:
NONE
Issue Dt:
Application #:
13384009
Filing Dt:
03/07/2012
Publication #:
US20120156689
Pub Dt:
06/21/2012
Title:
METHOD AND APPARATUS FOR DETERMINING AN ANALYTE PARAMETER
49
Patent #:
9071169
Issue Dt:
06/30/2015
Application #:
13385403
Filing Dt:
02/17/2012
Publication #:
US20120212075
Pub Dt:
08/23/2012
Title:
Programmable gate controller system and method
50
Patent #:
9213630
Issue Dt:
12/15/2015
Application #:
13399587
Filing Dt:
02/17/2012
Publication #:
US20120215967
Pub Dt:
08/23/2012
Title:
NON-VOLATILE MEMORY DEVICES AND CONTROL AND OPERATION THEREOF
51
Patent #:
8825967
Issue Dt:
09/02/2014
Application #:
13401087
Filing Dt:
02/21/2012
Publication #:
US20130151757
Pub Dt:
06/13/2013
Title:
INDEPENDENT WRITE AND READ CONTROL IN SERIALLY-CONNECTED DEVICES
52
Patent #:
8456208
Issue Dt:
06/04/2013
Application #:
13405645
Filing Dt:
02/27/2012
Publication #:
US20120212267
Pub Dt:
08/23/2012
Title:
CIRCUIT FOR CLAMPING CURRENT IN A CHARGE PUMP
53
Patent #:
RE45247
Issue Dt:
11/18/2014
Application #:
13405703
Filing Dt:
02/27/2012
Title:
DUTY CYCLE CORRECTION CIRCUIT OF DELAY LOCKED LOOP AND DELAY LOCKED LOOP HAVING THE DUTY CYCLE CORRECTION CIRCUIT
54
Patent #:
9685536
Issue Dt:
06/20/2017
Application #:
13407855
Filing Dt:
02/29/2012
Publication #:
US20120211824
Pub Dt:
08/23/2012
Title:
A VERTICAL TRANSISTOR HAVING A VERTICAL GATE STRUCTURE HAVING A TOP OR UPPER SURFACE DEFINING A FACET FORMED BETWEEN A VERTICAL SOURCE AND A VERTICAL DRAIN.
55
Patent #:
8359485
Issue Dt:
01/22/2013
Application #:
13408252
Filing Dt:
02/29/2012
Publication #:
US20120159055
Pub Dt:
06/21/2012
Title:
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE WITH POWER SAVING FEATURE
56
Patent #:
8493808
Issue Dt:
07/23/2013
Application #:
13418478
Filing Dt:
03/13/2012
Publication #:
US20120170395
Pub Dt:
07/05/2012
Title:
DATA FLOW CONTROL IN MULTIPLE INDEPENDENT PORT
57
Patent #:
8611171
Issue Dt:
12/17/2013
Application #:
13423901
Filing Dt:
03/19/2012
Publication #:
US20120176118
Pub Dt:
07/12/2012
Title:
VOLTAGE DOWN CONVERTER FOR HIGH SPEED MEMORY
58
Patent #:
NONE
Issue Dt:
Application #:
13425801
Filing Dt:
03/21/2012
Publication #:
US20130128678
Pub Dt:
05/23/2013
Title:
POWER SAVING METHODS FOR USE IN A SYSTEM OF SERIALLY CONNECTED SEMICONDUCTOR DEVICES
59
Patent #:
8718056
Issue Dt:
05/06/2014
Application #:
13437177
Filing Dt:
04/02/2012
Publication #:
US20120243411
Pub Dt:
09/27/2012
Title:
TRUNKING IN A MATRIX
60
Patent #:
8547827
Issue Dt:
10/01/2013
Application #:
13448520
Filing Dt:
04/17/2012
Publication #:
US20120201132
Pub Dt:
08/09/2012
Title:
DYNAMIC TRAFFIC REARRANGEMENT AND RESTORATION FOR MPLS NETWORKS WITH DIFFERENTIATED SERVICES CAPABILITIES
61
Patent #:
9588883
Issue Dt:
03/07/2017
Application #:
13455780
Filing Dt:
04/25/2012
Publication #:
US20130080730
Pub Dt:
03/28/2013
Title:
FLASH MEMORY SYSTEM
62
Patent #:
8427897
Issue Dt:
04/23/2013
Application #:
13463339
Filing Dt:
05/03/2012
Publication #:
US20120215974
Pub Dt:
08/23/2012
Title:
MEMORY WITH OUTPUT CONTROL
63
Patent #:
8837502
Issue Dt:
09/16/2014
Application #:
13467399
Filing Dt:
05/09/2012
Publication #:
US20120219010
Pub Dt:
08/30/2012
Title:
PORT PACKET QUEUING
64
Patent #:
8854884
Issue Dt:
10/07/2014
Application #:
13467491
Filing Dt:
05/09/2012
Publication #:
US20120218829
Pub Dt:
08/30/2012
Title:
NAND FLASH ARCHITECTURE WITH MULTI-LEVEL ROW DECODING
65
Patent #:
8762923
Issue Dt:
06/24/2014
Application #:
13473129
Filing Dt:
05/16/2012
Publication #:
US20120256485
Pub Dt:
10/11/2012
Title:
POWER MANAGERS FOR AN INTEGRATED CIRCUIT
66
Patent #:
8456922
Issue Dt:
06/04/2013
Application #:
13477431
Filing Dt:
05/22/2012
Publication #:
US20120230119
Pub Dt:
09/13/2012
Title:
Method for Erasing Memory Cells in a Flash Memory Device Using a Positive Well Bias Voltage and a Negative Word Line Voltage
67
Patent #:
8675410
Issue Dt:
03/18/2014
Application #:
13481888
Filing Dt:
05/28/2012
Publication #:
US20120236647
Pub Dt:
09/20/2012
Title:
HIERARCHICAL COMMON SOURCE LINE STRUCTURE IN NAND FLASH MEMORY
68
Patent #:
8559422
Issue Dt:
10/15/2013
Application #:
13483726
Filing Dt:
05/30/2012
Publication #:
US20120307990
Pub Dt:
12/06/2012
Title:
TELEPHONE COMMUNICATION SYSTEM OVER A SINGLE TELEPHONE LINE
69
Patent #:
8513112
Issue Dt:
08/20/2013
Application #:
13484824
Filing Dt:
05/31/2012
Publication #:
US20120235295
Pub Dt:
09/20/2012
Title:
BARRIER-METAL-FREE COPPER DAMASCENE TECHNOLOGY USING ENHANCED REFLOW
70
Patent #:
8411812
Issue Dt:
04/02/2013
Application #:
13523406
Filing Dt:
06/14/2012
Publication #:
US20130003483
Pub Dt:
01/03/2013
Title:
WIDE FREQUENCY RANGE DELAY LOCKED LOOP
71
Patent #:
8559237
Issue Dt:
10/15/2013
Application #:
13523628
Filing Dt:
06/14/2012
Publication #:
US20120250413
Pub Dt:
10/04/2012
Title:
NON-VOLATILE SEMICONDUCTOR MEMORY WITH PAGE ERASE
72
Patent #:
8503598
Issue Dt:
08/06/2013
Application #:
13532980
Filing Dt:
06/26/2012
Publication #:
US20120306548
Pub Dt:
12/06/2012
Title:
INITIALIZATION CIRCUIT FOR DELAY LOCKED LOOP
73
Patent #:
8854077
Issue Dt:
10/07/2014
Application #:
13569613
Filing Dt:
08/08/2012
Publication #:
US20130027125
Pub Dt:
01/31/2013
Title:
LOW LEAKAGE AND DATA RETENTION CIRCUITRY
74
Patent #:
NONE
Issue Dt:
Application #:
13588195
Filing Dt:
08/17/2012
Publication #:
US20130094271
Pub Dt:
04/18/2013
Title:
CONNECTION OF MULTIPLE SEMICONDUCTOR MEMORY DEVICES WITH CHIP ENABLE FUNCTION
75
Patent #:
8549250
Issue Dt:
10/01/2013
Application #:
13590795
Filing Dt:
08/21/2012
Publication #:
US20130042024
Pub Dt:
02/14/2013
Title:
APPARATUS AND METHOD FOR PRODUCING IDS FOR INTERCONNECTED DEVICES OF MIXED TYPE
76
Patent #:
8559261
Issue Dt:
10/15/2013
Application #:
13592953
Filing Dt:
08/23/2012
Publication #:
US20120320693
Pub Dt:
12/20/2012
Title:
DUAL FUNCTION COMPATIBLE NON-VOLATILE MEMORY DEVICE
77
Patent #:
8565026
Issue Dt:
10/22/2013
Application #:
13595466
Filing Dt:
08/27/2012
Publication #:
US20120320674
Pub Dt:
12/20/2012
Title:
MULTI-LEVEL CELL ACCESS BUFFER WITH DUAL FUNCTION
78
Patent #:
8699288
Issue Dt:
04/15/2014
Application #:
13599836
Filing Dt:
08/30/2012
Publication #:
US20120320695
Pub Dt:
12/20/2012
Title:
Pre-Charge Voltage Generation and Power Saving Modes
79
Patent #:
RE44697
Issue Dt:
01/07/2014
Application #:
13603137
Filing Dt:
09/04/2012
Title:
Encryption Processor with Shared Memory Interconnect
80
Patent #:
8558593
Issue Dt:
10/15/2013
Application #:
13607015
Filing Dt:
09/07/2012
Publication #:
US20130015898
Pub Dt:
01/17/2013
Title:
FREQUENCY-DOUBLING DELAY LOCKED LOOP
81
Patent #:
8738879
Issue Dt:
05/27/2014
Application #:
13608605
Filing Dt:
09/10/2012
Publication #:
US20130003470
Pub Dt:
01/03/2013
Title:
INDEPENDENT LINK AND BANK SELECTION
82
Patent #:
8797799
Issue Dt:
08/05/2014
Application #:
13611580
Filing Dt:
09/12/2012
Publication #:
US20130176788
Pub Dt:
07/11/2013
Title:
DEVICE SELECTION SCHEMES IN MULTI CHIP PACKAGE NAND FLASH MEMORY SYSTEM
83
Patent #:
8713374
Issue Dt:
04/29/2014
Application #:
13614573
Filing Dt:
09/13/2012
Publication #:
US20130010538
Pub Dt:
01/10/2013
Title:
MEMORY DEVICE AND METHOD FOR REPAIRING A SEMICONDUCTOR MEMORY
84
Patent #:
NONE
Issue Dt:
Application #:
13615068
Filing Dt:
09/13/2012
Publication #:
US20130004655
Pub Dt:
01/03/2013
Title:
FLOW-FILL SPACER STRUCTURES FOR FLAT PANEL DISPLAY DEVICE
85
Patent #:
8848725
Issue Dt:
09/30/2014
Application #:
13617753
Filing Dt:
09/14/2012
Publication #:
US20130011143
Pub Dt:
01/10/2013
Title:
NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS
86
Patent #:
9213389
Issue Dt:
12/15/2015
Application #:
13617908
Filing Dt:
09/14/2012
Publication #:
US20130010563
Pub Dt:
01/10/2013
Title:
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE WITH POWER-SAVING FEATURE
87
Patent #:
8879351
Issue Dt:
11/04/2014
Application #:
13618022
Filing Dt:
09/14/2012
Publication #:
US20130044543
Pub Dt:
02/21/2013
Title:
NON-VOLATILE MEMORY BANK AND PAGE BUFFER THEREFOR
88
Patent #:
8553485
Issue Dt:
10/08/2013
Application #:
13618250
Filing Dt:
09/14/2012
Publication #:
US20130010562
Pub Dt:
01/10/2013
Title:
DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR SELF-REFRESHING MEMORY CELLS WITH TEMPERATURE COMPENSATED SELF-REFRESH
89
Patent #:
8891322
Issue Dt:
11/18/2014
Application #:
13621486
Filing Dt:
09/17/2012
Publication #:
US20130070547
Pub Dt:
03/21/2013
Title:
MEMORY SYSTEM WITH A LAYER COMPRISING A DEDICATED REDUNDANCY AREA
90
Patent #:
NONE
Issue Dt:
Application #:
13621887
Filing Dt:
09/18/2012
Publication #:
US20130068509
Pub Dt:
03/21/2013
Title:
METHOD AND APPARATUS FOR CONNECTING INLAID CHIP INTO PRINTED CIRCUIT BOARD
91
Patent #:
8533522
Issue Dt:
09/10/2013
Application #:
13624487
Filing Dt:
09/21/2012
Publication #:
US20130024717
Pub Dt:
01/24/2013
Title:
DOUBLE DATA RATE OUTPUT CIRCUIT
92
Patent #:
9057119
Issue Dt:
06/16/2015
Application #:
13634685
Filing Dt:
11/16/2012
Publication #:
US20130133485
Pub Dt:
05/30/2013
Title:
METHOD OF OXIDATIVE LEACHING OF MOLYBDENUM-RHENIUM SULFIDE ORES AND/OR CONCENTRATES
93
Patent #:
NONE
Issue Dt:
Application #:
13636547
Filing Dt:
09/21/2012
Publication #:
US20130033929
Pub Dt:
02/07/2013
Title:
WRITE SCHEME IN A PHASE CHANGE MEMORY
94
Patent #:
NONE
Issue Dt:
Application #:
13636574
Filing Dt:
09/21/2012
Publication #:
US20130016557
Pub Dt:
01/17/2013
Title:
SEMICONDUCTOR MEMORY DEVICE HAVING A THREE-DIMENSIONAL STRUCTURE
95
Patent #:
NONE
Issue Dt:
Application #:
13636585
Filing Dt:
09/21/2012
Publication #:
US20130021844
Pub Dt:
01/24/2013
Title:
PHASE CHANGE MEMORY WITH DOUBLE WRITE DRIVERS
96
Patent #:
9009423
Issue Dt:
04/14/2015
Application #:
13643317
Filing Dt:
11/06/2012
Publication #:
US20130086334
Pub Dt:
04/04/2013
Title:
SERIALLY CONNECTED MEMORY HAVING SUBDIVIDED DATA INTERFACE
97
Patent #:
8824231
Issue Dt:
09/02/2014
Application #:
13644528
Filing Dt:
10/04/2012
Publication #:
US20130083615
Pub Dt:
04/04/2013
Title:
REDUCED NOISE DRAM SENSING
98
Patent #:
8619473
Issue Dt:
12/31/2013
Application #:
13649403
Filing Dt:
10/11/2012
Publication #:
US20130033941
Pub Dt:
02/07/2013
Title:
NON-VOLATILE SEMICONDUCTOR MEMORY HAVING MULTIPLE EXTERNAL POWER SUPPLIES
99
Patent #:
8743643
Issue Dt:
06/03/2014
Application #:
13650580
Filing Dt:
10/12/2012
Publication #:
US20130070539
Pub Dt:
03/21/2013
Title:
DYNAMIC RANDOM ACCESS MEMORY WITH FULLY INDEPENDENT PARTIAL ARRAY REFRESH FUNCTION
100
Patent #:
NONE
Issue Dt:
Application #:
13652947
Filing Dt:
10/16/2012
Publication #:
US20130343123
Pub Dt:
12/26/2013
Title:
FLASH MEMORY PROGRAM INHIBIT SCHEME
Assignor
1
CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Exec Dt:
06/11/2014
Assignees
1
CPPIB CREDIT INVESTMENTS INC., AS LENDER
QUEEN STREET EAST, SUITE 2500
TORONTO, CANADA M5C 2W5
2
ROYAL BANK OF CANADA, AS LENDER
20 KING STREET WEST, 4TH FLOOR
TORONTO, CANADA M5H 1C4
Correspondence name and address
LATHAM & WATKINS LLP
650 TOWN CENTER DRIVE, 20TH FLOOR
COSTA MESA, CA 92626

Search Results as of: 06/23/2024 12:05 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT