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Reel/Frame:033706/0367   Pages: 143
Recorded: 09/09/2014
Attorney Dkt #:046660-0056
Conveyance: U.S. PATENT SECURITY AGREEMENT (FOR NON-U.S. GRANTORS)
Total properties: 1430
Page 15 of 15
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
1
Patent #:
9245640
Issue Dt:
01/26/2016
Application #:
14107735
Filing Dt:
12/16/2013
Publication #:
US20140104954
Pub Dt:
04/17/2014
Title:
NON-VOLATILE SEMICONDUCTOR MEMORY HAVING MULTIPLE EXTERNAL POWER SUPPLIES
2
Patent #:
NONE
Issue Dt:
Application #:
14134996
Filing Dt:
12/19/2013
Publication #:
US20140104969
Pub Dt:
04/17/2014
Title:
Delay Locked Loop Implementation In A Synchronous Dynamic Random Access Memory
3
Patent #:
8848511
Issue Dt:
09/30/2014
Application #:
14135167
Filing Dt:
12/19/2013
Publication #:
US20140105113
Pub Dt:
04/17/2014
Title:
NETWORK ARCHITECTURE FOR DATA COMMUNICATION
4
Patent #:
RE46819
Issue Dt:
05/01/2018
Application #:
14141686
Filing Dt:
12/27/2013
Title:
SYNCHRONOUS MEMORY READ DATA CAPTURE
5
Patent #:
9236095
Issue Dt:
01/12/2016
Application #:
14148336
Filing Dt:
01/06/2014
Publication #:
US20140119136
Pub Dt:
05/01/2014
Title:
METHOD AND APPARATUS FOR SHARING INTERNAL POWER SUPPLIES IN INTEGRATED CIRCUIT DEVICES
6
Patent #:
9020734
Issue Dt:
04/28/2015
Application #:
14148436
Filing Dt:
01/06/2014
Publication #:
US20140121879
Pub Dt:
05/01/2014
Title:
Method, Apparatus, Signals and Media, for Selecting Operating Conditions of a Genset
7
Patent #:
9325811
Issue Dt:
04/26/2016
Application #:
14148895
Filing Dt:
01/07/2014
Publication #:
US20140122582
Pub Dt:
05/01/2014
Title:
METHOD AND SYSTEM FOR PACKET PROCESSING
8
Patent #:
9257193
Issue Dt:
02/09/2016
Application #:
14156047
Filing Dt:
01/15/2014
Publication #:
US20140133242
Pub Dt:
05/15/2014
Title:
MEMORY WITH OUTPUT CONTROL
9
Patent #:
8873366
Issue Dt:
10/28/2014
Application #:
14157824
Filing Dt:
01/17/2014
Publication #:
US20140133612
Pub Dt:
05/15/2014
Title:
FREQUENCY DIVISION MULTIPLEXING SYSTEM WITH SELECTABLE RATE
10
Patent #:
9117527
Issue Dt:
08/25/2015
Application #:
14158116
Filing Dt:
01/17/2014
Publication #:
US20140133235
Pub Dt:
05/15/2014
Title:
NON-VOLATILE MEMORY DEVICE HAVING CONFIGURABLE PAGE SIZE
11
Patent #:
8854915
Issue Dt:
10/07/2014
Application #:
14158215
Filing Dt:
01/17/2014
Publication #:
US20140133243
Pub Dt:
05/15/2014
Title:
CLOCK MODE DETERMINATION IN A MEMORY SYSTEM
12
Patent #:
NONE
Issue Dt:
Application #:
14159823
Filing Dt:
01/21/2014
Publication #:
US20140133236
Pub Dt:
05/15/2014
Title:
HIERARCHICAL COMMON SOURCE LINE STRUCTURE IN NAND FLASH MEMORY
13
Patent #:
NONE
Issue Dt:
Application #:
14163499
Filing Dt:
01/24/2014
Publication #:
US20140141566
Pub Dt:
05/22/2014
Title:
MULTI-CHIP PACKAGE WITH PILLAR CONNECTION
14
Patent #:
NONE
Issue Dt:
Application #:
14172946
Filing Dt:
02/05/2014
Publication #:
US20140195715
Pub Dt:
07/10/2014
Title:
SCALABLE MEMORY SYSTEM
15
Patent #:
NONE
Issue Dt:
Application #:
14175142
Filing Dt:
02/07/2014
Publication #:
US20140153582
Pub Dt:
06/05/2014
Title:
METHOD AND APPARATUS FOR PROVIDING A PACKET BUFFER RANDOM ACCESS MEMORY
16
Patent #:
NONE
Issue Dt:
Application #:
14180582
Filing Dt:
02/14/2014
Publication #:
US20140293705
Pub Dt:
10/02/2014
Title:
ASYNCHRONOUS BRIDGE CHIP
17
Patent #:
NONE
Issue Dt:
Application #:
14185401
Filing Dt:
02/20/2014
Publication #:
US20140173322
Pub Dt:
06/19/2014
Title:
PACKET DATA ID GENERATION FOR SERIALLY INTERCONNECTED DEVICES
18
Patent #:
NONE
Issue Dt:
Application #:
14193436
Filing Dt:
02/28/2014
Publication #:
US20140179059
Pub Dt:
06/26/2014
Title:
PACKAGE-LEVEL INTEGRATED CIRCUIT CONNECTION WITHOUT TOP METAL PADS OR BONDING WIRE
19
Patent #:
NONE
Issue Dt:
Application #:
14197505
Filing Dt:
03/05/2014
Publication #:
US20140185379
Pub Dt:
07/03/2014
Title:
HYBRID SOLID-STATE MEMORY SYSTEM HAVING VOLATILE AND NON-VOLATILE MEMORY
20
Patent #:
9263146
Issue Dt:
02/16/2016
Application #:
14208812
Filing Dt:
03/13/2014
Publication #:
US20140192593
Pub Dt:
07/10/2014
Title:
FLASH MULTI-LEVEL THRESHOLD DISTRIBUTION SCHEME
21
Patent #:
RE48410
Issue Dt:
01/26/2021
Application #:
14209455
Filing Dt:
03/13/2014
Title:
SYSTEMS AND METHODS FOR MINIMIZING STATIC LEAKAGE OF AN INTEGRATED CIRCUIT
22
Patent #:
9196319
Issue Dt:
11/24/2015
Application #:
14216024
Filing Dt:
03/17/2014
Publication #:
US20140198587
Pub Dt:
07/17/2014
Title:
PRE-CHARGE VOLTAGE GENERATION AND POWER SAVING MODES
23
Patent #:
NONE
Issue Dt:
Application #:
14227412
Filing Dt:
03/27/2014
Publication #:
US20140211802
Pub Dt:
07/31/2014
Title:
TRUNKING IN A MATRIX
24
Patent #:
9190369
Issue Dt:
11/17/2015
Application #:
14254865
Filing Dt:
04/16/2014
Publication #:
US20140227829
Pub Dt:
08/14/2014
Title:
USING INTERRUPTED THROUGH-SILICON-VIAS IN INTEGRATED CIRCUITS ADAPTED FOR STACKING
25
Patent #:
NONE
Issue Dt:
Application #:
14257635
Filing Dt:
04/21/2014
Publication #:
US20140225651
Pub Dt:
08/14/2014
Title:
Delay Locked Loop Circuit and Method
26
Patent #:
9281047
Issue Dt:
03/08/2016
Application #:
14265852
Filing Dt:
04/30/2014
Publication #:
US20140233325
Pub Dt:
08/21/2014
Title:
DYNAMIC RANDOM ACCESS MEMORY WITH FULLY INDEPENDENT PARTIAL ARRAY REFRESH FUNCTION
27
Patent #:
9159380
Issue Dt:
10/13/2015
Application #:
14268350
Filing Dt:
05/02/2014
Publication #:
US20140241080
Pub Dt:
08/28/2014
Title:
BRIDGE DEVICE ARCHITECTURE FOR CONNECTING DISCRETE MEMORY DEVICES TO A SYSTEM
28
Patent #:
9365132
Issue Dt:
06/14/2016
Application #:
14273305
Filing Dt:
05/08/2014
Publication #:
US20140257612
Pub Dt:
09/11/2014
Title:
Method, Apparatus, Signals, and Medium for Managing Power in a Hybrid Vehicle
29
Patent #:
NONE
Issue Dt:
Application #:
14279955
Filing Dt:
05/16/2014
Publication #:
US20140321636
Pub Dt:
10/30/2014
Title:
METHOD AND SYSTEM FOR PROVIDING DC POWER ON LOCAL TELEPHONE LINES
30
Patent #:
NONE
Issue Dt:
Application #:
14280844
Filing Dt:
05/19/2014
Publication #:
US20140254585
Pub Dt:
09/11/2014
Title:
TELEPHONE OUTLET WITH PACKET TELEPHONY ADAPTER, AND A NETWORK USING SAME
Assignor
1
CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Exec Dt:
06/11/2014
Assignees
1
CPPIB CREDIT INVESTMENTS INC., AS LENDER
QUEEN STREET EAST, SUITE 2500
TORONTO, CANADA M5C 2W5
2
ROYAL BANK OF CANADA, AS LENDER
20 KING STREET WEST, 4TH FLOOR
TORONTO, CANADA M5H 1C4
Correspondence name and address
LATHAM & WATKINS LLP
650 TOWN CENTER DRIVE, 20TH FLOOR
COSTA MESA, CA 92626

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