Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 058218/0376 | |
| Pages: | 6 |
| | Recorded: | 11/29/2021 | | |
Attorney Dkt #: | ETRP0324USA |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
11
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Patent #:
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Issue Dt:
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04/12/2022
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Application #:
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16354187
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Filing Dt:
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03/15/2019
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Publication #:
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Pub Dt:
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06/11/2020
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Title:
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DYNAMIC MEMORY WITH SUSTAINABLE STORAGE ARCHITECTURE
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Patent #:
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Issue Dt:
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01/09/2024
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Application #:
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16388836
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Filing Dt:
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04/18/2019
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Publication #:
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Pub Dt:
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05/28/2020
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Title:
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REDUCED-FORM-FACTOR TRANSISTOR WITH SELF-ALIGNED TERMINALS AND ADJUSTABLE ON/OFF-CURRENTS AND MANUFACTURE METHOD THEREOF
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Patent #:
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Issue Dt:
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03/28/2023
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Application #:
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16847693
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Filing Dt:
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04/14/2020
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Publication #:
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Pub Dt:
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10/22/2020
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Title:
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TRANSISTOR STRUCTURE WITH REDUCED LEAKAGE CURRENT AND ADJUSTABLE ON/OFF CURRENT
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Patent #:
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Issue Dt:
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05/21/2024
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Application #:
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16885210
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Filing Dt:
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05/27/2020
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Publication #:
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Pub Dt:
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12/03/2020
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Title:
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TRANSISTOR WITH LOW LEAKAGE CURRENTS AND MANUFACTURING METHOD THEREOF
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Patent #:
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Issue Dt:
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08/27/2024
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Application #:
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16991044
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Filing Dt:
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08/12/2020
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Publication #:
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Pub Dt:
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11/11/2021
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Title:
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TRANSISTOR STRUCTURE AND RELATED INVERTER
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Patent #:
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Issue Dt:
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08/16/2022
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Application #:
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17065543
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Filing Dt:
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10/08/2020
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Publication #:
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Pub Dt:
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07/01/2021
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Title:
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SEMICONDUCTOR DEVICE STRUCTURE WITH AN UNDERGROUND INTERCONNECTION EMBEDDED INTO A SILICON SUBSTRATE
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Patent #:
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Issue Dt:
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04/30/2024
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Application #:
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17138918
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Filing Dt:
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12/31/2020
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Title:
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MINIATURIZED TRANSISTOR STRUCTURE WITH CONTROLLED DIMENSIONS OF SOURCE/DRAIN AND CONTACT-OPENING AND RELATED MANUFACTURE METHOD
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Patent #:
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Issue Dt:
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04/30/2024
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Application #:
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17151635
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Filing Dt:
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01/18/2021
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Title:
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MINIATURIZED TRANSISTOR STRUCTURE WITH CONTROLLED DIMENSIONS OF SOURCE/DRAIN AND CONTACT-OPENING AND RELATED MANUFACTURE METHOD
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Patent #:
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Issue Dt:
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09/03/2024
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Application #:
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17308071
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Filing Dt:
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05/05/2021
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Publication #:
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Pub Dt:
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11/18/2021
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Title:
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MEMORY CELL STRUCTURE WITH CAPACITOR OVER TRANSISTOR
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Patent #:
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Issue Dt:
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11/21/2023
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Application #:
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17337391
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Filing Dt:
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06/02/2021
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Publication #:
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Pub Dt:
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12/09/2021
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Title:
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MEMORY CELL STRUCTURE
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Patent #:
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Issue Dt:
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12/26/2023
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Application #:
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17468683
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Filing Dt:
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09/08/2021
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Publication #:
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Pub Dt:
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03/10/2022
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Title:
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TRANSISTOR STRUCTURE WITH METAL INTERCONNECTION DIRECTLY CONNECTING GATE AND DRAIN/SOURCE REGIONS
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Assignees
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NO. 6, TECHNOLOGY ROAD 5 |
HSINCHU, TAIWAN |
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160 ROBINSON RD., #23-02 |
SINGAPORE, SINGAPORE |
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Correspondence name and address
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WINSTON HSU
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5F., NO.389, FUHE RD., YONGHE DIST.,
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NEW TAIPEI CITY, TAIWAN
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