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Reel/Frame:058218/0376   Pages: 6
Recorded: 11/29/2021
Attorney Dkt #:ETRP0324USA
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 11
1
Patent #:
Issue Dt:
04/12/2022
Application #:
16354187
Filing Dt:
03/15/2019
Publication #:
Pub Dt:
06/11/2020
Title:
DYNAMIC MEMORY WITH SUSTAINABLE STORAGE ARCHITECTURE
2
Patent #:
Issue Dt:
01/09/2024
Application #:
16388836
Filing Dt:
04/18/2019
Publication #:
Pub Dt:
05/28/2020
Title:
REDUCED-FORM-FACTOR TRANSISTOR WITH SELF-ALIGNED TERMINALS AND ADJUSTABLE ON/OFF-CURRENTS AND MANUFACTURE METHOD THEREOF
3
Patent #:
Issue Dt:
03/28/2023
Application #:
16847693
Filing Dt:
04/14/2020
Publication #:
Pub Dt:
10/22/2020
Title:
TRANSISTOR STRUCTURE WITH REDUCED LEAKAGE CURRENT AND ADJUSTABLE ON/OFF CURRENT
4
Patent #:
Issue Dt:
05/21/2024
Application #:
16885210
Filing Dt:
05/27/2020
Publication #:
Pub Dt:
12/03/2020
Title:
TRANSISTOR WITH LOW LEAKAGE CURRENTS AND MANUFACTURING METHOD THEREOF
5
Patent #:
Issue Dt:
08/27/2024
Application #:
16991044
Filing Dt:
08/12/2020
Publication #:
Pub Dt:
11/11/2021
Title:
TRANSISTOR STRUCTURE AND RELATED INVERTER
6
Patent #:
Issue Dt:
08/16/2022
Application #:
17065543
Filing Dt:
10/08/2020
Publication #:
Pub Dt:
07/01/2021
Title:
SEMICONDUCTOR DEVICE STRUCTURE WITH AN UNDERGROUND INTERCONNECTION EMBEDDED INTO A SILICON SUBSTRATE
7
Patent #:
Issue Dt:
04/30/2024
Application #:
17138918
Filing Dt:
12/31/2020
Title:
MINIATURIZED TRANSISTOR STRUCTURE WITH CONTROLLED DIMENSIONS OF SOURCE/DRAIN AND CONTACT-OPENING AND RELATED MANUFACTURE METHOD
8
Patent #:
Issue Dt:
04/30/2024
Application #:
17151635
Filing Dt:
01/18/2021
Title:
MINIATURIZED TRANSISTOR STRUCTURE WITH CONTROLLED DIMENSIONS OF SOURCE/DRAIN AND CONTACT-OPENING AND RELATED MANUFACTURE METHOD
9
Patent #:
Issue Dt:
09/03/2024
Application #:
17308071
Filing Dt:
05/05/2021
Publication #:
Pub Dt:
11/18/2021
Title:
MEMORY CELL STRUCTURE WITH CAPACITOR OVER TRANSISTOR
10
Patent #:
Issue Dt:
11/21/2023
Application #:
17337391
Filing Dt:
06/02/2021
Publication #:
Pub Dt:
12/09/2021
Title:
MEMORY CELL STRUCTURE
11
Patent #:
Issue Dt:
12/26/2023
Application #:
17468683
Filing Dt:
09/08/2021
Publication #:
Pub Dt:
03/10/2022
Title:
TRANSISTOR STRUCTURE WITH METAL INTERCONNECTION DIRECTLY CONNECTING GATE AND DRAIN/SOURCE REGIONS
Assignor
1
Exec Dt:
11/23/2021
Assignees
1
NO. 6, TECHNOLOGY ROAD 5
HSINCHU, TAIWAN
2
160 ROBINSON RD., #23-02
SINGAPORE, SINGAPORE
Correspondence name and address
WINSTON HSU
5F., NO.389, FUHE RD., YONGHE DIST.,
NEW TAIPEI CITY, TAIWAN

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