Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 020638/0377 | |
| Pages: | 3 |
| | Recorded: | 03/12/2008 | | |
| Attorney Dkt #: | 7682P004E |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
7
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Patent #:
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Issue Dt:
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05/30/2006
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Application #:
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10074455
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Filing Dt:
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02/11/2002
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Publication #:
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Pub Dt:
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08/22/2002
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Title:
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MATCHED INSTRUCTION SET PROCESSOR SYSTEMS AND METHOD, SYSTEM, AND APPARATUS TO EFFICIENTLY DESIGN AND IMPLEMENT MATCHED INSTRUCTION SET PROCESSOR SYSTEMS BY MAPPING SYSTEM DESIGNS TO RE-CONFIGURABLE HARDWARE PLATFORMS
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Patent #:
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Issue Dt:
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09/04/2007
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Application #:
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10156170
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Filing Dt:
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05/28/2002
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Title:
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MATCHED INSTRUCTION SET PROCESSOR SYSTEMS AND METHOD, SYSTEM, AND APPARATUS TO EFFICIENTLY COMPILE HARDWARE AND SOFTWARE DESIGNS
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Patent #:
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Issue Dt:
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08/30/2005
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Application #:
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10184799
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Filing Dt:
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06/28/2002
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Title:
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METHOD, APPARATUS, AND SYSTEM FOR HARDWARE DESIGN AND SYNTHESIS
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Patent #:
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Issue Dt:
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04/20/2004
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Application #:
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10304331
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Filing Dt:
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11/26/2002
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Title:
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ADAPTIVE DIGITAL SPECTRAL COMPENSATION AND CALIBRATION OF ANALOG COMPONENTS AND TRANSCEIVER CHAINS
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Patent #:
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Issue Dt:
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11/13/2007
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Application #:
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10309492
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Filing Dt:
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12/04/2002
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Title:
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DIGITAL CONVERSION AND COMPENSATION SYSTEM
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Patent #:
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Issue Dt:
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07/04/2006
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Application #:
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10309616
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Filing Dt:
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12/04/2002
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Title:
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METHOD, SYSTEM, AND APPARATUS TO APPLY PROTOCOL-DRIVEN POWER MANAGEMENT TO REDUCE POWER CONSUMPTION OF DIGITAL COMMUNICATION TRANSCEIVERS
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Patent #:
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Issue Dt:
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11/13/2007
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Application #:
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10353336
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Filing Dt:
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01/29/2003
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Title:
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SYSTEM, METHOD AND APPARATUS TO IMPLEMENT LOW POWER HIGH PERFORMANCE TRANSCEIVERS WITH SCALABLE ANALOG TO DIGITAL CONVERSION RESOLUTION AND DYNAMIC RANGE
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Assignee
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| 6185 PASEO DEL NORTE, SUITE 200 |
| CARLSBAD, CALIFORNIA 92011 |
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Correspondence name and address
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BLAKELY SOKOLOFF TAYLOR & ZAFMAN LLP
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1279 OAKMEAD PARKWAY
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SUNNYVALE, CA 94085
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