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Reel/Frame:050724/0392   Pages: 58
Recorded: 10/14/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 726
Page 2 of 8
Pages: 1 2 3 4 5 6 7 8
1
Patent #:
11100071
Issue Dt:
08/24/2021
Application #:
16156440
Filing Dt:
10/10/2018
Publication #:
US20200117728
Pub Dt:
04/16/2020
Title:
KEY-VALUE STORE TREE DATA BLOCK SPILL WITH COMPACTION
2
Patent #:
10769071
Issue Dt:
09/08/2020
Application #:
16156654
Filing Dt:
10/10/2018
Publication #:
US20200117609
Pub Dt:
04/16/2020
Title:
COHERENT MEMORY ACCESS
3
Patent #:
11182986
Issue Dt:
11/23/2021
Application #:
16156698
Filing Dt:
10/10/2018
Publication #:
US20200118359
Pub Dt:
04/16/2020
Title:
REAL-TIME SELECTION OF DATA TO COLLECT IN AUTONOMOUS VEHICLE
4
Patent #:
11175915
Issue Dt:
11/16/2021
Application #:
16156808
Filing Dt:
10/10/2018
Publication #:
US20200117454
Pub Dt:
04/16/2020
Title:
VECTOR REGISTERS IMPLEMENTED IN MEMORY
5
Patent #:
10817423
Issue Dt:
10/27/2020
Application #:
16156835
Filing Dt:
10/10/2018
Publication #:
US20200117599
Pub Dt:
04/16/2020
Title:
MEMORY MAPPING FOR HIBERNATION
6
Patent #:
10418081
Issue Dt:
09/17/2019
Application #:
16156862
Filing Dt:
10/10/2018
Title:
APPARATUSES AND METHODS FOR PROVIDING VOLTAGES TO CONDUCTIVE LINES BETWEEN WHICH CLOCK SIGNAL LINES ARE DISPOSED
7
Patent #:
10936246
Issue Dt:
03/02/2021
Application #:
16156904
Filing Dt:
10/10/2018
Publication #:
US20200117387
Pub Dt:
04/16/2020
Title:
DYNAMIC BACKGROUND SCAN OPTIMIZATION IN A MEMORY SUB-SYSTEM
8
Patent #:
10877880
Issue Dt:
12/29/2020
Application #:
16157816
Filing Dt:
10/11/2018
Publication #:
US20200117590
Pub Dt:
04/16/2020
Title:
UNRETIRING MEMORY DEVICE BLOCKS
9
Patent #:
11030132
Issue Dt:
06/08/2021
Application #:
16157900
Filing Dt:
10/11/2018
Publication #:
US20190243788
Pub Dt:
08/08/2019
Title:
Synchronous Memory Bus Access to Storage Media
10
Patent #:
10825828
Issue Dt:
11/03/2020
Application #:
16157927
Filing Dt:
10/11/2018
Publication #:
US20200119038
Pub Dt:
04/16/2020
Title:
SEMICONDUCTOR DEVICES AND SYSTEMS WITH CHANNEL OPENINGS OR PILLARS EXTENDING THROUGH A TIER STACK, AND METHODS OF FORMATION
11
Patent #:
10977115
Issue Dt:
04/13/2021
Application #:
16159027
Filing Dt:
10/12/2018
Publication #:
US20200117538
Pub Dt:
04/16/2020
Title:
NAND PARITY INFORMATION TECHNIQUES FOR SYSTEMS WITH LIMITED RAM
12
Patent #:
10908823
Issue Dt:
02/02/2021
Application #:
16159074
Filing Dt:
10/12/2018
Publication #:
US20200117370
Pub Dt:
04/16/2020
Title:
DATA TRANSFER FOR WEAR LEVELING WITH BANK CLUSTERS
13
Patent #:
11216349
Issue Dt:
01/04/2022
Application #:
16159132
Filing Dt:
10/12/2018
Publication #:
US20200117557
Pub Dt:
04/16/2020
Title:
REACTIVE READ BASED ON METRICS TO SCREEN DEFECT PRONE MEMORY BLOCKS
14
Patent #:
10679991
Issue Dt:
06/09/2020
Application #:
16159180
Filing Dt:
10/12/2018
Publication #:
US20200119139
Pub Dt:
04/16/2020
Title:
METHODS AND APPARATUSES INCLUDING A BOUNDARY OF A WELL BENEATH AN ACTIVE AREA OF A TAP
15
Patent #:
11121146
Issue Dt:
09/14/2021
Application #:
16159955
Filing Dt:
10/15/2018
Publication #:
US20200119036
Pub Dt:
04/16/2020
Title:
FORMING TERMINATIONS IN STACKED MEMORY ARRAYS
16
Patent #:
10868032
Issue Dt:
12/15/2020
Application #:
16160074
Filing Dt:
10/15/2018
Publication #:
US20200119039
Pub Dt:
04/16/2020
Title:
DIELECTRIC EXTENSIONS IN STACKED MEMORY ARRAYS
17
Patent #:
10658380
Issue Dt:
05/19/2020
Application #:
16160146
Filing Dt:
10/15/2018
Publication #:
US20200119040
Pub Dt:
04/16/2020
Title:
FORMATION OF TERMINATION STRUCTURES IN STACKED MEMORY ARRAYS
18
Patent #:
10818681
Issue Dt:
10/27/2020
Application #:
16160342
Filing Dt:
10/15/2018
Publication #:
US20200119032
Pub Dt:
04/16/2020
Title:
TERMINATION STRUCTURES IN STACKED MEMORY ARRAYS
19
Patent #:
10629280
Issue Dt:
04/21/2020
Application #:
16161230
Filing Dt:
10/16/2018
Publication #:
US20200118635
Pub Dt:
04/16/2020
Title:
METHODS FOR DETERMINING AN EXPECTED DATA AGE OF MEMORY CELLS
20
Patent #:
10553289
Issue Dt:
02/04/2020
Application #:
16161256
Filing Dt:
10/16/2018
Title:
APPARATUS AND METHODS FOR DETERMINING AN EXPECTED DATA AGE OF MEMORY CELLS
21
Patent #:
10483978
Issue Dt:
11/19/2019
Application #:
16161825
Filing Dt:
10/16/2018
Title:
MEMORY DEVICE PROCESSING
22
Patent #:
10909011
Issue Dt:
02/02/2021
Application #:
16161932
Filing Dt:
10/16/2018
Publication #:
US20200117558
Pub Dt:
04/16/2020
Title:
INTELLIGENT POST-PACKAGING REPAIR
23
Patent #:
10741460
Issue Dt:
08/11/2020
Application #:
16162195
Filing Dt:
10/16/2018
Publication #:
US20190051569
Pub Dt:
02/14/2019
Title:
METHODS FOR FORMING INTERCONNECT ASSEMBLIES WITH PROBED BOND PADS
24
Patent #:
10452541
Issue Dt:
10/22/2019
Application #:
16162266
Filing Dt:
10/16/2018
Publication #:
US20190087330
Pub Dt:
03/21/2019
Title:
NONVOLATILE STORAGE USING LOW LATENCY AND HIGH LATENCY MEMORY
25
Patent #:
10593695
Issue Dt:
03/17/2020
Application #:
16162672
Filing Dt:
10/17/2018
Title:
Integrated Assemblies Having Charge-Trapping Material Arranged in Vertically-Spaced Segments, and Methods of Forming Integrated Assemblies
26
Patent #:
NONE
Issue Dt:
Application #:
16162905
Filing Dt:
10/17/2018
Publication #:
US20190243787
Pub Dt:
08/08/2019
Title:
Memory Systems having Controllers Embedded in Packages of Integrated Circuit Memory
27
Patent #:
10673398
Issue Dt:
06/02/2020
Application #:
16162975
Filing Dt:
10/17/2018
Publication #:
US20200127623
Pub Dt:
04/23/2020
Title:
AUTO-ZERO TECHNIQUE FOR OPAMPS WITH A SOURCE-FOLLOWER OUTPUT STAGE BASED ON REPLICA REFERENCING
28
Patent #:
10923171
Issue Dt:
02/16/2021
Application #:
16163422
Filing Dt:
10/17/2018
Publication #:
US20200126611
Pub Dt:
04/23/2020
Title:
SEMICONDUCTOR DEVICE PERFORMING REFRESH OPERATION IN DEEP SLEEP MODE
29
Patent #:
10964702
Issue Dt:
03/30/2021
Application #:
16163471
Filing Dt:
10/17/2018
Publication #:
US20200126993
Pub Dt:
04/23/2020
Title:
SEMICONDUCTOR DEVICE WITH FIRST-IN-FIRST-OUT CIRCUIT
30
Patent #:
10403330
Issue Dt:
09/03/2019
Application #:
16163720
Filing Dt:
10/18/2018
Title:
POWER NOISE REDUCTION TECHNIQUE FOR HIGH DENSITY MEMORY WITH GATING
31
Patent #:
10418073
Issue Dt:
09/17/2019
Application #:
16163728
Filing Dt:
10/18/2018
Title:
POWER NOISE REDUCTION TECHNIQUE FOR HIGH DENSITY MEMORY WITH FREQUENCY ADJUSTMENTS
32
Patent #:
10658427
Issue Dt:
05/19/2020
Application #:
16164141
Filing Dt:
10/18/2018
Publication #:
US20200127050
Pub Dt:
04/23/2020
Title:
MEMORY FOR EMBEDDED APPLICATIONS
33
Patent #:
10600496
Issue Dt:
03/24/2020
Application #:
16164156
Filing Dt:
10/18/2018
Title:
MODIFYING MEMORY BANK OPERATING PARAMETERS
34
Patent #:
10606698
Issue Dt:
03/31/2020
Application #:
16164429
Filing Dt:
10/18/2018
Publication #:
US20190243707
Pub Dt:
08/08/2019
Title:
MITIGATING AN UNDETECTABLE ERROR WHEN RETRIEVING CRITICAL DATA DURING ERROR HANDLING
35
Patent #:
11152333
Issue Dt:
10/19/2021
Application #:
16165840
Filing Dt:
10/19/2018
Publication #:
US20200126950
Pub Dt:
04/23/2020
Title:
SEMICONDUCTOR DEVICE PACKAGES WITH ENHANCED HEAT MANAGEMENT AND RELATED SYSTEMS
36
Patent #:
10580720
Issue Dt:
03/03/2020
Application #:
16166428
Filing Dt:
10/22/2018
Title:
Silicon Interposer with Fuse-Selectable Routing Array
37
Patent #:
NONE
Issue Dt:
Application #:
16166624
Filing Dt:
10/22/2018
Publication #:
US20190243771
Pub Dt:
08/08/2019
Title:
Accelerate Data Access in Memory Systems via Data Stream Segregation
38
Patent #:
10665665
Issue Dt:
05/26/2020
Application #:
16167016
Filing Dt:
10/22/2018
Publication #:
US20200127080
Pub Dt:
04/23/2020
Title:
PASSIVATION MATERIAL FOR A PILLAR ADJACENT A TRENCH
39
Patent #:
11016890
Issue Dt:
05/25/2021
Application #:
16167189
Filing Dt:
10/22/2018
Publication #:
US20190243759
Pub Dt:
08/08/2019
Title:
CPU Cache Flushing to Persistent Memory
40
Patent #:
10475976
Issue Dt:
11/12/2019
Application #:
16167280
Filing Dt:
10/22/2018
Publication #:
US20190058100
Pub Dt:
02/21/2019
Title:
VERTICAL SOLID-STATE TRANSDUCERS AND HIGH VOLTAGE SOLID-STATE TRANSDUCERS HAVING BURIED CONTACTS AND ASSOCIATED SYSTEMS AND METHODS
41
Patent #:
11100967
Issue Dt:
08/24/2021
Application #:
16167303
Filing Dt:
10/22/2018
Publication #:
US20190371376
Pub Dt:
12/05/2019
Title:
APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPROVING CLOCK DUTY CYCLE
42
Patent #:
10811064
Issue Dt:
10/20/2020
Application #:
16167326
Filing Dt:
10/22/2018
Publication #:
US20190371377
Pub Dt:
12/05/2019
Title:
APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPROVING CLOCK DUTY CYCLE
43
Patent #:
10600459
Issue Dt:
03/24/2020
Application #:
16167340
Filing Dt:
10/22/2018
Publication #:
US20190371378
Pub Dt:
12/05/2019
Title:
APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPROVING CLOCK DUTY CYCLE
44
Patent #:
11114383
Issue Dt:
09/07/2021
Application #:
16168652
Filing Dt:
10/23/2018
Publication #:
US20200126917
Pub Dt:
04/23/2020
Title:
SEMICONDUCTOR DEVICES HAVING INTEGRATED OPTICAL COMPONENTS
45
Patent #:
10714185
Issue Dt:
07/14/2020
Application #:
16168952
Filing Dt:
10/24/2018
Publication #:
US20200135276
Pub Dt:
04/30/2020
Title:
EVENT COUNTERS FOR MEMORY OPERATIONS
46
Patent #:
10892002
Issue Dt:
01/12/2021
Application #:
16169593
Filing Dt:
10/24/2018
Publication #:
US20200135257
Pub Dt:
04/30/2020
Title:
SELECTIVELY CONTROLLING CLOCK TRANSMISSION TO A DATA (DQ) SYSTEM
47
Patent #:
10847446
Issue Dt:
11/24/2020
Application #:
16169665
Filing Dt:
10/24/2018
Publication #:
US20200135618
Pub Dt:
04/30/2020
Title:
Construction Of Integrated Circuitry And A Method Of Forming An Elevationally-Elongated Conductive Via To A Diffusion Region In Semiconductive Material
48
Patent #:
10840240
Issue Dt:
11/17/2020
Application #:
16169910
Filing Dt:
10/24/2018
Publication #:
US20200135719
Pub Dt:
04/30/2020
Title:
Functional Blocks Implemented by 3D Stacked Integrated Circuit
49
Patent #:
10748874
Issue Dt:
08/18/2020
Application #:
16169915
Filing Dt:
10/24/2018
Publication #:
US20200135697
Pub Dt:
04/30/2020
Title:
POWER AND TEMPERATURE MANAGEMENT FOR FUNCTIONAL BLOCKS IMPLEMENTED BY A 3D STACKED INTEGRATED CIRCUIT
50
Patent #:
10461076
Issue Dt:
10/29/2019
Application #:
16169919
Filing Dt:
10/24/2018
Title:
3D Stacked Integrated Circuits Having Functional Blocks Configured to Accelerate Artificial Neural Network (ANN) Computation
51
Patent #:
10852953
Issue Dt:
12/01/2020
Application #:
16170423
Filing Dt:
10/25/2018
Publication #:
US20200133510
Pub Dt:
04/30/2020
Title:
DYNAMIC TEMPERATURE COMPENSATION IN A MEMORY COMPONENT
52
Patent #:
10877832
Issue Dt:
12/29/2020
Application #:
16170748
Filing Dt:
10/25/2018
Publication #:
US20200133754
Pub Dt:
04/30/2020
Title:
DATA-STRUCTURE BASED DYNAMIC PROGRAM TARGETING CONTROL
53
Patent #:
11544069
Issue Dt:
01/03/2023
Application #:
16170799
Filing Dt:
10/25/2018
Publication #:
US20200133677
Pub Dt:
04/30/2020
Title:
Universal Pointers for Data Exchange in a Computer System having Independent Processors
54
Patent #:
10776037
Issue Dt:
09/15/2020
Application #:
16170849
Filing Dt:
10/25/2018
Publication #:
US20190065066
Pub Dt:
02/28/2019
Title:
DATA REPLICATION
55
Patent #:
11188250
Issue Dt:
11/30/2021
Application #:
16171073
Filing Dt:
10/25/2018
Publication #:
US20200133563
Pub Dt:
04/30/2020
Title:
TWO-STAGE HYBRID MEMORY BUFFER FOR MULTIPLE STREAMS
56
Patent #:
10748921
Issue Dt:
08/18/2020
Application #:
16171160
Filing Dt:
10/25/2018
Publication #:
US20200135751
Pub Dt:
04/30/2020
Title:
Integrated Assemblies Which Include Stacked Memory Decks, and Methods of Forming Integrated Assemblies
57
Patent #:
10761978
Issue Dt:
09/01/2020
Application #:
16171261
Filing Dt:
10/25/2018
Publication #:
US20200133833
Pub Dt:
04/30/2020
Title:
WRITE ATOMICITY MANAGEMENT FOR MEMORY SUBSYSTEMS
58
Patent #:
11079946
Issue Dt:
08/03/2021
Application #:
16171442
Filing Dt:
10/26/2018
Publication #:
US20200133540
Pub Dt:
04/30/2020
Title:
WRITE TRAINING IN MEMORY DEVICES
59
Patent #:
11289137
Issue Dt:
03/29/2022
Application #:
16171831
Filing Dt:
10/26/2018
Publication #:
US20190147923
Pub Dt:
05/16/2019
Title:
MULTI-PORT STORAGE-CLASS MEMORY INTERFACE
60
Patent #:
10600682
Issue Dt:
03/24/2020
Application #:
16172218
Filing Dt:
10/26/2018
Publication #:
US20190206727
Pub Dt:
07/04/2019
Title:
SEMICONDUCTOR DEVICES INCLUDING A STAIR STEP STRUCTURE, AND RELATED METHODS
61
Patent #:
11024617
Issue Dt:
06/01/2021
Application #:
16172624
Filing Dt:
10/26/2018
Publication #:
US20200132946
Pub Dt:
04/30/2020
Title:
SEMICONDUCTOR PACKAGES HAVING PHOTON INTEGRATED CIRCUIT (PIC) CHIPS
62
Patent #:
10928585
Issue Dt:
02/23/2021
Application #:
16172631
Filing Dt:
10/26/2018
Publication #:
US20200132930
Pub Dt:
04/30/2020
Title:
SEMICONDUCTOR DEVICES HAVING ELECTRO-OPTICAL SUBSTRATES
63
Patent #:
10685718
Issue Dt:
06/16/2020
Application #:
16173557
Filing Dt:
10/29/2018
Publication #:
US20200135278
Pub Dt:
04/30/2020
Title:
DYNAMIC DELAY OF NAND READ COMMANDS
64
Patent #:
10653033
Issue Dt:
05/12/2020
Application #:
16174810
Filing Dt:
10/30/2018
Publication #:
US20200137923
Pub Dt:
04/30/2020
Title:
KITS FOR ENHANCED COOLING OF COMPONENTS OF COMPUTING DEVICES AND RELATED COMPUTING DEVICES, SYSTEMS AND METHODS
65
Patent #:
10629547
Issue Dt:
04/21/2020
Application #:
16174871
Filing Dt:
10/30/2018
Publication #:
US20200135658
Pub Dt:
04/30/2020
Title:
Redistribution-Layer Fanout Package Stiffener
66
Patent #:
11106577
Issue Dt:
08/31/2021
Application #:
16175005
Filing Dt:
10/30/2018
Publication #:
US20200133843
Pub Dt:
04/30/2020
Title:
PERIODIC FLUSH IN MEMORY COMPONENT THAT IS USING GREEDY GARBAGE COLLECTION
67
Patent #:
10691592
Issue Dt:
06/23/2020
Application #:
16175559
Filing Dt:
10/30/2018
Publication #:
US20200133849
Pub Dt:
04/30/2020
Title:
ERROR-CHECKING IN NAMESPACES ON STORAGE DEVICES USING A NAMESPACE TABLE AND METADATA
68
Patent #:
11379355
Issue Dt:
07/05/2022
Application #:
16175579
Filing Dt:
10/30/2018
Publication #:
US20200133834
Pub Dt:
04/30/2020
Title:
POWER-ON-TIME BASED DATA RELOCATION
69
Patent #:
11169747
Issue Dt:
11/09/2021
Application #:
16175605
Filing Dt:
10/30/2018
Publication #:
US20200133585
Pub Dt:
04/30/2020
Title:
RELOCATING DATA TO LOW LATENCY MEMORY
70
Patent #:
10553290
Issue Dt:
02/04/2020
Application #:
16175657
Filing Dt:
10/30/2018
Title:
READ DISTURB SCAN CONSOLIDATION
71
Patent #:
10311937
Issue Dt:
06/04/2019
Application #:
16175684
Filing Dt:
10/30/2018
Publication #:
US20190066767
Pub Dt:
02/28/2019
Title:
METHOD AND APPARATUS FOR PRECHARGE AND REFRESH CONTROL
72
Patent #:
10761749
Issue Dt:
09/01/2020
Application #:
16176173
Filing Dt:
10/31/2018
Publication #:
US20200133528
Pub Dt:
04/30/2020
Title:
VECTORIZED PROCESSING LEVEL CALIBRATION IN A MEMORY COMPONENT
73
Patent #:
11093251
Issue Dt:
08/17/2021
Application #:
16176434
Filing Dt:
10/31/2018
Publication #:
US20190171604
Pub Dt:
06/06/2019
Title:
System Having a Hybrid Threading Processor, a Hybrid Threading Fabric Having Configurable Computing Elements, and a Hybrid Interconnection Network
74
Patent #:
10614876
Issue Dt:
04/07/2020
Application #:
16176891
Filing Dt:
10/31/2018
Publication #:
US20200135258
Pub Dt:
04/30/2020
Title:
SENSING CHARGE RECYCLING CIRCUITRY
75
Patent #:
10685696
Issue Dt:
06/16/2020
Application #:
16176932
Filing Dt:
10/31/2018
Publication #:
US20200135263
Pub Dt:
04/30/2020
Title:
APPARATUSES AND METHODS FOR ACCESS BASED REFRESH TIMING
76
Patent #:
10957413
Issue Dt:
03/23/2021
Application #:
16176952
Filing Dt:
10/31/2018
Publication #:
US20200135291
Pub Dt:
04/30/2020
Title:
SHARED ERROR CHECK AND CORRECT LOGIC FOR MULTIPLE DATA BANKS
77
Patent #:
10658047
Issue Dt:
05/19/2020
Application #:
16177193
Filing Dt:
10/31/2018
Publication #:
US20200135279
Pub Dt:
04/30/2020
Title:
IMPLEMENTING STICKY READ USING ERROR CONTROL SUCCESS RATE ASSOCIATED WITH A MEMORY SUB-SYSTEM
78
Patent #:
10692559
Issue Dt:
06/23/2020
Application #:
16177216
Filing Dt:
10/31/2018
Publication #:
US20200135264
Pub Dt:
04/30/2020
Title:
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Pub Dt:
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Title:
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Title:
DATA RELOCATION IN MEMORY
81
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Title:
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Title:
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Title:
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Title:
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85
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Title:
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Title:
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Title:
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89
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Title:
DEDICATED READ VOLTAGES FOR DATA STRUCTURES
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Title:
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Title:
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Title:
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Title:
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Pub Dt:
03/28/2019
Title:
VIRTUAL GROUND SENSING CIRCUITRY AND RELATED DEVICES, SYSTEMS, AND METHODS FOR CROSSPOINT FERROELECTRIC MEMORY
Assignor
1
MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Exec Dt:
07/31/2019
Assignee
1
MICRON TECHNOLOGY, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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