Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 021666/0395 | |
| Pages: | 6 |
| | Recorded: | 10/10/2008 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
6
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11977718
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Filing Dt:
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10/25/2007
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Publication #:
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Pub Dt:
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06/12/2008
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Title:
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PC-based computing system employing a silicon chip with a routing unit to distribute geometrical data and graphics commands to multiple GPU-driven pipeline cores during a mode of parallel operation
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11977719
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Filing Dt:
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10/25/2007
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Publication #:
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Pub Dt:
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05/22/2008
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Title:
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PC-based computing system employing parallelized GPU-driven pipeline cores integrated with a routing unit and control unit on a silicon chip of monolithic construction
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11977734
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Filing Dt:
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10/25/2007
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Publication #:
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Pub Dt:
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06/12/2008
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Title:
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Method of routing geometrical data, graphics commands, and pixel data within a PC-based computing system employing a silicon chip having a routing unit and a control unit for parallelizing multiple GPU-driven pipeline cores during a graphics application
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11978149
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Filing Dt:
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10/26/2007
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Publication #:
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Pub Dt:
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06/05/2008
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Title:
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Silicon chip of monolithic construction for integration in a PC-based computing system and having multiple GPU-driven pipeline cores supporting multiple modes of parallelization dynamically controlled while running a graphics application
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Patent #:
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Issue Dt:
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10/12/2010
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Application #:
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11978226
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Filing Dt:
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10/26/2007
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Publication #:
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Pub Dt:
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06/05/2008
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Title:
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PC-BASED COMPUTING SYSTEM EMPLOYING A SILICON CHIP IMPLEMENTING PARALLELIZED GPU-DRIVEN PIPELINES CORES SUPPORTING MULTIPLE MODES OF PARALLELIZATION DYNAMICALLY CONTROLLED WHILE RUNNING A GRAPHICS APPLICATION
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Patent #:
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Issue Dt:
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10/12/2010
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Application #:
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11978239
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Filing Dt:
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10/26/2007
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Publication #:
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Pub Dt:
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05/22/2008
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Title:
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PC-BASED COMPUTING SYSTEM EMPLOYING A SILICON CHIP OF MONOLITHIC CONSTRUCTION HAVING A ROUTING UNIT, A CONTROL UNIT AND A PROFILING UNIT FOR PARALLELIZING THE OPERATION OF MULTIPLE GPU-DRIVEN PIPELINE CORES ACCORDING TO THE OBJECT DIVISION MODE OF PARALLEL OPERATIO
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Assignee
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KFAR NETTER INDUSTRIAL PARK |
P.O. BOX 3785 |
KFAR NETTER, ISRAEL 40593 |
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Correspondence name and address
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THOMAS J. PERKOWSKI, ESQ., PC
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1266 EAST MAIN STREET
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STAMFORD, CT 06902
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