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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:008545/0397   Pages: 4
Recorded: 06/02/1997
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 8
1
Patent #:
Issue Dt:
12/01/1987
Application #:
06936257
Filing Dt:
12/01/1986
Title:
MODULATION DOPED FIELD EFFECT TRANSISTOR WITH DOPED SIX GE1-X- INTRINSIC SI LAYERING
2
Patent #:
Issue Dt:
03/27/1990
Application #:
06941223
Filing Dt:
12/12/1986
Title:
STRUCTURED SEMICONDUCTOR BODY
3
Patent #:
Issue Dt:
08/14/1990
Application #:
06941225
Filing Dt:
12/12/1986
Title:
STRUCTURED SEMICONDUCTOR BODY
4
Patent #:
Issue Dt:
08/15/1989
Application #:
07105952
Filing Dt:
09/28/1987
Title:
IMPATT DIODE
5
Patent #:
Issue Dt:
02/21/1989
Application #:
07133252
Filing Dt:
12/09/1987
Title:
METHOD FOR DOPING SEMI-CONDUCTOR MATERIAL DURING EPITAXIAL GROWTH
6
Patent #:
Issue Dt:
06/27/1989
Application #:
07282940
Filing Dt:
12/08/1988
Title:
METHOD FOR PRODUCING A SPATIALLY PERIODIC SEMICONDUCTOR LAYER STRUCTURE
7
Patent #:
Issue Dt:
06/19/1990
Application #:
07285389
Filing Dt:
12/16/1988
Title:
METHOD OF MAKING A SEMICONDUCTOR DEVICE
8
Patent #:
Issue Dt:
03/17/1992
Application #:
07398368
Filing Dt:
08/24/1989
Title:
METHOD FOR MANUFACTURING BIPOLAR TRANSISTOR BY SELECTIVE EPITAXIAL GROWTH OF BASE AND EMITTER LAYERS
Assignor
1
Exec Dt:
04/08/1997
Assignee
1
EPPLESTRASSE 225
D-70567 STUTTGART, GERMANY
Correspondence name and address
SPENCER & FRANK
GEORGE H. SPENCER
SUITE 300 EAST
1100 NEW YORK AVENUE, N.W.
WASHINGTON, D.C. 20005-3955

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