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Reel/Frame:064761/0404   Pages: 6
Recorded: 08/30/2023
Attorney Dkt #:REFILE-15
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE CONVEYING PARTY'S NAME PREVIOUSLY RECORDED AT REEL: 057449 FRAME: 0393. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME.
Total properties: 23
1
Patent #:
7010713
Issue Dt:
03/07/2006
Application #:
10352372
Filing Dt:
01/27/2003
Publication #:
US20040123175
Pub Dt:
06/24/2004
Title:
SYNCHRONIZATION CIRCUIT AND METHOD WITH TRANSPARENT LATCHES
2
Patent #:
7120040
Issue Dt:
10/10/2006
Application #:
10856783
Filing Dt:
06/01/2004
Publication #:
US20050276086
Pub Dt:
12/15/2005
Title:
TERNARY CAM CELL FOR REDUCED MATCHLINE CAPACITANCE
3
Patent #:
7176733
Issue Dt:
02/13/2007
Application #:
11009534
Filing Dt:
12/10/2004
Publication #:
US20050162200
Pub Dt:
07/28/2005
Title:
HIGH OUTPUT IMPEDANCE CHARGE PUMP FOR PLL/DLL
4
Patent #:
7038517
Issue Dt:
05/02/2006
Application #:
11037365
Filing Dt:
01/19/2005
Publication #:
US20050122144
Pub Dt:
06/09/2005
Title:
TIMING VERNIER USING A DELAY LOCKED LOOP
5
Patent #:
7190201
Issue Dt:
03/13/2007
Application #:
11050644
Filing Dt:
02/03/2005
Publication #:
US20060170471
Pub Dt:
08/03/2006
Title:
METHOD AND APPARATUS FOR INITIALIZING A DELAY LOCKED LOOP
6
Patent #:
7596710
Issue Dt:
09/29/2009
Application #:
11305433
Filing Dt:
12/14/2005
Publication #:
US20060103439
Pub Dt:
05/18/2006
Title:
SYNCHRONIZATION CIRCUIT AND METHOD WITH TRANSPARENT LATCHES
7
Patent #:
7408391
Issue Dt:
08/05/2008
Application #:
11636876
Filing Dt:
12/11/2006
Publication #:
US20070080729
Pub Dt:
04/12/2007
Title:
CHARGE PUMP FOR PLL/DLL
8
Patent #:
7285997
Issue Dt:
10/23/2007
Application #:
11699268
Filing Dt:
01/29/2007
Publication #:
US20070120587
Pub Dt:
05/31/2007
Title:
DELAY LOCKED LOOP CIRCUIT AND METHOD
9
Patent #:
7671650
Issue Dt:
03/02/2010
Application #:
12144186
Filing Dt:
06/23/2008
Publication #:
US20080252344
Pub Dt:
10/16/2008
Title:
TIMING VERNIER USING A DELAY LOCKED LOOP
10
Patent #:
7616035
Issue Dt:
11/10/2009
Application #:
12214053
Filing Dt:
06/16/2008
Publication #:
US20090201058
Pub Dt:
08/13/2009
Title:
CHARGE PUMP FOR PLL/DLL
11
Patent #:
7692461
Issue Dt:
04/06/2010
Application #:
12317877
Filing Dt:
12/30/2008
Publication #:
US20090121760
Pub Dt:
05/14/2009
Title:
CHARGE PUMP FOR PLL/DLL
12
Patent #:
8069363
Issue Dt:
11/29/2011
Application #:
12543839
Filing Dt:
08/19/2009
Publication #:
US20100033216
Pub Dt:
02/11/2010
Title:
DOUBLE DATA RATE OUTPUT LATCH FOR STATIC RAM DEVICE HAS EDGE-TRIGGERED FLIP-FLOP TO OUTPUT DDR SIGNAL TO SYNCHRONIZE WITH A SECOND CLOCK SIGNAL
13
Patent #:
7893737
Issue Dt:
02/22/2011
Application #:
12714670
Filing Dt:
03/01/2010
Publication #:
US20100213994
Pub Dt:
08/26/2010
Title:
CHARGE PUMP FOR PLL/DLL
14
Patent #:
8049541
Issue Dt:
11/01/2011
Application #:
12986646
Filing Dt:
01/07/2011
Publication #:
US20110102034
Pub Dt:
05/05/2011
Title:
CHARGE PUMP FOR PLL/DLL
15
Patent #:
RE43947
Issue Dt:
01/29/2013
Application #:
13105749
Filing Dt:
05/11/2011
Title:
DELAY LOCKED LOOP CIRCUIT AND METHOD
16
Patent #:
8296598
Issue Dt:
10/23/2012
Application #:
13113550
Filing Dt:
05/23/2011
Publication #:
US20110228626
Pub Dt:
09/22/2011
Title:
DOUBLE DATA RATE OUTPUT CIRCUIT AND METHOD
17
Patent #:
8222937
Issue Dt:
07/17/2012
Application #:
13283023
Filing Dt:
10/27/2011
Publication #:
US20120098581
Pub Dt:
04/26/2012
Title:
CHARGE PUMP FOR PLL/DLL
18
Patent #:
8411812
Issue Dt:
04/02/2013
Application #:
13523406
Filing Dt:
06/14/2012
Publication #:
US20130003483
Pub Dt:
01/03/2013
Title:
WIDE FREQUENCY RANGE DELAY LOCKED LOOP
19
Patent #:
8533522
Issue Dt:
09/10/2013
Application #:
13624487
Filing Dt:
09/21/2012
Publication #:
US20130024717
Pub Dt:
01/24/2013
Title:
DOUBLE DATA RATE OUTPUT CIRCUIT
20
Patent #:
8704569
Issue Dt:
04/22/2014
Application #:
13718783
Filing Dt:
12/18/2012
Publication #:
US20130176061
Pub Dt:
07/11/2013
Title:
DELAY LOCKED LOOP CIRCUIT AND METHOD
21
Patent #:
8599984
Issue Dt:
12/03/2013
Application #:
13850500
Filing Dt:
03/26/2013
Publication #:
US20130271192
Pub Dt:
10/17/2013
Title:
WIDE FREQUENCY RANGE DELAY LOCKED LOOP
22
Patent #:
RE47715
Issue Dt:
11/05/2019
Application #:
14334347
Filing Dt:
07/17/2014
Title:
CHARGE PUMP FOR PLL/DLL
23
Patent #:
10122369
Issue Dt:
11/06/2018
Application #:
15479691
Filing Dt:
04/05/2017
Publication #:
US20170272085
Pub Dt:
09/21/2017
Title:
Wide Frequency Range Delay Locked Loop
Assignor
1
CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Exec Dt:
04/01/2021
Assignee
1
MOSAID TECHNOLOGIES INCORPORATED
515 LEGGET DRIVE
SUITE 100
OTTAWA, CANADA K2K 3G4
Correspondence name and address
CONVERSANT IP MANAGEMENT CORP.
5830 GRANITE PARKWAY #100-247
PLANO, TX 75024

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