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Patent #:
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Issue Dt:
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10/18/1988
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Application #:
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06820808
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Filing Dt:
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01/22/1986
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Title:
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MULTI-DRIVER INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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05/15/1990
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Application #:
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06828687
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Filing Dt:
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02/12/1986
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Title:
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MULTILAYER INTERCONNECT AND METHOD OF FORMING SAME
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Patent #:
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Issue Dt:
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11/22/1988
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Application #:
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06834385
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Filing Dt:
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02/28/1986
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Title:
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BIPOLAR TRANSISTOR WITH TRANSIENT SUPPRESSOR
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Patent #:
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Issue Dt:
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04/12/1988
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Application #:
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06840635
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Filing Dt:
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03/17/1986
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Title:
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METHOD FOR GATE ELECTRODE FABRICATION AND SYMMETRICAL AND NON-SYMMETRICAL SELF-ALIGNED INLAY TRANSISTORS MADE THEREFROM
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Patent #:
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Issue Dt:
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01/19/1988
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Application #:
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06843346
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Filing Dt:
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03/24/1986
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Title:
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METHOD FOR PRODUCING HIGH-ASPECT RATIO HOLLOW DIFFUSED REGIONS IN A SEMICONDUCTOR BODY AND DIODE PRODUCED THEREBY
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Patent #:
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Issue Dt:
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08/30/1988
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Application #:
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06845110
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Filing Dt:
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03/27/1986
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Title:
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UNFRAMED VIA INTERCONNECTION WITH DIELECTRIC ETCH STOP
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Patent #:
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Issue Dt:
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09/06/1988
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Application #:
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06851275
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Filing Dt:
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04/10/1986
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Title:
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SEMICONDUCTOR CHIP PACKAGES HAVING SOLDER LAYERS OF ENHANCED DURABILITY
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Patent #:
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Issue Dt:
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04/05/1988
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Application #:
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06852289
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Filing Dt:
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04/15/1986
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Title:
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METHOD OF MAKING A FLOATING GATE MEMORY CELL
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Patent #:
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Issue Dt:
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07/07/1987
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Application #:
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06853108
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Filing Dt:
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04/17/1986
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Title:
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SELF-ALIGNED INLAY TRANSISTOR WITH OR WITHOUT SOURCE AND DRAIN SELF-ALIGNED METALLIZATION EXTENSIONS
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Patent #:
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|
Issue Dt:
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06/14/1988
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Application #:
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06853255
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Filing Dt:
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04/17/1986
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Title:
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METHOD OF FABRICATING GOLD BUMPS ON IC'S AND POWER CHIPS
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Patent #:
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Issue Dt:
|
02/02/1988
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Application #:
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06856277
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Filing Dt:
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04/28/1986
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Title:
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METHOD OF FORMING A SEMICONDUCTOR STRUCTURE
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Patent #:
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Issue Dt:
|
04/05/1988
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Application #:
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06856280
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Filing Dt:
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04/28/1986
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Title:
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SILICON-ON-SAPPHIRE INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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09/08/1987
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Application #:
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06857283
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Filing Dt:
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04/30/1986
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Title:
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HYBRID EXTENDED DRAIN CONCEPT FOR REDUCED HOT ELECTRON EFFECT
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Patent #:
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Issue Dt:
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08/04/1987
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Application #:
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06860814
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Filing Dt:
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05/08/1986
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Title:
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TRANSISTOR BASE CURRENT REGULATOR
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Patent #:
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|
Issue Dt:
|
07/05/1988
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Application #:
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06863432
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Filing Dt:
|
05/15/1986
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Title:
|
METHOD OF MAKING A SILICON-ON-INSULATOR TRANSISTOR
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|
|
Patent #:
|
|
Issue Dt:
|
04/12/1988
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Application #:
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06866530
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Filing Dt:
|
05/23/1986
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Title:
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A METHOD OF FABRICATING A SUBSTRATE FOR A SEMICONDUCTOR CHIP PACKAGE
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Patent #:
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|
Issue Dt:
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07/18/1989
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Application #:
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06866648
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Filing Dt:
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05/27/1986
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Title:
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ACTIVE AREA PLANARIZATION WITH SELF-ALIGNED CONTACTS
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Patent #:
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|
Issue Dt:
|
10/04/1988
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Application #:
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06868923
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Filing Dt:
|
05/29/1986
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Title:
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PARALLEL PROCESSING SYSTEM APPARATUS
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Patent #:
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Issue Dt:
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02/24/1987
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Application #:
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06872792
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Filing Dt:
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06/11/1986
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Title:
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HERMETIC POWER CHIP PACKAGES
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Patent #:
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Issue Dt:
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02/02/1988
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Application #:
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06880031
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Filing Dt:
|
06/30/1986
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Title:
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ARTICLE TRANSFER SYSTEM
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Patent #:
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|
Issue Dt:
|
10/18/1988
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Application #:
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06882857
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Filing Dt:
|
07/07/1986
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Title:
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PASSIVATION WITH A LOW OXYGEN INTERFACE
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Patent #:
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|
Issue Dt:
|
09/22/1987
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Application #:
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06890050
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Filing Dt:
|
07/28/1986
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Title:
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ELECTROLESS NICKEL PLATING COMPOSITION AND METHOD
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Patent #:
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|
Issue Dt:
|
03/01/1988
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Application #:
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06891058
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Filing Dt:
|
07/31/1986
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Title:
|
METHOD AND APPARATUS FOR IMPROVED METAL-INSULATOR-SEMICONDUCTOR DEVICE OPERATION
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Patent #:
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|
Issue Dt:
|
05/03/1988
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Application #:
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06891170
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Filing Dt:
|
07/31/1986
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Title:
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METHOD FOR DETERMINING STRUCTURAL DEFECTS IN SEMICONDUCTOR WAFERS BY ULTRASONIC MICROSCOPY
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Patent #:
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|
Issue Dt:
|
03/01/1988
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Application #:
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06892652
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Filing Dt:
|
08/04/1986
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Title:
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ILLUMINATOR FOR VISUAL INSPECTION OF CURVED SPECULAR SURFACES
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Patent #:
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|
Issue Dt:
|
11/08/1988
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Application #:
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06892739
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Filing Dt:
|
07/31/1986
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Title:
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POWER SEMICONDUCTOR DEVICE WITH MAIN CURRENT SECTION AND EMULATION CURRENT SECTION
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Patent #:
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|
Issue Dt:
|
12/27/1988
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Application #:
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06895365
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Filing Dt:
|
08/11/1986
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Title:
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ARC GAP FOR INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
|
12/29/1987
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Application #:
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06898082
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Filing Dt:
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08/20/1986
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Title:
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TAPE AUTOMATED MANUFACTURE OF POWER SEMICONDUCTOR DEVICES
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|
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Patent #:
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|
Issue Dt:
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05/23/1989
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Application #:
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06900520
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Filing Dt:
|
08/26/1986
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Title:
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MEMORY CELL CIRCUIT HAVING RADIATION HARDNESS
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Patent #:
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|
Issue Dt:
|
07/26/1988
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Application #:
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06904156
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Filing Dt:
|
09/05/1986
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Title:
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RADIATION HARD MEMORY CELL CIRCUIT WITH HIGH INVERTER IMPEDANCE RATIO
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|
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Patent #:
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|
Issue Dt:
|
01/29/1991
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Application #:
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06904271
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Filing Dt:
|
09/05/1986
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Title:
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RADIATION HARD MEMORY CELL STRUCTURE WITH DRAIN SHIELDING
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|
|
Patent #:
|
|
Issue Dt:
|
11/15/1988
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Application #:
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06905077
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Filing Dt:
|
09/09/1986
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Title:
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PROCESS OF FORMING A RESIST STRUCTURE ON SUBSTRATE HAVING TOPO- GRAPHICAL FEATURES USING POSITIVE PHOTORESIST LAYER AND POLY (VINLYPYRROLIDONE) OVERLAYER
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|
|
Patent #:
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|
Issue Dt:
|
10/04/1988
|
Application #:
|
06911423
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Filing Dt:
|
09/25/1986
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Title:
|
METHOD OF MAKING SILICON-ON-SAPPHIRE SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/1989
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Application #:
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06913785
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Filing Dt:
|
09/30/1986
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Title:
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IGT AND MOSFET DEVICES HAVING REDUCED CHANNEL WIDTH
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Patent #:
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|
Issue Dt:
|
04/12/1988
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Application #:
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06916846
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Filing Dt:
|
10/07/1986
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Title:
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ALIGNMENT KEY AND METHOD OF MAKING THE SAME
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Patent #:
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|
Issue Dt:
|
11/17/1987
|
Application #:
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06935372
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Filing Dt:
|
11/26/1986
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Title:
|
METHOD OF FABRICATING A TWIN TUB CMOS DEVICE
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|
|
Patent #:
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|
Issue Dt:
|
01/05/1988
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Application #:
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06935470
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Filing Dt:
|
11/26/1986
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Title:
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MINIMAL MASK PROCESS FOR FABRICATING A LATERAL INSULATED GATE SEMICONDUCTOR DEVICE
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Patent #:
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|
Issue Dt:
|
08/07/1990
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Application #:
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06940167
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Filing Dt:
|
12/10/1986
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Title:
|
MEMORY CELL FOR A DENSE EPROM
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|
|
Patent #:
|
|
Issue Dt:
|
03/28/1989
|
Application #:
|
06947151
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Filing Dt:
|
12/29/1986
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Title:
|
FABRICATION OF LARGE POWER SEMICONDUCTOR COMPOSITE BY WAFER INTERCONNECTION OF INDIVIDUAL DEVICES
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|
|
Patent #:
|
|
Issue Dt:
|
01/03/1989
|
Application #:
|
07003678
|
Filing Dt:
|
01/15/1987
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Title:
|
LATERAL CHARGE CONTROL SEMICONDUCTOR DEVICE AND METHOD OF FABRICATION
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|
|
Patent #:
|
|
Issue Dt:
|
12/27/1988
|
Application #:
|
07007034
|
Filing Dt:
|
01/27/1987
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Title:
|
MOSFET STRUCTURE WITH SUBSTRATE COUPLED SOURCE
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|
|
Patent #:
|
|
Issue Dt:
|
03/22/1988
|
Application #:
|
07013529
|
Filing Dt:
|
02/11/1987
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Title:
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METHOD OF FORMING A PATTERNED GLASS LAYER OVER THE SURFACE OF A SUBSTRATE
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|
|
Patent #:
|
|
Issue Dt:
|
06/06/1989
|
Application #:
|
07014196
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Filing Dt:
|
02/12/1987
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Title:
|
VERTICAL MOSFET WITH REDUCED BIPOLAR EFFECTS
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|
|
Patent #:
|
|
Issue Dt:
|
03/15/1988
|
Application #:
|
07015478
|
Filing Dt:
|
02/17/1987
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Title:
|
CAPACITOR AND METHOD FOR MAKING SAME WITH HIGH YIELD
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|
|
Patent #:
|
|
Issue Dt:
|
11/22/1988
|
Application #:
|
07018314
|
Filing Dt:
|
02/24/1987
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Title:
|
SEMICONDUCTOR DEVICE WITH SOURCE AND DRAIN DEPTH EXTENDERS AND A METHOD OF MAKING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/1989
|
Application #:
|
07025036
|
Filing Dt:
|
03/12/1987
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Title:
|
INSULATED GATE SEMICONDUCTOR DEVICE WITH EXTRA SHORT GRID AND METHOD OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/1989
|
Application #:
|
07032367
|
Filing Dt:
|
03/31/1987
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Title:
|
ISOLATION FOR TRANSISTOR DEVICES HAVING A PILOT STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/1989
|
Application #:
|
07033940
|
Filing Dt:
|
04/03/1987
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Title:
|
VERTICAL DOUBLE DIFFUSED METAL OXIDE SEMICONDUCTOR VDMOS DEVICE WITH INCREASED SAFE OPERATING AREA AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/1989
|
Application #:
|
07033952
|
Filing Dt:
|
04/03/1987
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Title:
|
VERTICAL DOUBLE DIFFUSED METAL OXIDE SEMICONDUCTOR (VDMOS) DEVICE INCLUDING HIGH VOLTAGE JUNCTION EXHIBITING INCREASED SAFE OPERATING AREA
|
|
|
Patent #:
|
|
Issue Dt:
|
03/28/1989
|
Application #:
|
07036058
|
Filing Dt:
|
04/09/1987
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Title:
|
SEMICONDUCTOR DEVICE HAVING TURN-ON AND TURN-OFF CAPABILITIES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/1988
|
Application #:
|
07040693
|
Filing Dt:
|
04/17/1987
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Title:
|
SEMICONDUCTOR DEVICE HAVING RAPID REMOVAL OF MAJORITY CARRIERS FROM AN ACTIVE BASE REGION THEREOF AT DEVICE TURN-OFF AND METHOD OF FABRICATING THIS DEVICE
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|
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Patent #:
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|
Issue Dt:
|
08/23/1988
|
Application #:
|
07041565
|
Filing Dt:
|
04/23/1987
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Title:
|
OPTICAL REFLECTANCE METHOD OF EXAMINING A SIMOX ARTICLE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/1988
|
Application #:
|
07045494
|
Filing Dt:
|
05/04/1987
|
Title:
|
INTEGRATED CIRCUIT FOR CONTROLLING POWER CONVERTER BY FREQUENCY MODULATION AND PULSE WIDTH MODULATION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/1988
|
Application #:
|
07047739
|
Filing Dt:
|
05/08/1987
|
Title:
|
ACTIVATION OF REFRACTORY METAL SURFACES FOR ELECTROLESS PLATING
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/1988
|
Application #:
|
07048704
|
Filing Dt:
|
05/12/1987
|
Title:
|
SEMICONDUCTOR DEVICE THAT MINIMIZES THE LEAKAGE CURRENTS ASSOCIATED WITH THE PARASITIC EDGE TRANSISTORS AND A METHOD OF MAKING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/1989
|
Application #:
|
07048857
|
Filing Dt:
|
05/12/1987
|
Title:
|
TREATMENT OF PLANARIZING LAYER IN MULTILAYER ELECTRON BEAM RESIST
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/1989
|
Application #:
|
07051359
|
Filing Dt:
|
05/19/1987
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Title:
|
MONOLITHICALLY INTEGRATED SEMICONDUCTOR DEVICE AND PROCESS FOR FABRICATION
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|
|
Patent #:
|
|
Issue Dt:
|
07/11/1989
|
Application #:
|
07051424
|
Filing Dt:
|
05/19/1987
|
Title:
|
MONOLITHICALLY INTEGRATED INSULATED GATE SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/19/1989
|
Application #:
|
07051427
|
Filing Dt:
|
05/19/1987
|
Title:
|
MONOLITHICALLY INTEGRATED LATERAL INSULATED GATE SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/1989
|
Application #:
|
07051430
|
Filing Dt:
|
05/19/1987
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Title:
|
MONOLITHICALLY INTEGRATED SEMICONDUCTOR DEVICE HAVING BIDIRECTIONAL CONDUCTING CAPABILITY AND METHOD OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/20/1988
|
Application #:
|
07055220
|
Filing Dt:
|
05/29/1987
|
Title:
|
METHOD OF MAKING INTEGRATED CIRCUIT WITH PAIR OF MOS FIELD EFFECT TRANSISTORS SHARING COMMON SOURCE/DRAIN REGION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/27/1988
|
Application #:
|
07055545
|
Filing Dt:
|
05/29/1987
|
Title:
|
ZENER REFERENCED VOLTAGE CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/1988
|
Application #:
|
07060490
|
Filing Dt:
|
06/11/1987
|
Title:
|
SELF-ALIGNED BARRIER METAL AND OXIDATION MASK METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
01/03/1989
|
Application #:
|
07064133
|
Filing Dt:
|
06/19/1987
|
Title:
|
METHOD OF MAKING A POWER IC STRUCTURE WITH ENHANCEMENT AND/OR CMOS LOGIC
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/1989
|
Application #:
|
07069806
|
Filing Dt:
|
07/06/1987
|
Title:
|
METAL OXIDE SEMICONDUCTOR GATED TURN OFF THYRISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/1988
|
Application #:
|
07073371
|
Filing Dt:
|
07/10/1987
|
Title:
|
METHOD OF LASER SOLDERING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/1989
|
Application #:
|
07073897
|
Filing Dt:
|
07/13/1987
|
Title:
|
BURIED LATERAL DIODE AND METHOD FOR MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/1989
|
Application #:
|
07077711
|
Filing Dt:
|
07/24/1987
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/1988
|
Application #:
|
07081076
|
Filing Dt:
|
08/03/1987
|
Title:
|
STATIC CMOS PROGRAMMABLE LOGIC ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/1989
|
Application #:
|
07084464
|
Filing Dt:
|
08/12/1987
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Title:
|
PHOTOLITHOGRAPHY OVER REFLECTIVE SUBSTRATES COMPRISING A TITANIUM NITRIDE LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/1988
|
Application #:
|
07085922
|
Filing Dt:
|
08/17/1987
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Title:
|
TIMING AND CONTROL CIRCUITRY FOR FLASH ANALOG TO DIGITAL CONVERTERS WITH DYNAMIC ENCODERS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/1989
|
Application #:
|
07088353
|
Filing Dt:
|
08/24/1987
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Title:
|
LATERAL METAL-OXIDE-SEMICONDUCTOR CONTROLLED TRIACS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/05/1991
|
Application #:
|
07093655
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Filing Dt:
|
09/08/1987
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Title:
|
LOW REFLECTANCE CONDUCTOR IN AN INTEGRATED CIRCUIT
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|
|
Patent #:
|
|
Issue Dt:
|
02/28/1989
|
Application #:
|
07098756
|
Filing Dt:
|
09/17/1987
|
Title:
|
INSULATED-GATE SEMICONDUCTOR DEVICE WITH IMPROVED BASE-TO-SOURCE ELECTRODE SHORT AND METHOD OF FABRICATING SAID SHORT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/25/1989
|
Application #:
|
07104002
|
Filing Dt:
|
10/02/1987
|
Title:
|
METHOD OF FILLING INTERLEVEL DIELECTRIC VIA OR CONTACT HOLES IN MULTILEVEL VLSI METALLIZATION STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/08/1988
|
Application #:
|
07104405
|
Filing Dt:
|
10/05/1987
|
Title:
|
IMPEDANCE TRANSFORMING CIRCUIT FOR MULTIBIT PARALLEL DIGITAL CIRCUITS
|
|
|
Patent #:
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Issue Dt:
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02/14/1989
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Application #:
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07108656
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Filing Dt:
|
10/15/1987
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Title:
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DETERMINATION OF SUBSTRATE TEMPERATURE USED DURING OXYGEN IMPLANTATION OF SIMOX WAFER
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Patent #:
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|
Issue Dt:
|
07/04/1989
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Application #:
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07121183
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Filing Dt:
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11/16/1987
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Title:
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METHOD OF MAKING MO/TIW OR W/TIW OHMIC CONTACTS TO SILICON SAME
|
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Patent #:
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|
Issue Dt:
|
08/16/1988
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Application #:
|
07124129
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Filing Dt:
|
11/23/1987
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Title:
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METHOD OF FABRICATING AN INTEGRATED CIRCUIT CONTAINING BIPOLAR AND MOS TRANSISTORS
|
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Patent #:
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|
Issue Dt:
|
02/28/1989
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Application #:
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07124393
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Filing Dt:
|
11/20/1987
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Title:
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CHIP CARRIER AND METHOD OF FABRICATION
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Patent #:
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|
Issue Dt:
|
06/12/1990
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Application #:
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07134585
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Filing Dt:
|
12/14/1987
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Title:
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DENSE EPROM HAVING SERIALLY COUPLED FLOATING GATE TRANSISTORS
|
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|
Patent #:
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|
Issue Dt:
|
04/25/1989
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Application #:
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07137314
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Filing Dt:
|
12/23/1987
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Title:
|
HIGH TEMPERATURE ANNEALING TO IMPROVE SIMOX CHARACTERISTICS
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|
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Patent #:
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|
Issue Dt:
|
06/12/1990
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Application #:
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07151045
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Filing Dt:
|
02/01/1988
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Title:
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METALLIZATION CONTACT SYSTEM FOR LARGE SCALE INTEGRATED CIRCUITS
|
|
|
Patent #:
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|
Issue Dt:
|
09/19/1989
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Application #:
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07152703
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Filing Dt:
|
02/05/1988
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Title:
|
HIGH VOLTAGE INTEGRATED CIRCUIT DEVICES ELECTRICALLY ISOLATED FROM AN INTEGRATED CIRCUIT SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/14/1991
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Application #:
|
07163534
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Filing Dt:
|
03/17/1988
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Title:
|
SOFT START SOLID STATE SWITCH
|
|
|
Patent #:
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|
Issue Dt:
|
03/05/1991
|
Application #:
|
07173498
|
Filing Dt:
|
03/25/1988
|
Title:
|
STRUCTURE FOR A COMPLEMENTARY-SYMMETRY COMFET PAIR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/1990
|
Application #:
|
07173918
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Filing Dt:
|
03/28/1988
|
Title:
|
FABRICATION METHOD AND STRUCTURE FOR FIELD ISOLATION IN FIELD EFFECT TRANSISTORS ON INTEGRATED CIRCUIT CHIPS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/30/1990
|
Application #:
|
07178045
|
Filing Dt:
|
04/05/1988
|
Title:
|
SELF-CHARACTERIZING ANALOG-TO-DIGITAL CONVERTER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/21/1989
|
Application #:
|
07179441
|
Filing Dt:
|
04/08/1988
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Title:
|
SIMPLE AUTOMATED DISCRETIONARY BONDING OF MULTIPLE PARALLEL ELEMENTS
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|
|
Patent #:
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|
Issue Dt:
|
08/21/1990
|
Application #:
|
07182602
|
Filing Dt:
|
04/18/1988
|
Title:
|
CELL STACK FOR VARIABLE DIGIT WIDTH SERIAL ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/1990
|
Application #:
|
07186983
|
Filing Dt:
|
04/27/1988
|
Title:
|
LOW NOISE, HIGH FREQUENCY SYNCHRONOUS RECTIFIER
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/1991
|
Application #:
|
07188888
|
Filing Dt:
|
05/02/1988
|
Title:
|
METAL OXIDE SEMICONDUCTOR GATED TURN-OFF THYRISTOR INCLUDING A LOW LIFETIME REGION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/1990
|
Application #:
|
07190903
|
Filing Dt:
|
05/06/1988
|
Title:
|
METHOD OF MAKING SYMMERTICAL BLOCKING HIGH VOLTAGE BREAKDOWN SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/1989
|
Application #:
|
07196416
|
Filing Dt:
|
05/20/1988
|
Title:
|
GRADED EXTENDED DRAIN CONCEPT FOR REDUCED HOT ELECTRON EFFECT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/1989
|
Application #:
|
07197098
|
Filing Dt:
|
05/20/1988
|
Title:
|
BIPOLAR TRANSISTOR WITH FIELD SHIELDS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/1990
|
Application #:
|
07218425
|
Filing Dt:
|
07/12/1988
|
Title:
|
MEMORY CELL STRUCTURE HAVING RADIATION HARDNESS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/1989
|
Application #:
|
07220353
|
Filing Dt:
|
07/14/1988
|
Title:
|
METHOD OF FABRICATING SELF ALIGNED SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/1990
|
Application #:
|
07220649
|
Filing Dt:
|
07/18/1988
|
Title:
|
POWER BIPOLAR TRANSISTOR DEVICE WITH INTEGRAL ANTISATURATION DIODE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/1990
|
Application #:
|
07221482
|
Filing Dt:
|
07/19/1988
|
Title:
|
POWER TRANSISTOR STRUCTURE WITH HIGH SPEED INTEGRAL ANTIPARALLEL SCHOTTKY DIODE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/1989
|
Application #:
|
07225320
|
Filing Dt:
|
07/28/1988
|
Title:
|
PROTECTIVE CLAMP FOR MOS GATED DEVICES
|
|