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Reel/Frame:	069067/0410			Pages:	7
		Recorded:	09/27/2024
Attorney Dkt #:	001443-MULTI
Conveyance:	CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).

Total properties: 98

Patent #:	9159708	Issue Dt:	10/13/2015	Application #:	12839038	Filing Dt:	07/19/2010
Publication #:	US20120013001	Pub Dt:	01/19/2012
Title:	STACKABLE MOLDED MICROELECTRONIC PACKAGES WITH AREA ARRAY UNIT CONNECTORS

Patent #:	8975751	Issue Dt:	03/10/2015	Application #:	13092495	Filing Dt:	04/22/2011
Publication #:	US20120267789	Pub Dt:	10/25/2012
Title:	VIAS IN POROUS SUBSTRATES

Patent #:	8742541	Issue Dt:	06/03/2014	Application #:	13182890	Filing Dt:	07/14/2011
Publication #:	US20120181658	Pub Dt:	07/19/2012
Title:	HIGH DENSITY THREE-DIMENSIONAL INTEGRATED CAPACITORS

Patent #:	9515164	Issue Dt:	12/06/2016	Application #:	14198976	Filing Dt:	03/06/2014
Publication #:	US20150255463	Pub Dt:	09/10/2015
Title:	METHODS AND STRUCTURE TO FORM HIGH K METAL GATE STACK WITH SINGLE WORK-FUNCTION METAL

Patent #:	9190463	Issue Dt:	11/17/2015	Application #:	14291672	Filing Dt:	05/30/2014
Publication #:	US20140273393	Pub Dt:	09/18/2014
Title:	HIGH DENSITY THREE-DIMENSIONAL INTEGRATED CAPACITORS

Patent #:	9349691	Issue Dt:	05/24/2016	Application #:	14339704	Filing Dt:	07/24/2014
Publication #:	US20160027738	Pub Dt:	01/28/2016
Title:	SEMICONDUCTOR DEVICE WITH REDUCED VIA RESISTANCE

Patent #:	9455182	Issue Dt:	09/27/2016	Application #:	14466539	Filing Dt:	08/22/2014
Publication #:	US20160056076	Pub Dt:	02/25/2016
Title:	INTERCONNECT STRUCTURE WITH CAPPING LAYER AND BARRIER LAYER

Patent #:	9455181	Issue Dt:	09/27/2016	Application #:	14610300	Filing Dt:	01/30/2015
Publication #:	US20150140807	Pub Dt:	05/21/2015
Title:	VIAS IN POROUS SUBSTRATES

Patent #:	9443853	Issue Dt:	09/13/2016	Application #:	14680099	Filing Dt:	04/07/2015
Title:	MINIMIZING SHORTING BETWEEN FINFET EPITAXIAL REGIONS

Patent #:	9685507	Issue Dt:	06/20/2017	Application #:	14750013	Filing Dt:	06/25/2015
Publication #:	US20160379892	Pub Dt:	12/29/2016
Title:	FINFET DEVICES

Patent #:	9553076	Issue Dt:	01/24/2017	Application #:	14878548	Filing Dt:	10/08/2015
Publication #:	US20160086922	Pub Dt:	03/24/2016
Title:	STACKABLE MOLDED MICROELECTRONIC PACKAGES WITH AREA ARRAY UNIT CONNECTORS

Patent #:	9601371	Issue Dt:	03/21/2017	Application #:	14882568	Filing Dt:	10/14/2015
Publication #:	US20160056112	Pub Dt:	02/25/2016
Title:	INTERCONNECT STRUCTURE WITH BARRIER LAYER

Patent #:	9437557	Issue Dt:	09/06/2016	Application #:	14934544	Filing Dt:	11/06/2015
Publication #:	US20160079189	Pub Dt:	03/17/2016
Title:	HIGH DENSITY THREE-DIMENSIONAL INTEGRATED CAPACITORS

Patent #:	10256296	Issue Dt:	04/09/2019	Application #:	14951333	Filing Dt:	11/24/2015
Publication #:	US20170148874	Pub Dt:	05/25/2017
Title:	MIDDLE-OF-LINE (MOL) CAPACITANCE REDUCTION FOR SELF-ALIGNED CONTACT IN GATE STACK

Patent #:	9799605	Issue Dt:	10/24/2017	Application #:	14952017	Filing Dt:	11/25/2015
Publication #:	US20170148738	Pub Dt:	05/25/2017
Title:	ADVANCED COPPER INTERCONNECTS WITH HYBRID MICROSTRUCTURE

Patent #:	9564446	Issue Dt:	02/07/2017	Application #:	14971212	Filing Dt:	12/16/2015
Title:	SRAM DESIGN TO FACILITATE SINGLE FIN CUT IN DOUBLE SIDEWALL IMAGE TRANSFER PROCESS

Patent #:	9859160	Issue Dt:	01/02/2018	Application #:	15070411	Filing Dt:	03/15/2016
Publication #:	US20160197010	Pub Dt:	07/07/2016
Title:	SEMICONDUCTOR DEVICE WITH REDUCED VIA RESISTANCE

Patent #:	9953869	Issue Dt:	04/24/2018	Application #:	15078066	Filing Dt:	03/23/2016
Publication #:	US20160204069	Pub Dt:	07/14/2016
Title:	SEMICONDUCTOR DEVICE WITH REDUCED VIA RESISTANCE

Patent #:	10157797	Issue Dt:	12/18/2018	Application #:	15182043	Filing Dt:	06/14/2016
Publication #:	US20160380051	Pub Dt:	12/29/2016
Title:	FINFET DEVICES

Patent #:	9613869	Issue Dt:	04/04/2017	Application #:	15182048	Filing Dt:	06/14/2016
Publication #:	US20160379887	Pub Dt:	12/29/2016
Title:	FINFET DEVICES

Patent #:	9704753	Issue Dt:	07/11/2017	Application #:	15203847	Filing Dt:	07/07/2016
Publication #:	US20160315144	Pub Dt:	10/27/2016
Title:	MINIMIZING SHORTING BETWEEN FINFET EPITAXIAL REGIONS

Patent #:	10355080	Issue Dt:	07/16/2019	Application #:	15206127	Filing Dt:	07/08/2016
Publication #:	US20170148662	Pub Dt:	05/25/2017
Title:	SEMICONDUCTOR STRUCTURES INCLUDING MIDDLE-OF-LINE (MOL) CAPACITANCE REDUCTION FOR SELF-ALIGNED CONTACT IN GATE STACK

Patent #:	9947581	Issue Dt:	04/17/2018	Application #:	15214760	Filing Dt:	07/20/2016
Publication #:	US20160329279	Pub Dt:	11/10/2016
Title:	INTERCONNECT STRUCTURE

Patent #:	9852951	Issue Dt:	12/26/2017	Application #:	15237802	Filing Dt:	08/16/2016
Publication #:	US20160358824	Pub Dt:	12/08/2016
Title:	MINIMIZING SHORTING BETWEEN FINFET EPITAXIAL REGIONS

Patent #:	10395993	Issue Dt:	08/27/2019	Application #:	15284567	Filing Dt:	10/04/2016
Publication #:	US20170025315	Pub Dt:	01/26/2017
Title:	METHODS AND STRUCTURE TO FORM HIGH K METAL GATE STACK WITH SINGLE WORK-FUNCTION METAL

Patent #:	10032632	Issue Dt:	07/24/2018	Application #:	15284862	Filing Dt:	10/04/2016
Publication #:	US20180096846	Pub Dt:	04/05/2018
Title:	SELECTIVE GAS ETCHING FOR SELF-ALIGNED PATTERN TRANSFER

Patent #:	10096521	Issue Dt:	10/09/2018	Application #:	15396993	Filing Dt:	01/03/2017
Publication #:	US20170178963	Pub Dt:	06/22/2017
Title:	SRAM DESIGN TO FACILITATE SINGLE FIN CUT IN DOUBLE SIDEWALL IMAGE TRANSFER PROCESS

Patent #:	10170584	Issue Dt:	01/01/2019	Application #:	15417312	Filing Dt:	01/27/2017
Publication #:	US20180219082	Pub Dt:	08/02/2018
Title:	NANOSHEET FIELD EFFECT TRANSISTORS WITH PARTIAL INSIDE SPACERS

Patent #:	9947579	Issue Dt:	04/17/2018	Application #:	15417390	Filing Dt:	01/27/2017
Publication #:	US20170140981	Pub Dt:	05/18/2017
Title:	COPPER INTERCONNECT STRUCTURE WITH MANGANESE OXIDE BARRIER LAYER

Patent #:	10014221	Issue Dt:	07/03/2018	Application #:	15417597	Filing Dt:	01/27/2017
Publication #:	US20170140995	Pub Dt:	05/18/2017
Title:	FINFET DEVICES

Patent #:	10312103	Issue Dt:	06/04/2019	Application #:	15445112	Filing Dt:	02/28/2017
Publication #:	US20180247824	Pub Dt:	08/30/2018
Title:	ALTERNATING HARDMASKS FOR TIGHT-PITCH LINE FORMATION

Patent #:	10276435	Issue Dt:	04/30/2019	Application #:	15470038	Filing Dt:	03/27/2017
Publication #:	US20170200643	Pub Dt:	07/13/2017
Title:	ADVANCED COPPER INTERCONNECTS WITH HYBRID MICROSTRUCTURE

Patent #:	9911652	Issue Dt:	03/06/2018	Application #:	15472745	Filing Dt:	03/29/2017
Title:	FORMING SELF-ALIGNED VIAS AND AIR-GAPS IN SEMICONDUCTOR FABRICATION

Patent #:	9985024	Issue Dt:	05/29/2018	Application #:	15494586	Filing Dt:	04/24/2017
Publication #:	US20170229455	Pub Dt:	08/10/2017
Title:	MINIMIZING SHORTING BETWEEN FINFET EPITAXIAL REGIONS

Patent #:	10559670	Issue Dt:	02/11/2020	Application #:	15797648	Filing Dt:	10/30/2017
Publication #:	US20180219083	Pub Dt:	08/02/2018
Title:	NANOSHEET FIELD EFFECT TRANSISTORS WITH PARTIAL INSIDE SPACERS

Patent #:	10410875	Issue Dt:	09/10/2019	Application #:	15802634	Filing Dt:	11/03/2017
Publication #:	US20180247825	Pub Dt:	08/30/2018
Title:	ALTERNATING HARDMASKS FOR TIGHT-PITCH LINE FORMATION

Patent #:	10276658	Issue Dt:	04/30/2019	Application #:	15813277	Filing Dt:	11/15/2017
Publication #:	US20180076094	Pub Dt:	03/15/2018
Title:	FINFET DEVICES

Patent #:	10243061	Issue Dt:	03/26/2019	Application #:	15814376	Filing Dt:	11/15/2017
Title:	NANOSHEET TRANSISTOR

Patent #:	10242911	Issue Dt:	03/26/2019	Application #:	15815173	Filing Dt:	11/16/2017
Publication #:	US20180286750	Pub Dt:	10/04/2018
Title:	FORMING SELF-ALIGNED VIAS AND AIR-GAPS IN SEMICONDUCTOR FABRICATION

Patent #:	10325806	Issue Dt:	06/18/2019	Application #:	15825646	Filing Dt:	11/29/2017
Publication #:	US20180090371	Pub Dt:	03/29/2018
Title:	COPPER INTERCONNECT STRUCTURE WITH MANGANESE OXIDE BARRIER LAYER

Patent #:	10224241	Issue Dt:	03/05/2019	Application #:	15825889	Filing Dt:	11/29/2017
Publication #:	US20180082894	Pub Dt:	03/22/2018
Title:	COPPER INTERCONNECT STRUCTURE WITH MANGANESE OXIDE BARRIER LAYER

Patent #:	10141402	Issue Dt:	11/27/2018	Application #:	15827053	Filing Dt:	11/30/2017
Publication #:	US20180090567	Pub Dt:	03/29/2018
Title:	FINFET DEVICES

Patent #:	10361117	Issue Dt:	07/23/2019	Application #:	15837361	Filing Dt:	12/11/2017
Publication #:	US20190181033	Pub Dt:	06/13/2019
Title:	SELECTIVE ILD DEPOSITION FOR FULLY ALIGNED VIA WITH AIRGAP

Patent #:	10573528	Issue Dt:	02/25/2020	Application #:	15842841	Filing Dt:	12/14/2017
Publication #:	US20190189457	Pub Dt:	06/20/2019
Title:	TWO-COLOR SELF-ALIGNED DOUBLE PATTERNING (SADP) TO YIELD STATIC RANDOM ACCESS MEMORY (SRAM) AND DENSE LOGIC

Patent #:	10424651	Issue Dt:	09/24/2019	Application #:	15880757	Filing Dt:	01/26/2018
Publication #:	US20190237559	Pub Dt:	08/01/2019
Title:	FORMING NANOSHEET TRANSISTOR USING SACRIFICIAL SPACER AND INNER SPACERS

Patent #:	10553483	Issue Dt:	02/04/2020	Application #:	15897526	Filing Dt:	02/15/2018
Publication #:	US20180174903	Pub Dt:	06/21/2018
Title:	SEMICONDUCTOR DEVICE WITH REDUCED VIA RESISTANCE

Patent #:	10276569	Issue Dt:	04/30/2019	Application #:	15923097	Filing Dt:	03/16/2018
Publication #:	US20180204837	Pub Dt:	07/19/2018
Title:	MINIMIZING SHORTING BETWEEN FINFET EPITAXIAL REGIONS

Patent #:	10559467	Issue Dt:	02/11/2020	Application #:	16001426	Filing Dt:	06/06/2018
Publication #:	US20180286682	Pub Dt:	10/04/2018
Title:	SELECTIVE GAS ETCHING FOR SELF-ALIGNED PATTERN TRANSFER

Patent #:	10615074	Issue Dt:	04/07/2020	Application #:	16057056	Filing Dt:	08/07/2018
Publication #:	US20180342419	Pub Dt:	11/29/2018
Title:	ADVANCED COPPER INTERCONNECTS WITH HYBRID MICROSTRUCTURE

Patent #:	10224247	Issue Dt:	03/05/2019	Application #:	16115953	Filing Dt:	08/29/2018
Publication #:	US20180374756	Pub Dt:	12/27/2018
Title:	FINFET DEVICES

Patent #:	10319640	Issue Dt:	06/11/2019	Application #:	16115967	Filing Dt:	08/29/2018
Publication #:	US20190013247	Pub Dt:	01/10/2019
Title:	FINFET DEVICES

Patent #:	10593591	Issue Dt:	03/17/2020	Application #:	16118998	Filing Dt:	08/31/2018
Publication #:	US20180374748	Pub Dt:	12/27/2018
Title:	INTERCONNECT STRUCTURE

Patent #:	10763166	Issue Dt:	09/01/2020	Application #:	16250561	Filing Dt:	01/17/2019
Publication #:	US20190157146	Pub Dt:	05/23/2019
Title:	SELF-FORMING BARRIER FOR USE IN AIR GAP FORMATION

Patent #:	10727315	Issue Dt:	07/28/2020	Application #:	16252663	Filing Dt:	01/20/2019
Publication #:	US20190157420	Pub Dt:	05/23/2019
Title:	NANOSHEET TRANSISTOR

Patent #:	10930553	Issue Dt:	02/23/2021	Application #:	16257221	Filing Dt:	01/25/2019
Publication #:	US20190172748	Pub Dt:	06/06/2019
Title:	FORMING SELF-ALIGNED VIAS AND AIR-GAPS IN SEMICONDUCTOR FABRICATION

Patent #:	10763326	Issue Dt:	09/01/2020	Application #:	16261305	Filing Dt:	01/29/2019
Publication #:	US20190157388	Pub Dt:	05/23/2019
Title:	MIDDLE-OF-LINE (MOL) CAPACITANCE REDUCTION FOR SELF-ALIGNED CONTACT IN GATE STACK

Patent #:	10699962	Issue Dt:	06/30/2020	Application #:	16265110	Filing Dt:	02/01/2019
Publication #:	US20190181049	Pub Dt:	06/13/2019
Title:	FINFET DEVICES

Patent #:	10923471	Issue Dt:	02/16/2021	Application #:	16296433	Filing Dt:	03/08/2019
Publication #:	US20190206865	Pub Dt:	07/04/2019
Title:	MINIMIZING SHORTING BETWEEN FINFET EPITAXIAL REGIONS

Patent #:	11121233	Issue Dt:	09/14/2021	Application #:	16391622	Filing Dt:	04/23/2019
Publication #:	US20190252516	Pub Dt:	08/15/2019
Title:	FORMING NANOSHEET TRANSISTOR USING SACRIFICIAL SPACER AND INNER SPACERS

Patent #:	10937861	Issue Dt:	03/02/2021	Application #:	16399845	Filing Dt:	04/30/2019
Publication #:	US20190259831	Pub Dt:	08/22/2019
Title:	SEMICONDUCTOR STRUCTURES INCLUDING MIDDLE-OF-LINE (MOL) CAPACITANCE REDUCTION FOR SELF-ALIGNED CONTACT IN GATE STACK

Patent #:	10651078	Issue Dt:	05/12/2020	Application #:	16406115	Filing Dt:	05/08/2019
Publication #:	US20190267278	Pub Dt:	08/29/2019
Title:	SELECTIVE ILD DEPOSITION FOR FULLY ALIGNED VIA WITH AIRGAP

Patent #:	NONE	Issue Dt:		Application #:	16454178	Filing Dt:	06/27/2019
Publication #:	US20190318966	Pub Dt:	10/17/2019
Title:	HIGH K METAL GATE STACK WITH SINGLE WORK-FUNCTION METAL

Patent #:	11031248	Issue Dt:	06/08/2021	Application #:	16508691	Filing Dt:	07/11/2019
Publication #:	US20190333774	Pub Dt:	10/31/2019
Title:	ALTERNATING HARDMASKS FOR TIGHT-PITCH LINE FORMATION

Patent #:	10770347	Issue Dt:	09/08/2020	Application #:	16657169	Filing Dt:	10/18/2019
Publication #:	US20200051854	Pub Dt:	02/13/2020
Title:	INTERCONNECT STRUCTURE

Patent #:	10930504	Issue Dt:	02/23/2021	Application #:	16682588	Filing Dt:	11/13/2019
Publication #:	US20200083045	Pub Dt:	03/12/2020
Title:	SELECTIVE GAS ETCHING FOR SELF-ALIGNED PATTERN TRANSFER

Patent #:	11342446	Issue Dt:	05/24/2022	Application #:	16684115	Filing Dt:	11/14/2019
Publication #:	US20200098893	Pub Dt:	03/26/2020
Title:	NANOSHEET FIELD EFFECT TRANSISTORS WITH PARTIAL INSIDE SPACERS

Patent #:	10804147	Issue Dt:	10/13/2020	Application #:	16689142	Filing Dt:	11/20/2019
Publication #:	US20200090993	Pub Dt:	03/19/2020
Title:	SEMICONDUCTOR DEVICE WITH REDUCED VIA RESISTANCE

Patent #:	11222815	Issue Dt:	01/11/2022	Application #:	16689223	Filing Dt:	11/20/2019
Title:	SEMICONDUCTOR DEVICE WITH REDUCED VIA RESISTANCE

Patent #:	11062911	Issue Dt:	07/13/2021	Application #:	16796614	Filing Dt:	02/20/2020
Publication #:	US20200266072	Pub Dt:	08/20/2020
Title:	TWO-COLOR SELF-ALIGNED DOUBLE PATTERNING (SADP) TO YIELD STATIC RANDOM ACCESS MEMORY (SRAM) AND DENSE LOGIC

Patent #:	11222817	Issue Dt:	01/11/2022	Application #:	16835056	Filing Dt:	03/30/2020
Publication #:	US20200227317	Pub Dt:	07/16/2020
Title:	ADVANCED COPPER INTERCONNECTS WITH HYBRID MICROSTRUCTURE

Patent #:	10964588	Issue Dt:	03/30/2021	Application #:	16868475	Filing Dt:	05/06/2020
Publication #:	US20200388525	Pub Dt:	12/10/2020
Title:	SELECTIVE ILD DEPOSITION FOR FULLY ALIGNED VIA WITH AIRGAP

Patent #:	11145551	Issue Dt:	10/12/2021	Application #:	16911158	Filing Dt:	06/24/2020
Publication #:	US20200328124	Pub Dt:	10/15/2020
Title:	FINFET DEVICES

Patent #:	11049953	Issue Dt:	06/29/2021	Application #:	16939415	Filing Dt:	07/27/2020
Publication #:	US20200357895	Pub Dt:	11/12/2020
Title:	NANOSHEET TRANSISTOR

Patent #:	11587830	Issue Dt:	02/21/2023	Application #:	17007779	Filing Dt:	08/31/2020
Publication #:	US20200402849	Pub Dt:	12/24/2020
Title:	SELF-FORMING BARRIER FOR USE IN AIR GAP FORMATION

Patent #:	11232983	Issue Dt:	01/25/2022	Application #:	17011823	Filing Dt:	09/03/2020
Publication #:	US20200402848	Pub Dt:	12/24/2020
Title:	COPPER INTERCONNECT STRUCTURE WITH MANGANESE BARRIER LAYER

Patent #:	11664375	Issue Dt:	05/30/2023	Application #:	17175340	Filing Dt:	02/12/2021
Publication #:	US20210183856	Pub Dt:	06/17/2021
Title:	MINIMIZING SHORTING BETWEEN FINFET EPITAXIAL REGIONS

Patent #:	11302533	Issue Dt:	04/12/2022	Application #:	17181269	Filing Dt:	02/22/2021
Publication #:	US20210183653	Pub Dt:	06/17/2021
Title:	SELECTIVE GAS ETCHING FOR SELF-ALIGNED PATTERN TRANSFER

Patent #:	11380583	Issue Dt:	07/05/2022	Application #:	17181399	Filing Dt:	02/22/2021
Publication #:	US20210202313	Pub Dt:	07/01/2021
Title:	FORMING SELF-ALIGNED VIAS AND AIR-GAPS IN SEMICONDUCTOR FABRICATION

Patent #:	11488862	Issue Dt:	11/01/2022	Application #:	17187390	Filing Dt:	02/26/2021
Publication #:	US20210183699	Pub Dt:	06/17/2021
Title:	SEMICONDUCTOR DEVICE WITH REDUCED VIA RESISTANCE

Patent #:	11522045	Issue Dt:	12/08/2016	Application #:	17188350	Filing Dt:	03/08/2016
Publication #:	US20210210596	Pub Dt:	07/08/2021
Title:	SEMICONDUCTOR STRUCTURES INCLUDING MIDDLE-OF-LINE (MOL) CAPACITANCE REDUCTION FOR SELF-ALIGNED CONTACT IN GATE STACK

Patent #:	11676854	Issue Dt:	06/13/2023	Application #:	17215314	Filing Dt:	03/29/2021
Publication #:	US20210217653	Pub Dt:	07/15/2021
Title:	SELECTIVE ILD DEPOSITION FOR FULLY ALIGNED VIA WITH AIRGAP

Patent #:	11610780	Issue Dt:	03/21/2023	Application #:	17340915	Filing Dt:	06/07/2021
Publication #:	US20210335619	Pub Dt:	10/28/2021
Title:	ALTERNATING HARDMASKS FOR TIGHT-PITCH LINE FORMATION

Patent #:	11699591	Issue Dt:	07/11/2023	Application #:	17360819	Filing Dt:	06/28/2021
Publication #:	US20210343536	Pub Dt:	11/04/2021
Title:	TWO-COLOR SELF-ALIGNED DOUBLE PATTERNING (SADP) TO YIELD STATIC RANDOM ACCESS MEMORY (SRAM) AND DENSE LOGIC

Patent #:	11682715	Issue Dt:	06/20/2023	Application #:	17465135	Filing Dt:	09/02/2021
Publication #:	US20210399114	Pub Dt:	12/23/2021
Title:	FORMING NANOSHEET TRANSISTOR USING SACRIFICIAL SPACER AND INNER SPACERS

Patent #:	11615988	Issue Dt:	03/28/2023	Application #:	17482903	Filing Dt:	09/23/2021
Publication #:	US20220013413	Pub Dt:	01/13/2022
Title:	FINFET DEVICES

Patent #:	11881433	Issue Dt:	01/23/2024	Application #:	17546511	Filing Dt:	12/09/2021
Publication #:	US20220165620	Pub Dt:	05/26/2022
Title:	ADVANCED COPPER INTERCONNECTS WITH HYBRID MICROSTRUCTURE

Patent #:	11804405	Issue Dt:	10/31/2023	Application #:	17556382	Filing Dt:	12/20/2021
Publication #:	US20220115269	Pub Dt:	04/14/2022
Title:	METHOD OF FORMING COPPER INTERCONNECT STRUCTURE WITH MANGANESE BARRIER LAYER

Patent #:	NONE	Issue Dt:		Application #:	17688068	Filing Dt:	03/07/2022
Publication #:	US20220262636	Pub Dt:	08/18/2022
Title:	SELECTIVE GAS ETCHING FOR SELF-ALIGNED PATTERN TRANSFER

Patent #:	NONE	Issue Dt:		Application #:	17726766	Filing Dt:	04/22/2022
Publication #:	US20220320316	Pub Dt:	10/06/2022
Title:	METHOD OF FORMING NANOSHEET FIELD EFFECT TRANSISTORS WITH PARTIAL INSIDE SPACERS

Patent #:	NONE	Issue Dt:		Application #:	17833366	Filing Dt:	06/06/2022
Publication #:	US20220406658	Pub Dt:	12/22/2022
Title:	FORMING SELF-ALIGNED VIAS AND AIR-GAPS IN SEMICONDUCTOR FABRICATION

Patent #:	12237368	Issue Dt:	02/25/2025	Application #:	17980949	Filing Dt:	11/04/2022
Publication #:	US20230299134	Pub Dt:	09/21/2023
Title:	SEMICONDUCTOR STRUCTURES INCLUDING MIDDLE-OF-LINE (MOL) CAPACITANCE REDUCTION FOR SELF-ALIGNED CONTACT IN GATE STACK

Patent #:	NONE	Issue Dt:		Application #:	17992273	Filing Dt:	11/22/2022
Publication #:	US20230335438	Pub Dt:	10/19/2023
Title:	SELF-FORMING BARRIER FOR USE IN AIR GAP FORMATION

Patent #:	NONE	Issue Dt:	06/03/2025	Application #:	18109631	Filing Dt:	02/14/2023
Publication #:	US20240030036	Pub Dt:	01/25/2024
Title:	ALTERNATING HARDMASKS FOR TIGHT-PITCH LINE FORMATION

Patent #:	NONE	Issue Dt:		Application #:	18115302	Filing Dt:	02/28/2023
Publication #:	US20240038594	Pub Dt:	02/01/2024
Title:	FINFET DEVICES

Patent #:	12237328	Issue Dt:	02/25/2025	Application #:	18136641	Filing Dt:	04/19/2023
Publication #:	US20240055426	Pub Dt:	02/15/2024
Title:	MINIMIZING SHORTING BETWEEN FINFET EPITAXIAL REGIONS

Patent #:	12218003	Issue Dt:	02/04/2025	Application #:	18139199	Filing Dt:	04/25/2023
Publication #:	US20240096693	Pub Dt:	03/21/2024
Title:	SELECTIVE ILD DEPOSITION FOR FULLY ALIGNED VIA WITH AIRGAP

Patent #:	12154971	Issue Dt:	11/26/2024	Application #:	18195269	Filing Dt:	05/09/2023
Publication #:	US20240120408	Pub Dt:	04/11/2024
Title:	FORMING NANOSHEET TRANSISTOR USING SACRIFICIAL SPACER AND INNER SPACERS

Patent #:	11978639	Issue Dt:	05/07/2024	Application #:	18201061	Filing Dt:	05/23/2023
Publication #:	US20240079247	Pub Dt:	03/07/2024
Title:	TWO-COLOR SELF-ALIGNED DOUBLE PATTERNING (SADP) TO YIELD STATIC RANDOM ACCESS MEMORY (SRAM) AND DENSE LOGIC

Assignor

TESSERA LLC

Exec Dt:

08/15/2022

Assignee

ADEIA SEMICONDUCTOR SOLUTIONS LLC

3025 ORCHARD PARKWAY

SAN JOSE, CALIFORNIA 95134

Correspondence name and address
	HALEY GUILIANO LLP
	75 BROAD STREET
	SUITE 1000
	NEW YORK, NY 10004

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