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Reel/Frame:053547/0421   Pages: 405
Recorded: 12/10/2019
Attorney Dkt #:CORRECTION TO 037486/0517
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.
Total properties: 6067
Page 22 of 61
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61
1
Patent #:
6881264
Issue Dt:
04/19/2005
Application #:
10643820
Filing Dt:
08/19/2003
Publication #:
US20040154530
Pub Dt:
08/12/2004
Title:
CONFIGURATION AND A METHOD FOR REDUCING CONTAMINATION WITH PARTICLES ON A SUBSTRATE IN A PROCESS TOOL
2
Patent #:
6917097
Issue Dt:
07/12/2005
Application #:
10644160
Filing Dt:
08/20/2003
Publication #:
US20050012183
Pub Dt:
01/20/2005
Title:
DUAL GAUGE LEADFRAME
3
Patent #:
7088009
Issue Dt:
08/08/2006
Application #:
10644163
Filing Dt:
08/20/2003
Publication #:
US20050040501
Pub Dt:
02/24/2005
Title:
WIREBONDED ASSEMBLAGE METHOD AND APPARATUS
4
Patent #:
6924172
Issue Dt:
08/02/2005
Application #:
10649426
Filing Dt:
08/26/2003
Publication #:
US20050048755
Pub Dt:
03/03/2005
Title:
Method of forming a bond pad including removing a portion of a protective layer
5
Patent #:
7170135
Issue Dt:
01/30/2007
Application #:
10651128
Filing Dt:
08/28/2003
Publication #:
US20040104437
Pub Dt:
06/03/2004
Title:
ARRANGEMENT AND METHOD FOR ESD PROTECTION
6
Patent #:
6919590
Issue Dt:
07/19/2005
Application #:
10651544
Filing Dt:
08/29/2003
Publication #:
US20050045911
Pub Dt:
03/03/2005
Title:
HETEROJUNCTION BIPOLAR TRANSISTOR WITH MONOLITHICALLY INTEGRATED JUNCTION FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING SAME
7
Patent #:
7019403
Issue Dt:
03/28/2006
Application #:
10652136
Filing Dt:
08/29/2003
Publication #:
US20050046026
Pub Dt:
03/03/2005
Title:
ADHESIVE FILM AND TACKING PADS FOR PRINTED WIRING ASSEMBLIES
8
Patent #:
6870444
Issue Dt:
03/22/2005
Application #:
10652406
Filing Dt:
08/28/2003
Publication #:
US20050046518
Pub Dt:
03/03/2005
Title:
ELECTROMECHANICAL RESONATOR AND METHOD OF OPERATING SAME
9
Patent #:
7261230
Issue Dt:
08/28/2007
Application #:
10652434
Filing Dt:
08/29/2003
Publication #:
US20050045692
Pub Dt:
03/03/2005
Title:
WIREBONDING INSULATED WIRE AND CAPILLARY THEREFOR
10
Patent #:
6906582
Issue Dt:
06/14/2005
Application #:
10652530
Filing Dt:
08/29/2003
Publication #:
US20050046467
Pub Dt:
03/03/2005
Title:
CIRCUIT VOLTAGE REGULATION
11
Patent #:
7212799
Issue Dt:
05/01/2007
Application #:
10654922
Filing Dt:
09/05/2003
Publication #:
US20040048595
Pub Dt:
03/11/2004
Title:
METHOD AND APPARATUS FOR ACQUIRING AND TRACKING ULTRAWIDE BANDWIDTH SIGNALS
12
Patent #:
6856173
Issue Dt:
02/15/2005
Application #:
10656051
Filing Dt:
09/05/2003
Publication #:
US20050052204
Pub Dt:
03/10/2005
Title:
MULTIPLEXING OF DIGITAL SIGNALS AT MULTIPLE SUPPLY VOLTAGES IN AN INTEGRATED CIRCUIT
13
Patent #:
7315932
Issue Dt:
01/01/2008
Application #:
10657331
Filing Dt:
09/08/2003
Publication #:
US20050053012
Pub Dt:
03/10/2005
Title:
DATA PROCESSING SYSTEM HAVING INSTRUCTION SPECIFIERS FOR SIMD REGISTER OPERANDS AND METHOD THEREOF
14
Patent #:
7610466
Issue Dt:
10/27/2009
Application #:
10657510
Filing Dt:
09/05/2003
Publication #:
US20050055543
Pub Dt:
03/10/2005
Title:
DATA PROCESSING SYSTEM USING INDEPENDENT MEMORY AND REGISTER OPERAND SIZE SPECIFIERS AND METHOD THEREOF
15
Patent #:
7107436
Issue Dt:
09/12/2006
Application #:
10657593
Filing Dt:
09/08/2003
Publication #:
US20050055534
Pub Dt:
03/10/2005
Title:
CONDITIONAL NEXT PORTION TRANSFERRING OF DATA STREAM TO OR FROM REGISTER BASED ON SUBSEQUENT INSTRUCTION ASPECT.
16
Patent #:
7124385
Issue Dt:
10/17/2006
Application #:
10657609
Filing Dt:
09/08/2003
Publication #:
US20040078768
Pub Dt:
04/22/2004
Title:
METHOD FOR AUTOMATED TRANSISTOR FOLDING
17
Patent #:
7275148
Issue Dt:
09/25/2007
Application #:
10657797
Filing Dt:
09/08/2003
Publication #:
US20050055535
Pub Dt:
03/10/2005
Title:
DATA PROCESSING SYSTEM USING MULTIPLE ADDRESSING MODES FOR SIMD OPERATIONS AND METHOD THEREOF
18
Patent #:
6992003
Issue Dt:
01/31/2006
Application #:
10659885
Filing Dt:
09/11/2003
Publication #:
US20050059245
Pub Dt:
03/17/2005
Title:
INTEGRATION OF ULTRA LOW K DIELECTRIC IN A SEMICONDUCTOR FABRICATION PROCESS
19
Patent #:
7065207
Issue Dt:
06/20/2006
Application #:
10660446
Filing Dt:
09/11/2003
Publication #:
US20050058277
Pub Dt:
03/17/2005
Title:
CONTROLLING ATTENUATION DURING ECHO SUPPRESSION
20
Patent #:
7012324
Issue Dt:
03/14/2006
Application #:
10660828
Filing Dt:
09/12/2003
Publication #:
US20050056920
Pub Dt:
03/17/2005
Title:
LEAD FRAME WITH FLAG SUPPORT STRUCTURE
21
Patent #:
7013357
Issue Dt:
03/14/2006
Application #:
10660845
Filing Dt:
09/12/2003
Publication #:
US20050060455
Pub Dt:
03/17/2005
Title:
ARBITER HAVING PROGRAMMABLE ARBITRATION POINTS FOR UNDEFINED LENGTH BURST ACCESSES AND METHOD
22
Patent #:
6954100
Issue Dt:
10/11/2005
Application #:
10660847
Filing Dt:
09/12/2003
Publication #:
US20050057296
Pub Dt:
03/17/2005
Title:
LEVEL SHIFTER
23
Patent #:
6908822
Issue Dt:
06/21/2005
Application #:
10662832
Filing Dt:
09/15/2003
Publication #:
US20050056899
Pub Dt:
03/17/2005
Title:
SEMICONDUCTOR DEVICE HAVING AN INSULATING LAYER AND METHOD FOR FORMING
24
Patent #:
6958265
Issue Dt:
10/25/2005
Application #:
10663621
Filing Dt:
09/16/2003
Publication #:
US20050059213
Pub Dt:
03/17/2005
Title:
SEMICONDUCTOR DEVICE WITH NANOCLUSTERS
25
Patent #:
7074527
Issue Dt:
07/11/2006
Application #:
10668432
Filing Dt:
09/23/2003
Publication #:
US20050064299
Pub Dt:
03/24/2005
Title:
METHOD FOR FABRICATING A MASK USING A HARDMASK AND METHOD FOR MAKING A SEMICONDUCTOR DEVICE USING THE SAME
26
Patent #:
7078785
Issue Dt:
07/18/2006
Application #:
10668694
Filing Dt:
09/23/2003
Publication #:
US20050062130
Pub Dt:
03/24/2005
Title:
SEMICONDUCTOR DEVICE AND MAKING THEREOF
27
Patent #:
6964911
Issue Dt:
11/15/2005
Application #:
10668714
Filing Dt:
09/23/2003
Publication #:
US20050064669
Pub Dt:
03/24/2005
Title:
METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING ISOLATION REGIONS
28
Patent #:
7030469
Issue Dt:
04/18/2006
Application #:
10670631
Filing Dt:
09/25/2003
Publication #:
US20050067676
Pub Dt:
03/31/2005
Title:
METHOD OF FORMING A SEMICONDUCTOR PACKAGE AND STRUCTURE THEREOF
29
Patent #:
6849515
Issue Dt:
02/01/2005
Application #:
10670634
Filing Dt:
09/25/2003
Title:
SEMICONDUCTOR PROCESS FOR DISPOSABLE SIDEWALL SPACERS AND STRUCTURE
30
Patent #:
7023195
Issue Dt:
04/04/2006
Application #:
10670683
Filing Dt:
09/25/2003
Publication #:
US20040061488
Pub Dt:
04/01/2004
Title:
MODULE, SYSTEM AND METHOD FOR TESTING A PHASE LOCKED LOOP
31
Patent #:
7029980
Issue Dt:
04/18/2006
Application #:
10670928
Filing Dt:
09/25/2003
Publication #:
US20050070056
Pub Dt:
03/31/2005
Title:
METHOD OF MANUFACTURING SOI TEMPLATE LAYER
32
Patent #:
7085943
Issue Dt:
08/01/2006
Application #:
10672161
Filing Dt:
09/26/2003
Publication #:
US20050071693
Pub Dt:
03/31/2005
Title:
METHOD AND CIRCUITRY FOR CONTROLLING SUPPLY VOLTAGE IN A DATA PROCESSING SYSTEM
33
Patent #:
7151387
Issue Dt:
12/19/2006
Application #:
10672487
Filing Dt:
09/26/2003
Publication #:
US20040064772
Pub Dt:
04/01/2004
Title:
ANALYSIS MODULE, INTEGRATED CIRCUIT, SYSTEM AND METHOD FOR TESTING AN INTEGRATED CIRCUIT
34
Patent #:
6917555
Issue Dt:
07/12/2005
Application #:
10675005
Filing Dt:
09/30/2003
Publication #:
US20050068799
Pub Dt:
03/31/2005
Title:
INTEGRATED CIRCUIT POWER MANAGEMENT FOR REDUCING LEAKAGE CURRENT IN CIRCUIT ARRAYS AND METHOD THEREFOR
35
Patent #:
7020769
Issue Dt:
03/28/2006
Application #:
10675092
Filing Dt:
09/30/2003
Publication #:
US20050071615
Pub Dt:
03/31/2005
Title:
METHOD AND SYSTEM FOR PROCESSING A LOOP OF INSTRUCTIONS
36
Patent #:
6850105
Issue Dt:
02/01/2005
Application #:
10675397
Filing Dt:
09/30/2003
Title:
METHOD AND CIRCUITRY FOR PRESERVING A LOGIC STATE
37
Patent #:
7360023
Issue Dt:
04/15/2008
Application #:
10675432
Filing Dt:
09/30/2003
Publication #:
US20050071565
Pub Dt:
03/31/2005
Title:
METHOD AND SYSTEM FOR REDUCING POWER CONSUMPTION IN A CACHE MEMORY
38
Patent #:
6949455
Issue Dt:
09/27/2005
Application #:
10677070
Filing Dt:
10/01/2003
Publication #:
US20040063285
Pub Dt:
04/01/2004
Title:
METHOD FOR FORMING A SEMICONDUCTOR DEVICE STRUCTURE A SEMICONDUCTOR LAYER
39
Patent #:
6919258
Issue Dt:
07/19/2005
Application #:
10677573
Filing Dt:
10/02/2003
Publication #:
US20050073028
Pub Dt:
04/07/2005
Title:
SEMICONDUCTOR DEVICE INCORPORATING A DEFECT CONTROLLED STRAINED CHANNEL STRUCTURE AND METHOD OF MAKING THE SAME
40
Patent #:
7280615
Issue Dt:
10/09/2007
Application #:
10677753
Filing Dt:
10/03/2003
Publication #:
US20040120424
Pub Dt:
06/24/2004
Title:
METHOD FOR MAKING A CLEAR CHANNEL ASSESSMENT IN A WIRELESS NETWORK
41
Patent #:
6831350
Issue Dt:
12/14/2004
Application #:
10677844
Filing Dt:
10/02/2003
Title:
SEMICONDUCTOR STRUCTURE WITH DIFFERENT LATTICE CONSTANT MATERIALS AND METHOD FOR FORMING THE SAME
42
Patent #:
7088702
Issue Dt:
08/08/2006
Application #:
10680489
Filing Dt:
10/08/2003
Publication #:
US20040072573
Pub Dt:
04/15/2004
Title:
METHOD FOR CONTROLLING A DATA STREAM IN A WIRELESS NETWORK
43
Patent #:
7072635
Issue Dt:
07/04/2006
Application #:
10680491
Filing Dt:
10/08/2003
Publication #:
US20040067765
Pub Dt:
04/08/2004
Title:
METHOD FOR COMBINING DATA FROM PHASE INDETERMINATE DATA STREAMS FOR RAKING
44
Patent #:
7292622
Issue Dt:
11/06/2007
Application #:
10680492
Filing Dt:
10/08/2003
Publication #:
US20040066842
Pub Dt:
04/08/2004
Title:
METHOD AND APPARATUS FOR RAKING IN A WIRELESS NETWORK
45
Patent #:
7623894
Issue Dt:
11/24/2009
Application #:
10682746
Filing Dt:
10/09/2003
Publication #:
US20050079889
Pub Dt:
04/14/2005
Title:
CELLULAR MODEM PROCESSING
46
Patent #:
7123892
Issue Dt:
10/17/2006
Application #:
10683493
Filing Dt:
10/10/2003
Publication #:
US20050079838
Pub Dt:
04/14/2005
Title:
ARCHITECTURE FOR AN AM/FM DIGITAL INTERMEDIATE FREQUENCY RADIO
47
Patent #:
7047350
Issue Dt:
05/16/2006
Application #:
10683778
Filing Dt:
10/10/2003
Publication #:
US20050080975
Pub Dt:
04/14/2005
Title:
DATA PROCESSING SYSTEM HAVING A SERIAL DATA CONTROLLER
48
Patent #:
6970336
Issue Dt:
11/29/2005
Application #:
10684112
Filing Dt:
10/10/2003
Publication #:
US20050078419
Pub Dt:
04/14/2005
Title:
ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT AND METHOD OF OPERATION
49
Patent #:
7293153
Issue Dt:
11/06/2007
Application #:
10685561
Filing Dt:
10/14/2003
Publication #:
US20050080949
Pub Dt:
04/14/2005
Title:
METHOD AND SYSTEM FOR DIRECT ACCESS TO A NON-MEMORY MAPPED DEVICE MEMORY
50
Patent #:
7144825
Issue Dt:
12/05/2006
Application #:
10687271
Filing Dt:
10/16/2003
Publication #:
US20050085092
Pub Dt:
04/21/2005
Title:
MULTI-LAYER DIELECTRIC CONTAINING DIFFUSION BARRIER MATERIAL
51
Patent #:
6986974
Issue Dt:
01/17/2006
Application #:
10688589
Filing Dt:
10/16/2003
Publication #:
US20050084768
Pub Dt:
04/21/2005
Title:
ATTENUATED PHASE SHIFT MASK FOR EXTREME ULTRAVIOLET LITHOGRAPHY AND METHOD THEREFORE
52
Patent #:
7038547
Issue Dt:
05/02/2006
Application #:
10689240
Filing Dt:
10/20/2003
Publication #:
US20050083134
Pub Dt:
04/21/2005
Title:
AMPLIFIER CIRCUIT
53
Patent #:
6902440
Issue Dt:
06/07/2005
Application #:
10690060
Filing Dt:
10/21/2003
Publication #:
US20050085082
Pub Dt:
04/21/2005
Title:
METHOD OF FORMING A LOW K DIELECTRIC IN A SEMICONDUCTOR MANUFACTURING PROCESS
54
Patent #:
6933227
Issue Dt:
08/23/2005
Application #:
10691984
Filing Dt:
10/23/2003
Publication #:
US20050087870
Pub Dt:
04/28/2005
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
55
Patent #:
6892108
Issue Dt:
05/10/2005
Application #:
10694594
Filing Dt:
10/27/2003
Publication #:
US20040125191
Pub Dt:
07/01/2004
Title:
METHOD FOR ADJUSTING PROCESSING PARAMETERS OF AT LEAST ONE PLATE-SHAPED OBJECT IN A PROCESSING TOOL
56
Patent #:
6951783
Issue Dt:
10/04/2005
Application #:
10695163
Filing Dt:
10/28/2003
Publication #:
US20050101069
Pub Dt:
05/12/2005
Title:
CONFINED SPACERS FOR DOUBLE GATE TRANSISTOR SEMICONDUCTOR FABRICATION PROCESS
57
Patent #:
7041562
Issue Dt:
05/09/2006
Application #:
10696079
Filing Dt:
10/29/2003
Publication #:
US20050093063
Pub Dt:
05/05/2005
Title:
METHOD FOR FORMING MULTIPLE GATE OXIDE THICKNESS UTILIZING ASHING AND CLEANING
58
Patent #:
7146593
Issue Dt:
12/05/2006
Application #:
10700883
Filing Dt:
11/04/2003
Publication #:
US20050097490
Pub Dt:
05/05/2005
Title:
METHOD OF IMPLEMENTING POLISHING UNIFORMITY AND MODIFYING LAYOUT DATA
59
Patent #:
6928005
Issue Dt:
08/09/2005
Application #:
10703657
Filing Dt:
11/05/2003
Publication #:
US20050105324
Pub Dt:
05/19/2005
Title:
DOMINO COMPARATOR CAPABLE FOR USE IN A MEMORY ARRAY
60
Patent #:
7171526
Issue Dt:
01/30/2007
Application #:
10703924
Filing Dt:
11/07/2003
Publication #:
US20050102444
Pub Dt:
05/12/2005
Title:
MEMORY CONTROLLER USEABLE IN A DATA PROCESSING SYSTEM
61
Patent #:
7394866
Issue Dt:
07/01/2008
Application #:
10705120
Filing Dt:
11/12/2003
Publication #:
US20040156445
Pub Dt:
08/12/2004
Title:
ULTRA WIDEBAND COMMUNICATION SYSTEM, METHOD, AND DEVICE WITH LOW NOISE PULSE FORMATION
62
Patent #:
7098502
Issue Dt:
08/29/2006
Application #:
10705317
Filing Dt:
11/10/2003
Publication #:
US20050098822
Pub Dt:
05/12/2005
Title:
TRANSISTOR HAVING THREE ELECTRICALLY ISOLATED ELECTRODES AND METHOD OF FORMATION
63
Patent #:
6831310
Issue Dt:
12/14/2004
Application #:
10705504
Filing Dt:
11/10/2003
Title:
INTEGRATED CIRCUIT HAVING MULTIPLE MEMORY TYPES AND METHOD OF FORMATION
64
Patent #:
6958548
Issue Dt:
10/25/2005
Application #:
10716655
Filing Dt:
11/19/2003
Publication #:
US20050104193
Pub Dt:
05/19/2005
Title:
SEMICONDUCTOR DEVICE WITH MAGNETICALLY PERMEABLE HEAT SINK
65
Patent #:
6867078
Issue Dt:
03/15/2005
Application #:
10716955
Filing Dt:
11/19/2003
Title:
METHOD FOR FORMING A MICROWAVE FIELD EFFECT TRANSISTOR WITH HIGH OPERATING VOLTAGE
66
Patent #:
6939767
Issue Dt:
09/06/2005
Application #:
10716956
Filing Dt:
11/19/2003
Publication #:
US20050106812
Pub Dt:
05/19/2005
Title:
MULTI-BIT NON-VOLATILE INTEGRATED CIRCUIT MEMORY AND METHOD THEREFOR
67
Patent #:
7262105
Issue Dt:
08/28/2007
Application #:
10718892
Filing Dt:
11/21/2003
Publication #:
US20050112829
Pub Dt:
05/26/2005
Title:
SEMICONDUCTOR DEVICE WITH SILICIDED SOURCE/DRAINS
68
Patent #:
7240041
Issue Dt:
07/03/2007
Application #:
10721196
Filing Dt:
11/25/2003
Publication #:
US20050108943
Pub Dt:
05/26/2005
Title:
NETWORK MESSAGE PROCESSING USING INVERSE PATTERN MATCHING
69
Patent #:
7613775
Issue Dt:
11/03/2009
Application #:
10721201
Filing Dt:
11/25/2003
Publication #:
US20050111446
Pub Dt:
05/26/2005
Title:
NETWORK MESSAGE FILTERING USING HASHING AND PATTERN MATCHING
70
Patent #:
7500152
Issue Dt:
03/03/2009
Application #:
10728398
Filing Dt:
12/05/2003
Publication #:
US20050138484
Pub Dt:
06/23/2005
Title:
APPARATUS AND METHOD FOR TIME ORDERING EVENTS IN A SYSTEM HAVING MULTIPLE TIME DOMAINS
71
Patent #:
6969656
Issue Dt:
11/29/2005
Application #:
10728621
Filing Dt:
12/05/2003
Publication #:
US20050124120
Pub Dt:
06/09/2005
Title:
METHOD AND CIRCUIT FOR MULTIPLYING SIGNALS WITH A TRANSISTOR HAVING MORE THAN ONE INDEPENDENT GATE STRUCTURE
72
Patent #:
6998952
Issue Dt:
02/14/2006
Application #:
10729531
Filing Dt:
12/05/2003
Publication #:
US20050122198
Pub Dt:
06/09/2005
Title:
INDUCTIVE DEVICE INCLUDING BOND WIRES
73
Patent #:
7403966
Issue Dt:
07/22/2008
Application #:
10730174
Filing Dt:
12/08/2003
Publication #:
US20050125479
Pub Dt:
06/09/2005
Title:
HARDWARE FOR PERFORMING AN ARITHMETIC FUNCTION
74
Patent #:
7585744
Issue Dt:
09/08/2009
Application #:
10730230
Filing Dt:
12/08/2003
Publication #:
US20050124089
Pub Dt:
06/09/2005
Title:
METHOD OF FORMING A SEAL FOR A SEMICONDUCTOR DEVICE
75
Patent #:
7272178
Issue Dt:
09/18/2007
Application #:
10730387
Filing Dt:
12/08/2003
Publication #:
US20050123036
Pub Dt:
06/09/2005
Title:
METHOD AND APPARATUS FOR CONTROLLING THE BANDWIDTH FREQUENCY OF AN ANALOG FILTER
76
Patent #:
7599432
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10/06/2009
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Pub Dt:
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Title:
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Assignor
1
CITIBANK, N.A.
Exec Dt:
12/07/2015
Assignee
1
MORGAN STANLEY SENIOR FUNDING, INC.
1300 THAMES STREET, 4TH FLOOR
BALTIMORE, MARYLAND 21231
Correspondence name and address
JOANNA MCCALL
1025 VERMONT AVE NW, SUITE 1130
COGENCY GLOBAL INC.
WASHINGTON, DC 20005

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