|
Total properties:
15
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10163192
|
Filing Dt:
|
06/04/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
|
Title:
|
Method and apparatus for evaluating an integrated circuit model
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10418624
|
Filing Dt:
|
04/18/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/21/2004
| | | | |
|
Title:
|
Method and apparatus for round robin resource arbitration
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10976456
|
Filing Dt:
|
10/29/2004
|
|
Publication #:
|
|
Pub Dt:
|
04/28/2005
| | | | |
|
Title:
|
Method and apparatus for decomposing and verifying configurable hardware
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11097027
|
Filing Dt:
|
03/31/2005
|
|
Publication #:
|
|
Pub Dt:
|
10/05/2006
| | | | |
|
Title:
|
Various methods and apparatuses for flexible hierarchy grouping
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11246809
|
Filing Dt:
|
10/07/2005
|
|
Publication #:
|
|
Pub Dt:
|
04/12/2007
| | | | |
|
Title:
|
Various methods and apparatuses for an executable parameterized timing model
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11546131
|
Filing Dt:
|
10/10/2006
|
|
Publication #:
|
|
Pub Dt:
|
04/26/2007
| | | | |
|
Title:
|
Communications system and method with multilevel connection identification
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11561815
|
Filing Dt:
|
11/20/2006
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2008
| | | | |
|
Title:
|
Transaction Co-Validation Across Abstraction Layers
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12145257
|
Filing Dt:
|
06/24/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/25/2008
| | | | |
|
Title:
|
VARIOUS METHODS AND APPARATUS FOR CONFIGURABLE MAPPING OF ADDRESS REGIONS ONTO ONE OR MORE AGGREGATE TARGETS
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12714810
|
Filing Dt:
|
03/01/2010
|
|
Publication #:
|
|
Pub Dt:
|
09/01/2011
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR OPTIMIZING CONCURRENCY IN MULTIPLE CORE SYSTEMS
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13276041
|
Filing Dt:
|
10/18/2011
|
|
Publication #:
|
|
Pub Dt:
|
02/09/2012
| | | | |
|
Title:
|
INTERCONNECT THAT ELIMINATES ROUTING CONGESTION AND MANAGES SIMULTANEOUS TRANSACTIONS
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13899258
|
Filing Dt:
|
05/21/2013
|
|
Publication #:
|
|
Pub Dt:
|
11/28/2013
| | | | |
|
Title:
|
SCALABLE CACHE COHERENCE SCHEME FOR A SYSTEM ON A CHIP
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13946308
|
Filing Dt:
|
07/19/2013
|
|
Publication #:
|
|
Pub Dt:
|
01/22/2015
| | | | |
|
Title:
|
INTELLIGENT MESOCHRONOUS SYNCHRONIZER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2019
|
Application #:
|
14976620
|
Filing Dt:
|
12/21/2015
|
|
Publication #:
|
|
Pub Dt:
|
06/30/2016
| | | | |
|
Title:
|
REORDERING RESPONSES IN A HIGH PERFORMANCE ON-CHIP NETWORK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2018
|
Application #:
|
15177564
|
Filing Dt:
|
06/09/2016
|
|
Publication #:
|
|
Pub Dt:
|
12/15/2016
| | | | |
|
Title:
|
POWER MANAGER WITH A POWER SWITCH ARBITER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2022
|
Application #:
|
16190944
|
Filing Dt:
|
11/14/2018
|
|
Publication #:
|
|
Pub Dt:
|
03/14/2019
| | | | |
|
Title:
|
SEQUENCER-BASED PROTOCOL ADAPTER
|
|
