Total properties:
51
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Patent #:
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Issue Dt:
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07/20/2010
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Application #:
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11322160
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Filing Dt:
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12/29/2005
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Publication #:
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Pub Dt:
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07/05/2007
| | | | |
Title:
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ASIC DESIGN USING CLOCK AND POWER GRID STANDARD CELL
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Patent #:
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Issue Dt:
|
06/30/2009
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Application #:
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11363251
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Filing Dt:
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02/28/2006
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Publication #:
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Pub Dt:
|
08/30/2007
| | | | |
Title:
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LOW POWER MEMORY ARCHITECTURE
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Patent #:
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Issue Dt:
|
02/17/2009
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Application #:
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11412783
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Filing Dt:
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04/28/2006
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Publication #:
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Pub Dt:
|
11/01/2007
| | | | |
Title:
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DYNAMIC RANDOM ACCESS MEMORY WITH FULLY INDEPENDENT PARTIAL ARRAY REFRESH FUNCTION
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Patent #:
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Issue Dt:
|
10/23/2007
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Application #:
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11412960
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Filing Dt:
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04/28/2006
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Publication #:
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Pub Dt:
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11/01/2007
| | | | |
Title:
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DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR SELF-REFRESHING MEMORY CELLS WITH TEMPERATURE COMPENSATED SELF-REFRESH
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Patent #:
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Issue Dt:
|
03/24/2009
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Application #:
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11433158
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Filing Dt:
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05/12/2006
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Publication #:
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Pub Dt:
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11/23/2006
| | | | |
Title:
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INTEGRATED CIRCUIT WITH SIGNAL BUS FORMED BY CELL ABUTMENT OF LOGIC CELLS
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Patent #:
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Issue Dt:
|
03/23/2010
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Application #:
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11477659
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Filing Dt:
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06/30/2006
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Publication #:
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Pub Dt:
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01/03/2008
| | | | |
Title:
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SYNCHRONOUS MEMORY READ DATA CAPTURE
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Patent #:
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Issue Dt:
|
01/29/2013
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Application #:
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11521734
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Filing Dt:
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09/15/2006
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Publication #:
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Pub Dt:
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10/04/2007
| | | | |
Title:
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ASYNCHRONOUS ID GENERATION
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Patent #:
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Issue Dt:
|
02/09/2010
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Application #:
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11536709
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Filing Dt:
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09/29/2006
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Publication #:
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Pub Dt:
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12/06/2007
| | | | |
Title:
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APPARATUS AND METHOD FOR INTERFACING TO A MEMORY
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Patent #:
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Issue Dt:
|
03/31/2009
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Application #:
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11565170
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Filing Dt:
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11/30/2006
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Publication #:
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Pub Dt:
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06/05/2008
| | | | |
Title:
|
FLASH MEMORY PROGRAM INHIBIT SCHEME
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|
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Patent #:
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Issue Dt:
|
01/19/2016
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Application #:
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11594564
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Filing Dt:
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11/08/2006
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Publication #:
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Pub Dt:
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05/17/2007
| | | | |
Title:
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DAISY CHAIN CASCADING DEVICES
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Patent #:
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Issue Dt:
|
06/30/2009
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Application #:
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11613325
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Filing Dt:
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12/20/2006
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Publication #:
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Pub Dt:
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06/26/2008
| | | | |
Title:
|
HYBRID SOLID-STATE MEMORY SYSTEM HAVING VOLATILE AND NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
|
06/29/2010
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Application #:
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11643850
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Filing Dt:
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12/22/2006
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Publication #:
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Pub Dt:
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06/21/2007
| | | | |
Title:
|
INDEPENDENT LINK AND BANK SELECTION
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Patent #:
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Issue Dt:
|
09/21/2010
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Application #:
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11693027
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Filing Dt:
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03/29/2007
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Publication #:
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Pub Dt:
|
10/04/2007
| | | | |
Title:
|
FLASH MEMORY SYSTEM CONTROL SCHEME
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Patent #:
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Issue Dt:
|
06/23/2009
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Application #:
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11715838
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Filing Dt:
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03/08/2007
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Publication #:
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Pub Dt:
|
10/04/2007
| | | | |
Title:
|
NON-VOLATILE SEMICONDUCTOR MEMORY WITH PAGE ERASE
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Patent #:
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Issue Dt:
|
03/23/2010
|
Application #:
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11741647
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Filing Dt:
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04/27/2007
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Publication #:
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Pub Dt:
|
11/01/2007
| | | | |
Title:
|
SRAM LEAKAGE REDUCTION CIRCUIT
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Patent #:
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Issue Dt:
|
09/22/2009
|
Application #:
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11762330
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Filing Dt:
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06/13/2007
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Publication #:
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Pub Dt:
|
03/13/2008
| | | | |
Title:
|
FLASH MULTI-LEVEL THRESHOLD DISTRIBUTION SCHEME
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Patent #:
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Issue Dt:
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03/03/2009
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Application #:
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11835663
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Filing Dt:
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08/08/2007
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Publication #:
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Pub Dt:
|
12/13/2007
| | | | |
Title:
|
DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR SELF-REFRESHING MEMORY CELLS WITH TEMPERATURE COMPENSATED SELF-REFRESH
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Patent #:
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Issue Dt:
|
10/19/2010
|
Application #:
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11944535
|
Filing Dt:
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11/23/2007
|
Publication #:
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Pub Dt:
|
05/29/2008
| | | | |
Title:
|
NON-VOLATILE MEMORY SERIAL CORE ARCHITECTURE
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Patent #:
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Issue Dt:
|
03/29/2011
|
Application #:
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12339946
|
Filing Dt:
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12/19/2008
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Publication #:
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|
Pub Dt:
|
04/23/2009
| | | | |
Title:
|
DYNAMIC RANDOM ACCESS MEMORY WITH FULLY INDEPENDENT PARTIAL ARRAY REFRESH FUNCTION
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Patent #:
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Issue Dt:
|
04/06/2010
|
Application #:
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12349756
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Filing Dt:
|
01/07/2009
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Publication #:
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|
Pub Dt:
|
05/14/2009
| | | | |
Title:
|
DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR SELF-REFRESHING MEMORY CELLS WITH TEMPERATURE COMPENSATED SELF-REFRESH
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Patent #:
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Issue Dt:
|
09/27/2011
|
Application #:
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12368512
|
Filing Dt:
|
02/10/2009
|
Publication #:
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|
Pub Dt:
|
06/04/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT WITH SIGNAL BUS FORMED BY CELL ABUTMENT OF LOGIC CELLS
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Patent #:
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Issue Dt:
|
04/27/2010
|
Application #:
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12371088
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Filing Dt:
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02/13/2009
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Publication #:
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|
Pub Dt:
|
06/11/2009
| | | | |
Title:
|
FLASH MEMORY PROGRAM INHIBIT SCHEME
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Patent #:
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Issue Dt:
|
10/26/2010
|
Application #:
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12463759
|
Filing Dt:
|
05/11/2009
|
Publication #:
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|
Pub Dt:
|
09/10/2009
| | | | |
Title:
|
FLASH MULTI-LEVEL THRESHOLD DISTRIBUTION SCHEME
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Patent #:
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Issue Dt:
|
04/03/2012
|
Application #:
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12470877
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Filing Dt:
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05/22/2009
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Publication #:
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Pub Dt:
|
09/17/2009
| | | | |
Title:
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LOW POWER MEMORY ARCHITECTURE
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Patent #:
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Issue Dt:
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04/12/2011
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Application #:
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12472012
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Filing Dt:
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05/26/2009
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Publication #:
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Pub Dt:
|
11/12/2009
| | | | |
Title:
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HYBRID SOLID-STATE MEMORY SYSTEM HAVING VOLATILE AND NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
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01/18/2011
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Application #:
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12474056
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Filing Dt:
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05/28/2009
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Publication #:
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Pub Dt:
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09/17/2009
| | | | |
Title:
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NON-VOLATILE SEMICONDUCTOR MEMORY WITH PAGE ERASE
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Patent #:
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Issue Dt:
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06/26/2012
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Application #:
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12684026
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Filing Dt:
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01/07/2010
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Publication #:
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Pub Dt:
|
05/13/2010
| | | | |
Title:
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A DOUBLE DATA RATE CONVERTER CIRCUIT INCLUDES A DELAY LOCKED LOOP FOR PROVIDING THE PLURALITY OF CLOCK PHASE SIGNALS
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Patent #:
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Issue Dt:
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01/11/2011
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Application #:
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12700370
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Filing Dt:
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02/04/2010
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Publication #:
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Pub Dt:
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06/10/2010
| | | | |
Title:
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PHASE-LOCKED LOOP CIRCUITRY USING CHARGE PUMPS WITH CURRENT MIRROR CIRCUITRY
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Patent #:
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Issue Dt:
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10/30/2012
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Application #:
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12705040
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Filing Dt:
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02/12/2010
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Publication #:
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Pub Dt:
|
06/10/2010
| | | | |
Title:
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DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR SELF-REFRESHING MEMORY CELLS WITH TEMPERATURE COMPENSATED SELF-REFRESH
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Patent #:
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Issue Dt:
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12/13/2011
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Application #:
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12705345
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Filing Dt:
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02/12/2010
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Publication #:
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Pub Dt:
|
09/16/2010
| | | | |
Title:
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SRAM LEAKAGE REDUCTION CIRCUIT
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Patent #:
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Issue Dt:
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09/20/2011
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Application #:
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12719413
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Filing Dt:
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03/08/2010
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Publication #:
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Pub Dt:
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06/24/2010
| | | | |
Title:
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FLASH MEMORY PROGRAM INHIBIT SCHEME
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Patent #:
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Issue Dt:
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10/16/2012
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Application #:
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12879566
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Filing Dt:
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09/10/2010
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Publication #:
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Pub Dt:
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01/20/2011
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Title:
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NON-VOLATILE MEMORY BANK AND PAGE BUFFER THEREFOR
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Patent #:
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Issue Dt:
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01/24/2012
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12884939
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Filing Dt:
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09/17/2010
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Publication #:
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Pub Dt:
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01/13/2011
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Title:
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FLASH MULTI-LEVEL THRESHOLD DISTRIBUTION SCHEME
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Patent #:
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03/11/2014
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13040254
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03/03/2011
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06/23/2011
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Title:
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HYBRID SOLID-STATE MEMORY SYSTEM HAVING VOLATILE AND NON-VOLATILE MEMORY
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Patent #:
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10/23/2012
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13072097
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03/25/2011
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Pub Dt:
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07/14/2011
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Title:
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DYNAMIC RANDOM ACCESS MEMORY WITH FULLY INDEPENDENT PARTIAL ARRAY REFRESH FUNCTION
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07/03/2012
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13169231
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06/27/2011
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11/03/2011
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Title:
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NON-VOLATILE SEMICONDUCTOR MEMORY WITH PAGE ERASE
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10/30/2012
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13208732
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08/12/2011
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Pub Dt:
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12/08/2011
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Title:
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FLASH MEMORY PROGRAM INHIBIT SCHEME
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Patent #:
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04/09/2013
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13291360
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Filing Dt:
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11/08/2011
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Pub Dt:
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03/08/2012
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Title:
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SRAM LEAKAGE REDUCTION CIRCUIT
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Patent #:
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06/11/2013
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13328762
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12/16/2011
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Pub Dt:
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04/12/2012
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Title:
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FLASH MULTI-LEVEL THRESHOLD DISTRIBUTION SCHEME
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Patent #:
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10/15/2013
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13523628
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06/14/2012
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10/04/2012
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Title:
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NON-VOLATILE SEMICONDUCTOR MEMORY WITH PAGE ERASE
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Patent #:
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11/04/2014
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13618022
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09/14/2012
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02/21/2013
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Title:
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NON-VOLATILE MEMORY BANK AND PAGE BUFFER THEREFOR
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10/08/2013
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13618250
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09/14/2012
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Publication #:
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Pub Dt:
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01/10/2013
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Title:
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DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR SELF-REFRESHING MEMORY CELLS WITH TEMPERATURE COMPENSATED SELF-REFRESH
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Patent #:
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Issue Dt:
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06/03/2014
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13650580
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Filing Dt:
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10/12/2012
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Publication #:
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Pub Dt:
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03/21/2013
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Title:
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DYNAMIC RANDOM ACCESS MEMORY WITH FULLY INDEPENDENT PARTIAL ARRAY REFRESH FUNCTION
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Patent #:
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Issue Dt:
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04/29/2014
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13892743
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05/13/2013
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Pub Dt:
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09/19/2013
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Title:
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FLASH MULTI-LEVEL THRESHOLD DISTRIBUTION SCHEME
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Patent #:
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Issue Dt:
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05/01/2018
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14141686
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Filing Dt:
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12/27/2013
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Title:
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SYNCHRONOUS MEMORY READ DATA CAPTURE
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Patent #:
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Issue Dt:
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02/16/2016
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14208812
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Filing Dt:
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03/13/2014
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Publication #:
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Pub Dt:
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07/10/2014
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Title:
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FLASH MULTI-LEVEL THRESHOLD DISTRIBUTION SCHEME
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Patent #:
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Issue Dt:
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01/26/2021
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14209455
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03/13/2014
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Title:
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SYSTEMS AND METHODS FOR MINIMIZING STATIC LEAKAGE OF AN INTEGRATED CIRCUIT
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03/08/2016
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14265852
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04/30/2014
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08/21/2014
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Title:
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DYNAMIC RANDOM ACCESS MEMORY WITH FULLY INDEPENDENT PARTIAL ARRAY REFRESH FUNCTION
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02/14/2017
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14531432
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11/03/2014
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02/19/2015
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Title:
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NON-VOLATILE MEMORY SERIAL CORE ARCHITECTURE
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09/19/2017
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15054873
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02/26/2016
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Pub Dt:
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11/03/2016
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Title:
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DYNAMIC RANDOM ACCESS MEMORY WITH FULLY INDEPENDENT PARTIAL ARRAY REFRESH FUNCTION
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06/26/2018
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15400432
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01/06/2017
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06/29/2017
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Title:
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NON-VOLATILE MEMORY SERIAL CORE ARCHITECTURE
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