|
|
Patent #:
|
|
Issue Dt:
|
07/24/2007
|
Application #:
|
11195641
|
Filing Dt:
|
08/03/2005
|
Publication #:
|
|
Pub Dt:
|
02/08/2007
| | | | |
Title:
|
VOLTAGE DOWN CONVERTER FOR HIGH SPEED MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2006
|
Application #:
|
11203046
|
Filing Dt:
|
08/12/2005
|
Publication #:
|
|
Pub Dt:
|
01/05/2006
| | | | |
Title:
|
SEMICONDUCTOR CONSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2008
|
Application #:
|
11204660
|
Filing Dt:
|
08/15/2005
|
Publication #:
|
|
Pub Dt:
|
06/22/2006
| | | | |
Title:
|
METHOD FOR FORMING STORAGE NODE OF CAPACITOR IN SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/31/2006
|
Application #:
|
11205082
|
Filing Dt:
|
08/17/2005
|
Publication #:
|
|
Pub Dt:
|
01/26/2006
| | | | |
Title:
|
TIMING VERNIER USING A DELAY LOCKED LOOP
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2006
|
Application #:
|
11206529
|
Filing Dt:
|
08/18/2005
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
CONTIGUOUS BLOCK ADDRESSING SCHEME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2006
|
Application #:
|
11207017
|
Filing Dt:
|
08/18/2005
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
CONTIGUOUS BLOCK ADDRESSING SCHEME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2006
|
Application #:
|
11207105
|
Filing Dt:
|
08/18/2005
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
CONTIGUOUS BLOCK ADDRESSING SCHEME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2007
|
Application #:
|
11234302
|
Filing Dt:
|
09/26/2005
|
Publication #:
|
|
Pub Dt:
|
01/26/2006
| | | | |
Title:
|
LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2007
|
Application #:
|
11234314
|
Filing Dt:
|
09/26/2005
|
Publication #:
|
|
Pub Dt:
|
01/26/2006
| | | | |
Title:
|
LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/2009
|
Application #:
|
11238973
|
Filing Dt:
|
09/30/2005
|
Publication #:
|
|
Pub Dt:
|
04/05/2007
| | | | |
Title:
|
POWER UP CIRCUIT WITH LOW POWER SLEEP MODE OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2007
|
Application #:
|
11238975
|
Filing Dt:
|
09/30/2005
|
Publication #:
|
|
Pub Dt:
|
04/05/2007
| | | | |
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT HAVING CURRENT LEAKAGE REDUCTION SCHEME
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
11239759
|
Filing Dt:
|
09/30/2005
|
Title:
|
METHOD AND APPARATUS FOR INTRODUCING A DELAY DURING A CALL SETUP IN A COMMUNICATION NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/2009
|
Application #:
|
11257525
|
Filing Dt:
|
10/25/2005
|
Publication #:
|
|
Pub Dt:
|
03/23/2006
| | | | |
Title:
|
METHOD AND SYSTEM FOR PACKET ENCRYPTION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2008
|
Application #:
|
11261493
|
Filing Dt:
|
10/31/2005
|
Publication #:
|
|
Pub Dt:
|
05/03/2007
| | | | |
Title:
|
DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR SELF-REFRESHING MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2006
|
Application #:
|
11263144
|
Filing Dt:
|
10/31/2005
|
Publication #:
|
|
Pub Dt:
|
03/30/2006
| | | | |
Title:
|
SORTING METHOD AND APPARATUS USING A CAM
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2010
|
Application #:
|
11264011
|
Filing Dt:
|
11/02/2005
|
Publication #:
|
|
Pub Dt:
|
03/16/2006
| | | | |
Title:
|
LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2010
|
Application #:
|
11264283
|
Filing Dt:
|
10/31/2005
|
Publication #:
|
|
Pub Dt:
|
06/15/2006
| | | | |
Title:
|
PHASE-LOCKED LOOP CIRCUITRY USING CHARGE PUMPS WITH CURRENT MIRROR CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2006
|
Application #:
|
11268760
|
Filing Dt:
|
11/08/2005
|
Publication #:
|
|
Pub Dt:
|
05/25/2006
| | | | |
Title:
|
SYNCHRONOUS DRAM WITH SELECTABLE INTERNAL PREFETCH SIZE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2007
|
Application #:
|
11269659
|
Filing Dt:
|
11/09/2005
|
Publication #:
|
|
Pub Dt:
|
04/20/2006
| | | | |
Title:
|
MATCHLINE SENSE CIRCUIT AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/21/2011
|
Application #:
|
11272775
|
Filing Dt:
|
11/15/2005
|
Publication #:
|
|
Pub Dt:
|
03/23/2006
| | | | |
Title:
|
LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2012
|
Application #:
|
11274276
|
Filing Dt:
|
11/16/2005
|
Publication #:
|
|
Pub Dt:
|
04/13/2006
| | | | |
Title:
|
LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2010
|
Application #:
|
11287335
|
Filing Dt:
|
11/28/2005
|
Publication #:
|
|
Pub Dt:
|
04/06/2006
| | | | |
Title:
|
METHOD AND SYSTEM FOR PROVIDING DC POWER ON LOCAL TELEPHONE LINES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2008
|
Application #:
|
11289428
|
Filing Dt:
|
11/30/2005
|
Publication #:
|
|
Pub Dt:
|
05/31/2007
| | | | |
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT HAVING LOW POWER CONSUMPTION WITH SELF-REFRESH
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2006
|
Application #:
|
11293124
|
Filing Dt:
|
12/05/2005
|
Publication #:
|
|
Pub Dt:
|
04/20/2006
| | | | |
Title:
|
METHOD OF INHIBITING DEGRADATION OF GATE OXIDE FILM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
11295492
|
Filing Dt:
|
12/07/2005
|
Publication #:
|
|
Pub Dt:
|
04/20/2006
| | | | |
Title:
|
METHOD AND APPARATUS FOR SYNCHRONIZATION OF ROW AND COLUMN ACCESS OPERATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
11298978
|
Filing Dt:
|
12/09/2005
|
Publication #:
|
|
Pub Dt:
|
06/22/2006
| | | | |
Title:
|
CHEMICAL VAPOR DEPOSITION OF TITANIUM FROM TITANIUM TETRACHLORIDE AND HYDROCARBON REACTANTS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2014
|
Application #:
|
11300313
|
Filing Dt:
|
12/15/2005
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/2009
|
Application #:
|
11305433
|
Filing Dt:
|
12/14/2005
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
SYNCHRONIZATION CIRCUIT AND METHOD WITH TRANSPARENT LATCHES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2008
|
Application #:
|
11312472
|
Filing Dt:
|
12/21/2005
|
Publication #:
|
|
Pub Dt:
|
05/11/2006
| | | | |
Title:
|
OUTLET WITH ANALOG SIGNAL ADAPTER, A METHOD FOR USE THEREOF AND A NETWORK USING SAID OUTLET
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2008
|
Application #:
|
11319451
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
07/26/2007
| | | | |
Title:
|
APPARATUS AND METHOD FOR SELF-REFRESHING DYNAMIC RANDOM ACCESS MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2008
|
Application #:
|
11319718
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
07/06/2006
| | | | |
Title:
|
SELF REFRESH OSCILLATOR AND OSCILLATION SIGNAL GENERATION METHOD OF THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2007
|
Application #:
|
11320746
|
Filing Dt:
|
12/30/2005
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
MISMATCH-DEPENDENT POWER ALLOCATION TECHNIQUE FOR MATCH-LINE SENSING IN CONTENT-ADDRESSABLE MEMORIES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
11321628
|
Filing Dt:
|
12/30/2005
|
Publication #:
|
|
Pub Dt:
|
02/01/2007
| | | | |
Title:
|
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2008
|
Application #:
|
11321877
|
Filing Dt:
|
12/30/2005
|
Publication #:
|
|
Pub Dt:
|
11/02/2006
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2008
|
Application #:
|
11321925
|
Filing Dt:
|
12/28/2005
|
Publication #:
|
|
Pub Dt:
|
12/28/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2010
|
Application #:
|
11322160
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
07/05/2007
| | | | |
Title:
|
ASIC DESIGN USING CLOCK AND POWER GRID STANDARD CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2008
|
Application #:
|
11323814
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
11/16/2006
| | | | |
Title:
|
METHOD AND APPARATUS FOR REDUCING POOL STARVATION IN A SHARED MEMORY SWITCH
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/2010
|
Application #:
|
11324023
|
Filing Dt:
|
12/30/2005
|
Publication #:
|
|
Pub Dt:
|
04/05/2007
| | | | |
Title:
|
MULTIPLE INDEPENDENT SERIAL LINK MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/2008
|
Application #:
|
11333629
|
Filing Dt:
|
12/29/2005
|
Publication #:
|
|
Pub Dt:
|
06/15/2006
| | | | |
Title:
|
CHEMICAL TREATMENT OF SEMICONDUCTOR SUBSTRATES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2008
|
Application #:
|
11336097
|
Filing Dt:
|
01/20/2006
|
Publication #:
|
|
Pub Dt:
|
06/08/2006
| | | | |
Title:
|
POWER MANAGERS FOR AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/21/2009
|
Application #:
|
11338855
|
Filing Dt:
|
01/25/2006
|
Publication #:
|
|
Pub Dt:
|
06/22/2006
| | | | |
Title:
|
TELEPHONE OUTLET FOR IMPLEMENTING A LOCAL AREA NETWORK OVER TELEPHONE LINES AND A LOCAL AREA NETWORK USING SUCH OUTLETS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2007
|
Application #:
|
11339624
|
Filing Dt:
|
01/26/2006
|
Publication #:
|
|
Pub Dt:
|
07/06/2006
| | | | |
Title:
|
INTERNAL POWER MANAGEMENT SCHEME FOR A MEMORY CHIP IN DEEP POWER DOWN MODE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2008
|
Application #:
|
11346396
|
Filing Dt:
|
02/03/2006
|
Publication #:
|
|
Pub Dt:
|
06/15/2006
| | | | |
Title:
|
SYSTEM FOR TRANSMISSION LINE TERMINATION BY SIGNAL CANCELLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2007
|
Application #:
|
11347289
|
Filing Dt:
|
02/06/2006
|
Publication #:
|
|
Pub Dt:
|
08/09/2007
| | | | |
Title:
|
VOLTAGE LEVEL SHIFTER CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2008
|
Application #:
|
11358767
|
Filing Dt:
|
02/21/2006
|
Publication #:
|
|
Pub Dt:
|
08/23/2007
| | | | |
Title:
|
NON-VOLATILE MEMORY DEVICE WITH PAGE BUFFER HAVING DUAL REGISTERS AND METHODS USING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/2009
|
Application #:
|
11363251
|
Filing Dt:
|
02/28/2006
|
Publication #:
|
|
Pub Dt:
|
08/30/2007
| | | | |
Title:
|
LOW POWER MEMORY ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/30/2007
|
Application #:
|
11367467
|
Filing Dt:
|
03/03/2006
|
Publication #:
|
|
Pub Dt:
|
07/20/2006
| | | | |
Title:
|
DATA PATH HAVING GROUNDED PRECHARGE OPERATION AND TEST COMPRESSION CAPABILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2008
|
Application #:
|
11367589
|
Filing Dt:
|
03/06/2006
|
Publication #:
|
|
Pub Dt:
|
07/06/2006
| | | | |
Title:
|
HIGH SPEED DRAM ARCHITECTURE WITH UNIFORM ACCESS LATENCY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2006
|
Application #:
|
11367922
|
Filing Dt:
|
03/03/2006
|
Publication #:
|
|
Pub Dt:
|
07/06/2006
| | | | |
Title:
|
FLASH MEMORY DEVICE WITH IMPROVED PROGRAMMING PERFORMANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2007
|
Application #:
|
11375696
|
Filing Dt:
|
03/13/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/2009
|
Application #:
|
11381284
|
Filing Dt:
|
05/02/2006
|
Publication #:
|
|
Pub Dt:
|
11/08/2007
| | | | |
Title:
|
INSTRUCTION FOR CONDITIONALLY YIELDING TO A READY THREAD BASED ON PRIORITY CRITERIA
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2007
|
Application #:
|
11391489
|
Filing Dt:
|
03/29/2006
|
Publication #:
|
|
Pub Dt:
|
08/17/2006
| | | | |
Title:
|
TELEPHONE COMMUNICATION SYSTEM OVER A SINGLE TELEPHONE LINE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2008
|
Application #:
|
11396193
|
Filing Dt:
|
03/30/2006
|
Publication #:
|
|
Pub Dt:
|
10/19/2006
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/12/2007
|
Application #:
|
11397176
|
Filing Dt:
|
04/04/2006
|
Publication #:
|
|
Pub Dt:
|
08/17/2006
| | | | |
Title:
|
METHOD AND APPARATUS FOR CONTROLLING RADIATION BEAM INTENSITY DIRECTED TO MICROLITHOGRAHIC SUBSTRATES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2007
|
Application #:
|
11399512
|
Filing Dt:
|
04/07/2006
|
Publication #:
|
|
Pub Dt:
|
08/17/2006
| | | | |
Title:
|
TELEPHONE COMMUNICATION SYSTEM OVER A SINGLE TELEPHONE LINE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2009
|
Application #:
|
11400495
|
Filing Dt:
|
04/06/2006
|
Publication #:
|
|
Pub Dt:
|
10/25/2007
| | | | |
Title:
|
PHASE-LOCKED LOOP FILTER CAPACITANCE WITH A DRAG CURRENT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2009
|
Application #:
|
11412783
|
Filing Dt:
|
04/28/2006
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
Title:
|
DYNAMIC RANDOM ACCESS MEMORY WITH FULLY INDEPENDENT PARTIAL ARRAY REFRESH FUNCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2007
|
Application #:
|
11412960
|
Filing Dt:
|
04/28/2006
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
Title:
|
DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR SELF-REFRESHING MEMORY CELLS WITH TEMPERATURE COMPENSATED SELF-REFRESH
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2008
|
Application #:
|
11414353
|
Filing Dt:
|
05/01/2006
|
Publication #:
|
|
Pub Dt:
|
07/26/2007
| | | | |
Title:
|
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2009
|
Application #:
|
11419374
|
Filing Dt:
|
05/19/2006
|
Publication #:
|
|
Pub Dt:
|
01/11/2007
| | | | |
Title:
|
METHOD AND APPARATUS FOR INTERCONNECTING CONTENT ADDRESSABLE MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2009
|
Application #:
|
11433158
|
Filing Dt:
|
05/12/2006
|
Publication #:
|
|
Pub Dt:
|
11/23/2006
| | | | |
Title:
|
INTEGRATED CIRCUIT WITH SIGNAL BUS FORMED BY CELL ABUTMENT OF LOGIC CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2010
|
Application #:
|
11434927
|
Filing Dt:
|
05/17/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
TELEPHONE OUTLET FOR IMPLEMENTING A LOCAL AREA NETWORK OVER TELEPHONE LINES AND A LOCAL AREA NETWORK USING SUCH OUTLETS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2012
|
Application #:
|
11438259
|
Filing Dt:
|
05/23/2006
|
Publication #:
|
|
Pub Dt:
|
09/21/2006
| | | | |
Title:
|
LOCAL AREA NETWORK FOR DISTRIBUTING DATA COMMUNICATION, SENSING AND CONTROL SIGNALS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2009
|
Application #:
|
11440509
|
Filing Dt:
|
05/25/2006
|
Publication #:
|
|
Pub Dt:
|
11/29/2007
| | | | |
Title:
|
NON-LINEAR DROOP CONTROL SYSTEM AND METHOD FOR ISOCHRONOUS FREQUENCY OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
11444064
|
Filing Dt:
|
05/30/2006
|
Publication #:
|
|
Pub Dt:
|
12/07/2006
| | | | |
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/2010
|
Application #:
|
11449499
|
Filing Dt:
|
06/07/2006
|
Publication #:
|
|
Pub Dt:
|
10/12/2006
| | | | |
Title:
|
CIRCUIT, SYSTEM AND METHOD FOR SELECTIVELY TURNING OFF INTERNAL CLOCK DRIVERS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/20/2009
|
Application #:
|
11450096
|
Filing Dt:
|
06/09/2006
|
Publication #:
|
|
Pub Dt:
|
03/15/2007
| | | | |
Title:
|
TRANSISTOR OF SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2007
|
Application #:
|
11453831
|
Filing Dt:
|
06/16/2006
|
Publication #:
|
|
Pub Dt:
|
10/19/2006
| | | | |
Title:
|
ADAPTER FOR MOUNTING A FACEPLATE OF A FIRST STYLE TO AN ELECTRICAL OUTLET CAVITY OF A SECOND STYLE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2012
|
Application #:
|
11471665
|
Filing Dt:
|
06/21/2006
|
Publication #:
|
|
Pub Dt:
|
10/19/2006
| | | | |
Title:
|
METHOD AND SYSTEM FOR PROVIDING DC POWER ON LOCAL TELEPHONE LINES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2009
|
Application #:
|
11476261
|
Filing Dt:
|
06/27/2006
|
Publication #:
|
|
Pub Dt:
|
06/28/2007
| | | | |
Title:
|
FIVE CHANNEL FIN TRANSISTOR AND METHOD FOR FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2010
|
Application #:
|
11477659
|
Filing Dt:
|
06/30/2006
|
Publication #:
|
|
Pub Dt:
|
01/03/2008
| | | | |
Title:
|
SYNCHRONOUS MEMORY READ DATA CAPTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2008
|
Application #:
|
11478084
|
Filing Dt:
|
06/30/2006
|
Publication #:
|
|
Pub Dt:
|
11/16/2006
| | | | |
Title:
|
ON-DIE TERMINATION APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/2008
|
Application #:
|
11478527
|
Filing Dt:
|
06/30/2006
|
Publication #:
|
|
Pub Dt:
|
03/29/2007
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE SHARING A DATA LINE SENSE AMPLIFIER AND A WRITE DRIVER IN ORDER TO REDUCE A CHIP SIZE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2008
|
Application #:
|
11480877
|
Filing Dt:
|
07/06/2006
|
Publication #:
|
|
Pub Dt:
|
06/07/2007
| | | | |
Title:
|
DATA INPUT CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE AND DATA INPUT METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2008
|
Application #:
|
11481022
|
Filing Dt:
|
07/06/2006
|
Publication #:
|
|
Pub Dt:
|
01/10/2008
| | | | |
Title:
|
METHODS FOR PROGRAMMING AND READING NAND FLASH MEMORY DEVICE AND PAGE BUFFER PERFORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/2010
|
Application #:
|
11485359
|
Filing Dt:
|
07/13/2006
|
Publication #:
|
|
Pub Dt:
|
11/09/2006
| | | | |
Title:
|
LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2012
|
Application #:
|
11493935
|
Filing Dt:
|
07/25/2006
|
Publication #:
|
|
Pub Dt:
|
02/08/2007
| | | | |
Title:
|
MULTI-HAZARD ALARM SYSTEM USING SELECTABLE POWER-LEVEL TRANSMISSION AND LOCALIZATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2008
|
Application #:
|
11495212
|
Filing Dt:
|
07/28/2006
|
Publication #:
|
|
Pub Dt:
|
11/23/2006
| | | | |
Title:
|
FREQUENCY-DOUBLING DELAY LOCKED LOOP
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/2010
|
Application #:
|
11495609
|
Filing Dt:
|
07/31/2006
|
Publication #:
|
|
Pub Dt:
|
01/31/2008
| | | | |
Title:
|
PULSE COUNTER WITH CLOCK EDGE RECOVERY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2012
|
Application #:
|
11496037
|
Filing Dt:
|
07/29/2006
|
Publication #:
|
|
Pub Dt:
|
03/15/2007
| | | | |
Title:
|
METHOD AND APPARATUS FOR TRAVERSING A MULTIPLEXED DATA PACKET STREAM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2011
|
Application #:
|
11496093
|
Filing Dt:
|
07/31/2006
|
Publication #:
|
|
Pub Dt:
|
11/23/2006
| | | | |
Title:
|
SEQUENTIAL PULSE DEPOSITION
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11496278
|
Filing Dt:
|
07/31/2006
|
Publication #:
|
|
Pub Dt:
|
04/05/2007
| | | | |
Title:
|
DAISY CHAIN CASCADING DEVICES WITH INPUT/OUTPUT CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2008
|
Application #:
|
11496401
|
Filing Dt:
|
08/01/2006
|
Publication #:
|
|
Pub Dt:
|
02/15/2007
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2007
|
Application #:
|
11502011
|
Filing Dt:
|
08/10/2006
|
Publication #:
|
|
Pub Dt:
|
11/30/2006
| | | | |
Title:
|
CLEANING SOLUTION AND CLEANING METHOD OF A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2008
|
Application #:
|
11502920
|
Filing Dt:
|
08/11/2006
|
Publication #:
|
|
Pub Dt:
|
11/08/2007
| | | | |
Title:
|
PMOS TRANSISTOR OF SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE COMPRISING THE SAME, AND METHOD FOR MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/2010
|
Application #:
|
11507027
|
Filing Dt:
|
08/21/2006
|
Publication #:
|
|
Pub Dt:
|
06/21/2007
| | | | |
Title:
|
FLOW-FILL SPACER STRUCTURES FOR FLAT PANEL DISPLAY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/20/2009
|
Application #:
|
11511652
|
Filing Dt:
|
08/29/2006
|
Publication #:
|
|
Pub Dt:
|
12/28/2006
| | | | |
Title:
|
BARRIER-METAL-FREE COPPER DAMASCENE TECHNOLOGY USING ATOMIC HYDROGEN ENHANCED REFLOW
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2010
|
Application #:
|
11512155
|
Filing Dt:
|
08/30/2006
|
Publication #:
|
|
Pub Dt:
|
12/28/2006
| | | | |
Title:
|
DUTY CYCLE CORRECTION CIRCUIT OF DELAY LOCKED LOOP AND DELAY LOCKED LOOP HAVING THE DUTY CYCLE CORRECTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2011
|
Application #:
|
11514089
|
Filing Dt:
|
09/01/2006
|
Publication #:
|
|
Pub Dt:
|
12/28/2006
| | | | |
Title:
|
LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/2010
|
Application #:
|
11514140
|
Filing Dt:
|
09/01/2006
|
Publication #:
|
|
Pub Dt:
|
01/25/2007
| | | | |
Title:
|
MODULAR OUTLET
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/2010
|
Application #:
|
11515175
|
Filing Dt:
|
09/01/2006
|
Publication #:
|
|
Pub Dt:
|
03/06/2008
| | | | |
Title:
|
METHOD, APPARATUS, SIGNALS, AND MEDIUM FOR MANAGING POWER IN A HYBRID VEHICLE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/18/2007
|
Application #:
|
11518080
|
Filing Dt:
|
09/08/2006
|
Publication #:
|
|
Pub Dt:
|
01/04/2007
| | | | |
Title:
|
ETCHING METHOD IN A SEMICONDUCTOR PROCESSING AND ETCHING SYSTEM FOR PERFORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2013
|
Application #:
|
11521734
|
Filing Dt:
|
09/15/2006
|
Publication #:
|
|
Pub Dt:
|
10/04/2007
| | | | |
Title:
|
ASYNCHRONOUS ID GENERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2007
|
Application #:
|
11522600
|
Filing Dt:
|
09/18/2006
|
Publication #:
|
|
Pub Dt:
|
01/18/2007
| | | | |
Title:
|
FLASH MEMORY DEVICE WITH IMPROVED PROGRAMMING PERFORMANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2014
|
Application #:
|
11529293
|
Filing Dt:
|
09/29/2006
|
Publication #:
|
|
Pub Dt:
|
04/03/2008
| | | | |
Title:
|
PACKET BASED ID GENERATION FOR SERIALLY INTERCONNECTED DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2007
|
Application #:
|
11534873
|
Filing Dt:
|
09/25/2006
|
Publication #:
|
|
Pub Dt:
|
01/18/2007
| | | | |
Title:
|
COMPARE CIRCUIT FOR A CONTENT ADDRESSABLE MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/2010
|
Application #:
|
11536709
|
Filing Dt:
|
09/29/2006
|
Publication #:
|
|
Pub Dt:
|
12/06/2007
| | | | |
Title:
|
APPARATUS AND METHOD FOR INTERFACING TO A MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2008
|
Application #:
|
11550245
|
Filing Dt:
|
10/17/2006
|
Publication #:
|
|
Pub Dt:
|
03/22/2007
| | | | |
Title:
|
TIMING VERNIER USING A DELAY LOCKED LOOP
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/2009
|
Application #:
|
11565170
|
Filing Dt:
|
11/30/2006
|
Publication #:
|
|
Pub Dt:
|
06/05/2008
| | | | |
Title:
|
FLASH MEMORY PROGRAM INHIBIT SCHEME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2009
|
Application #:
|
11565327
|
Filing Dt:
|
11/30/2006
|
Publication #:
|
|
Pub Dt:
|
06/05/2008
| | | | |
Title:
|
CIRCUIT AND METHOD FOR TESTING MULTI-DEVICE SYSTEMS
|
|