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12639531
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Filing Dt:
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12/16/2009
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Publication #:
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Pub Dt:
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05/06/2010
| | | | |
Title:
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INITIALIZATION CIRCUIT FOR DELAY LOCKED LOOP
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Patent #:
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Issue Dt:
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06/05/2012
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Application #:
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12640388
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Filing Dt:
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12/17/2009
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Publication #:
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Pub Dt:
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06/24/2010
| | | | |
Title:
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SEMICONDUCTOR DEVICE WITH MAIN MEMORY UNIT AND AUXILIARY MEMORY UNIT REQUIRING PRESET OPERATION
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Patent #:
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Issue Dt:
|
02/15/2011
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Application #:
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12651707
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Filing Dt:
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01/04/2010
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Publication #:
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Pub Dt:
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04/22/2010
| | | | |
Title:
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MEMORY SYSTEM HAVING INCORRUPTED STROBE SIGNALS
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Patent #:
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Issue Dt:
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04/02/2013
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Application #:
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12652897
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Filing Dt:
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01/06/2010
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Publication #:
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Pub Dt:
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07/08/2010
| | | | |
Title:
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CIRCUIT, SYSTEM AND METHOD FOR SELECTIVELY TURNING OFF INTERNAL CLOCK DRIVERS
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Patent #:
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Issue Dt:
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06/24/2014
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Application #:
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12683731
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Filing Dt:
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01/07/2010
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Publication #:
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Pub Dt:
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04/29/2010
| | | | |
Title:
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TELEPHONE OUTLET WITH PACKET TELEPHONY ADAPTER, AND A NETWORK USING SAME
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Patent #:
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Issue Dt:
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06/26/2012
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Application #:
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12684026
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Filing Dt:
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01/07/2010
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Publication #:
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Pub Dt:
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05/13/2010
| | | | |
Title:
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A DOUBLE DATA RATE CONVERTER CIRCUIT INCLUDES A DELAY LOCKED LOOP FOR PROVIDING THE PLURALITY OF CLOCK PHASE SIGNALS
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Patent #:
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Issue Dt:
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11/22/2011
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Application #:
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12685365
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Filing Dt:
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01/11/2010
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Publication #:
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Pub Dt:
|
08/12/2010
| | | | |
Title:
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TERMINATION CIRCUIT FOR ON-DIE TERMINATION
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Patent #:
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Issue Dt:
|
06/25/2013
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Application #:
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12685694
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Filing Dt:
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01/12/2010
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Publication #:
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Pub Dt:
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07/29/2010
| | | | |
Title:
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TELEPHONE OUTLET WITH PACKET TELEPHONY ADAPTOR, AND A NETWORK USING SAME
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Patent #:
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Issue Dt:
|
01/04/2011
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Application #:
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12687541
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Filing Dt:
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01/14/2010
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Publication #:
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Pub Dt:
|
05/13/2010
| | | | |
Title:
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TIMING VERNIER USING A DELAY LOCKED LOOP
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Patent #:
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Issue Dt:
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12/04/2012
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Application #:
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12691794
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Filing Dt:
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01/22/2010
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Publication #:
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Pub Dt:
|
05/13/2010
| | | | |
Title:
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VOLTAGE LEVEL SHIFTER AND BUFFER USING SAME
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Patent #:
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Issue Dt:
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03/22/2011
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Application #:
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12698585
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Filing Dt:
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02/02/2010
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Publication #:
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Pub Dt:
|
06/03/2010
| | | | |
Title:
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CIRCUIT AND METHOD FOR TESTING MULTI-DEVICE SYSTEMS
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Patent #:
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Issue Dt:
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03/27/2012
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Application #:
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12699627
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Filing Dt:
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02/03/2010
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Publication #:
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Pub Dt:
|
08/12/2010
| | | | |
Title:
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MEMORY WITH DATA CONTROL
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Patent #:
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Issue Dt:
|
01/11/2011
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Application #:
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12700370
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Filing Dt:
|
02/04/2010
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Publication #:
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Pub Dt:
|
06/10/2010
| | | | |
Title:
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PHASE-LOCKED LOOP CIRCUITRY USING CHARGE PUMPS WITH CURRENT MIRROR CIRCUITRY
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Patent #:
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Issue Dt:
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03/04/2014
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Application #:
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12701122
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Filing Dt:
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02/05/2010
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Publication #:
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Pub Dt:
|
02/17/2011
| | | | |
Title:
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PACKAGE-LEVEL INTEGRATED CIRCUIT CONNECTION WITHOUT TOP METAL PADS OR BONDING WIRE
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Patent #:
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Issue Dt:
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10/30/2012
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Application #:
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12705040
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Filing Dt:
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02/12/2010
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Publication #:
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Pub Dt:
|
06/10/2010
| | | | |
Title:
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DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR SELF-REFRESHING MEMORY CELLS WITH TEMPERATURE COMPENSATED SELF-REFRESH
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Patent #:
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Issue Dt:
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12/13/2011
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Application #:
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12705345
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Filing Dt:
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02/12/2010
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Publication #:
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Pub Dt:
|
09/16/2010
| | | | |
Title:
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SRAM LEAKAGE REDUCTION CIRCUIT
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Patent #:
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Issue Dt:
|
07/24/2012
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Application #:
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12709198
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Filing Dt:
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02/19/2010
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Title:
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BLOCK PROGRAMMABLE PRIORITY ENCODER IN A CAM
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Patent #:
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Issue Dt:
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02/22/2011
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Application #:
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12714670
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Filing Dt:
|
03/01/2010
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Publication #:
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Pub Dt:
|
08/26/2010
| | | | |
Title:
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CHARGE PUMP FOR PLL/DLL
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Patent #:
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Issue Dt:
|
10/25/2011
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Application #:
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12715641
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Filing Dt:
|
03/02/2010
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Publication #:
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Pub Dt:
|
06/24/2010
| | | | |
Title:
|
APPARATUS AND METHOD FOR SELF-REFRESHING DYNAMIC RANDOM ACCESS MEMORY CELLS
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Patent #:
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Issue Dt:
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02/28/2012
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Application #:
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12718300
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Filing Dt:
|
03/05/2010
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Publication #:
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Pub Dt:
|
09/02/2010
| | | | |
Title:
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METHOD AND APPARATUS FOR PROVIDING A PACKET BUFFER RANDOM ACCESS MEMORY
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Patent #:
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Issue Dt:
|
09/20/2011
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Application #:
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12719413
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Filing Dt:
|
03/08/2010
|
Publication #:
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Pub Dt:
|
06/24/2010
| | | | |
Title:
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FLASH MEMORY PROGRAM INHIBIT SCHEME
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Patent #:
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Issue Dt:
|
11/15/2011
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Application #:
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12724952
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Filing Dt:
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03/16/2010
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Publication #:
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Pub Dt:
|
07/08/2010
| | | | |
Title:
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SYSTEM FOR TRANSMISSION LINE TERMINATION BY SIGNAL CANCELLATION
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Patent #:
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Issue Dt:
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01/29/2013
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Application #:
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12727375
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Filing Dt:
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03/19/2010
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Publication #:
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Pub Dt:
|
09/30/2010
| | | | |
Title:
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TELEPHONE OUTLET FOR IMPLEMENTING A LOCAL AREA NETWORK OVER TELEPHONE LINES AND A LOCAL AREA NETWORK USING SUCH OUTLETS
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Patent #:
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Issue Dt:
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08/16/2011
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Application #:
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12732745
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Filing Dt:
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03/26/2010
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Publication #:
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Pub Dt:
|
07/22/2010
| | | | |
Title:
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METHOD AND SYSTEM FOR ACCESSING A FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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07/02/2013
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Application #:
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12735049
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Filing Dt:
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06/11/2010
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Publication #:
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Pub Dt:
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10/07/2010
| | | | |
Title:
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METHOD AND APPARATUS FOR STARTING AN INTERNAL COMBUSTION ENGINE
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Patent #:
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Issue Dt:
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10/11/2011
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Application #:
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12750119
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Filing Dt:
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03/30/2010
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Publication #:
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Pub Dt:
|
07/22/2010
| | | | |
Title:
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SIMPLIFIED BIAS CIRCUITRY FOR DIFFERENTIAL BUFFER STAGE WITH SYMMETRIC LOADS
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Patent #:
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Issue Dt:
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10/28/2014
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Application #:
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12753271
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Filing Dt:
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04/02/2010
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Publication #:
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Pub Dt:
|
10/07/2010
| | | | |
Title:
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NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS
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Patent #:
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Issue Dt:
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10/21/2014
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Application #:
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12753458
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Filing Dt:
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04/02/2010
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Publication #:
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Pub Dt:
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10/07/2010
| | | | |
Title:
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NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS
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Patent #:
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Issue Dt:
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05/17/2011
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Application #:
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12757406
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Filing Dt:
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04/09/2010
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Publication #:
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Pub Dt:
|
08/05/2010
| | | | |
Title:
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INDEPENDENT LINK AND BANK SELECTION
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Patent #:
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Issue Dt:
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03/19/2013
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Application #:
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12757540
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Filing Dt:
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04/09/2010
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Publication #:
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Pub Dt:
|
03/03/2011
| | | | |
Title:
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USING INTERRUPTED THROUGH-SILICON-VIAS IN INTEGRATED CIRCUITS ADAPTED FOR STACKING
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Patent #:
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Issue Dt:
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10/09/2012
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Application #:
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12764607
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Filing Dt:
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04/21/2010
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Publication #:
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Pub Dt:
|
08/12/2010
| | | | |
Title:
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FLOW-FILL SPACER STRUCTURES FOR FLAT PANEL DISPLAY DEVICE
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Patent #:
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Issue Dt:
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08/06/2013
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Application #:
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12770376
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Filing Dt:
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04/29/2010
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Publication #:
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Pub Dt:
|
11/25/2010
| | | | |
Title:
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CONFIGURABLE MODULE AND MEMORY SUBSYSTEM
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Patent #:
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Issue Dt:
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12/10/2013
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Application #:
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12773340
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Filing Dt:
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05/04/2010
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Publication #:
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Pub Dt:
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04/21/2011
| | | | |
Title:
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RECONFIGURING THROUGH SILICON VIAS IN STACKED MULTI-DIE PACKAGES
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Patent #:
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Issue Dt:
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12/13/2011
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Application #:
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12773531
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Filing Dt:
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05/04/2010
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Publication #:
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Pub Dt:
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08/26/2010
| | | | |
Title:
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SEMICONDUCTOR MEMORY ASYNCHRONOUS PIPELINE
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Patent #:
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Issue Dt:
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08/09/2011
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Application #:
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12775696
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Filing Dt:
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05/07/2010
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Publication #:
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Pub Dt:
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09/30/2010
| | | | |
Title:
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METHOD AND APPARATUS FOR REDUCING POOL STARVATION IN A SHARED MEMORY SWITCH
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Patent #:
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Issue Dt:
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05/31/2011
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Application #:
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12782047
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Filing Dt:
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05/18/2010
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Publication #:
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Pub Dt:
|
09/09/2010
| | | | |
Title:
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MULTIPLE BIT PER CELL NON VOLATILE MEMORY APPARATUS AND SYSTEM HAVING POLARITY CONTROL AND METHOD OF PROGRAMMING SAME
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Patent #:
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Issue Dt:
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11/12/2013
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Application #:
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12782911
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Filing Dt:
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05/19/2010
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Publication #:
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Pub Dt:
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09/29/2011
| | | | |
Title:
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MEMORY SYSTEM HAVING A PLURALITY OF SERIALLY CONNECTED DEVICES
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Patent #:
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Issue Dt:
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10/09/2012
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Application #:
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12784157
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Filing Dt:
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05/20/2010
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Publication #:
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Pub Dt:
|
09/09/2010
| | | | |
Title:
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FREQUENCY-DOUBLING DELAY LOCKED LOOP
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Patent #:
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Issue Dt:
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07/24/2012
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Application #:
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12784238
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Filing Dt:
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05/20/2010
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Publication #:
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Pub Dt:
|
10/21/2010
| | | | |
Title:
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APPARATUS AND METHOD FOR COMMUNICATING WITH SEMICONDUCTOR DEVICES OF A SERIAL INTERCONNECTION
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Patent #:
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Issue Dt:
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10/25/2011
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Application #:
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12785051
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Filing Dt:
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05/21/2010
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Publication #:
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Pub Dt:
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09/16/2010
| | | | |
Title:
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HIGH SPEED DRAM ARCHITECTURE WITH UNIFORM ACCESS LATENCY
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Patent #:
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Issue Dt:
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09/23/2014
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Application #:
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12785099
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Filing Dt:
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05/21/2010
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Publication #:
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Pub Dt:
|
09/09/2010
| | | | |
Title:
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PARTIAL BLOCK ERASE ARCHITECTURE FOR FLASH MEMORY
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