skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:047645/0424   Pages: 143
Recorded: 10/12/2018
Attorney Dkt #:50783-012001
Conveyance: RELEASE OF U.S. PATENT AGREEMENT (FOR NON-U.S. GRANTORS)
Total properties: 1619
Page 9 of 17
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
1
Patent #:
Issue Dt:
05/02/2006
Application #:
10850664
Filing Dt:
05/21/2004
Publication #:
Pub Dt:
10/28/2004
Title:
INTEGRATED CIRCUITS WITH RHODIUM-RICH STRUCTURES
2
Patent #:
Issue Dt:
10/25/2005
Application #:
10853851
Filing Dt:
05/25/2004
Publication #:
Pub Dt:
12/30/2004
Title:
GAPPED-PLATE CAPACITOR
3
Patent #:
Issue Dt:
02/13/2007
Application #:
10855968
Filing Dt:
05/28/2004
Publication #:
Pub Dt:
02/10/2005
Title:
SEMICONDUCTOR MEMORY ASYNCHRONOUS PIPELINE
4
Patent #:
Issue Dt:
10/10/2006
Application #:
10856783
Filing Dt:
06/01/2004
Publication #:
Pub Dt:
12/15/2005
Title:
TERNARY CAM CELL FOR REDUCED MATCHLINE CAPACITANCE
5
Patent #:
Issue Dt:
03/14/2006
Application #:
10858307
Filing Dt:
06/01/2004
Publication #:
Pub Dt:
11/04/2004
Title:
METHOD AND APPARATUS FOR DEPOSITING FILMS
6
Patent #:
Issue Dt:
09/12/2006
Application #:
10859815
Filing Dt:
06/03/2004
Publication #:
Pub Dt:
12/09/2004
Title:
CLEANING SOLUTION AND CLEANING METHOD OF A SEMICONDUCTOR DEVICE
7
Patent #:
Issue Dt:
08/01/2006
Application #:
10860947
Filing Dt:
06/04/2004
Publication #:
Pub Dt:
12/09/2004
Title:
DELAY STAGE INSENSITIVE TO OPERATING VOLTAGE AND DELAY CIRCUIT INCLUDING THE SAME
8
Patent #:
Issue Dt:
04/18/2006
Application #:
10861157
Filing Dt:
06/04/2004
Publication #:
Pub Dt:
12/08/2005
Title:
INTERNAL POWER MANAGEMENT SCHEME FOR A MEMORY CHIP IN DEEP POWER DOWN MODE
9
Patent #:
Issue Dt:
02/21/2006
Application #:
10864173
Filing Dt:
06/08/2004
Publication #:
Pub Dt:
11/25/2004
Title:
METHOD OF REPAIRING A FAILED WORDLINE
10
Patent #:
Issue Dt:
05/16/2006
Application #:
10870561
Filing Dt:
06/16/2004
Publication #:
Pub Dt:
11/25/2004
Title:
METHOD AND APPARATUS FOR CONTROLLING RADIATION BEAM INTENSITY DIRECTED TO MICROLITHOGRAPHIC SUBSTRATES
11
Patent #:
Issue Dt:
07/12/2005
Application #:
10871965
Filing Dt:
06/18/2004
Publication #:
Pub Dt:
11/25/2004
Title:
SYSTEM FOR DEPOSITING A LAYERED FILM
12
Patent #:
Issue Dt:
01/03/2006
Application #:
10875387
Filing Dt:
06/25/2004
Publication #:
Pub Dt:
05/05/2005
Title:
DATA OUTPUT CONTROL CIRCUIT
13
Patent #:
Issue Dt:
06/27/2006
Application #:
10877037
Filing Dt:
06/24/2004
Publication #:
Pub Dt:
05/05/2005
Title:
SEMICONDUCTOR MEMORY DEVICE HAVING ROW PATH CONTROL CIRCUIT AND OPERATING METHOD THEREOF
14
Patent #:
Issue Dt:
09/05/2006
Application #:
10879133
Filing Dt:
06/30/2004
Publication #:
Pub Dt:
06/30/2005
Title:
METHOD FOR FORMING CONDUCTIVE LINE OF SEMICONDUCTOR DEVICE
15
Patent #:
Issue Dt:
10/10/2006
Application #:
10879220
Filing Dt:
06/30/2004
Publication #:
Pub Dt:
06/30/2005
Title:
METHOD FOR FORMING POLYSILICON PLUG OF SEMICONDUCTOR DEVICE
16
Patent #:
Issue Dt:
01/30/2007
Application #:
10879274
Filing Dt:
06/30/2004
Publication #:
Pub Dt:
06/23/2005
Title:
MEMORY APPARATUS HAVING MULTI-PORT ARCHITECTURE FOR SUPPORTING MULTI PROCESSOR
17
Patent #:
Issue Dt:
03/27/2007
Application #:
10879650
Filing Dt:
06/28/2004
Publication #:
Pub Dt:
08/18/2005
Title:
ON DIE TERMINATION MODE TRANSFER CIRCUIT IN SEMICONDUCTOR MEMORY DEVICE AND ITS METHOD
18
Patent #:
Issue Dt:
05/09/2006
Application #:
10880381
Filing Dt:
06/29/2004
Publication #:
Pub Dt:
06/30/2005
Title:
WRITE CIRCUIT OF DOUBLE DATA RATE SYNCHRONOUS DRAM
19
Patent #:
Issue Dt:
04/01/2008
Application #:
10880432
Filing Dt:
06/29/2004
Publication #:
Pub Dt:
02/10/2005
Title:
LINK AGGREGATION
20
Patent #:
Issue Dt:
06/03/2008
Application #:
10882442
Filing Dt:
07/01/2004
Publication #:
Pub Dt:
11/17/2005
Title:
METHOD FOR DETECTING COLUMN FAIL BY CONTROLLING SENSE AMPLIFIER OF MEMORY DEVICE
21
Patent #:
Issue Dt:
02/22/2005
Application #:
10883099
Filing Dt:
06/30/2004
Publication #:
Pub Dt:
02/24/2005
Title:
APPARATUS AND METHOD OF COMPENSATING FOR PHASE DELAY IN SEMICONDUCTOR DEVICE
22
Patent #:
Issue Dt:
06/13/2006
Application #:
10883619
Filing Dt:
06/30/2004
Publication #:
Pub Dt:
01/05/2006
Title:
DATA PATH HAVING GROUNDED PRECHARGE OPERATION AND TEST COMPRESSION CAPABILITY
23
Patent #:
Issue Dt:
06/19/2007
Application #:
10885971
Filing Dt:
07/08/2004
Publication #:
Pub Dt:
12/09/2004
Title:
SEMICONDUCTOR DEVICE HAVING NO CRACKS IN ONE OR MORE LAYERS UNDERLYING A METAL LINE LAYER AND METHOD OF MANUFACTURING THE SAME
24
Patent #:
Issue Dt:
05/15/2007
Application #:
10888838
Filing Dt:
07/12/2004
Publication #:
Pub Dt:
12/23/2004
Title:
METHOD OF FORMING A METAL OXIDE FILM
25
Patent #:
Issue Dt:
07/11/2006
Application #:
10889194
Filing Dt:
07/12/2004
Publication #:
Pub Dt:
01/13/2005
Title:
REDUNDANCY CIRCUIT IN SEMICONDUCTOR MEMORY DEVICE HAVING A MULTIBLOCK STRUCTURE
26
Patent #:
Issue Dt:
03/06/2007
Application #:
10889203
Filing Dt:
07/12/2004
Publication #:
Pub Dt:
12/09/2004
Title:
BARRIER-METAL-FREE COPPER DAMASCENE TECHNOLOGY USING ATOMIC HYDROGEN ENHANCED REFLOW
27
Patent #:
Issue Dt:
03/17/2015
Application #:
10890199
Filing Dt:
07/14/2004
Publication #:
Pub Dt:
10/20/2005
Title:
NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS
28
Patent #:
Issue Dt:
12/16/2008
Application #:
10909301
Filing Dt:
08/03/2004
Publication #:
Pub Dt:
01/13/2005
Title:
TELEPHONE COMMUNICATION SYSTEM OVER A SINGLE TELEPHONE LINE
29
Patent #:
Issue Dt:
02/21/2006
Application #:
10912768
Filing Dt:
08/05/2004
Publication #:
Pub Dt:
03/31/2005
Title:
CONTENT ADDRESSABLE MEMORY ARCHITECTURE
30
Patent #:
Issue Dt:
03/07/2006
Application #:
10913555
Filing Dt:
08/06/2004
Publication #:
Pub Dt:
01/13/2005
Title:
CHEMICAL TREATMENT OF SEMICONDUCTOR SUBSTRATES
31
Patent #:
Issue Dt:
05/30/2006
Application #:
10914888
Filing Dt:
08/09/2004
Publication #:
Pub Dt:
01/13/2005
Title:
DIELECTRIC MATERIAL FORMING METHODS AND ENHANCED DIELECTRIC MATERIALS
32
Patent #:
Issue Dt:
02/28/2006
Application #:
10917494
Filing Dt:
08/13/2004
Publication #:
Pub Dt:
01/20/2005
Title:
LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS
33
Patent #:
Issue Dt:
11/28/2006
Application #:
10919370
Filing Dt:
08/17/2004
Publication #:
Pub Dt:
06/16/2005
Title:
INPUT SIGNAL RECEIVING DEVICE OF SEMICONDUCTOR MEMORY UNIT
34
Patent #:
Issue Dt:
11/20/2007
Application #:
10919491
Filing Dt:
08/17/2004
Publication #:
Pub Dt:
04/14/2005
Title:
HIGH BANDWIDTH MEMORY INTERFACE
35
Patent #:
Issue Dt:
02/15/2011
Application #:
10921491
Filing Dt:
08/19/2004
Publication #:
Pub Dt:
01/27/2005
Title:
METHOD AND APPARATUS FOR TRAVERSING A MULTIPLEXED DATA PACKET STREAM
36
Patent #:
Issue Dt:
06/19/2007
Application #:
10931396
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
02/10/2005
Title:
STRUCTURES AND METHODS FOR ENHANCING CAPACITORS IN INTEGRATED CIRCUITS
37
Patent #:
Issue Dt:
07/24/2007
Application #:
10931592
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
02/10/2005
Title:
SYSTEM AND METHOD FOR SELECTIVELY INCREASING SURFACE TEMPERATURE OF AN OBJECT
38
Patent #:
Issue Dt:
07/04/2006
Application #:
10931714
Filing Dt:
09/01/2004
Publication #:
Pub Dt:
02/10/2005
Title:
ANTIFUSE STRUCTURE AND METHOD OF USE
39
Patent #:
Issue Dt:
04/26/2005
Application #:
10932503
Filing Dt:
09/02/2004
Publication #:
Pub Dt:
02/10/2005
Title:
CAPACITOR STRUCTURE
40
Patent #:
Issue Dt:
10/24/2006
Application #:
10932771
Filing Dt:
09/02/2004
Publication #:
Pub Dt:
02/03/2005
Title:
REDUCING ASYMMETRICALLY DEPOSITED FILM INDUCED REGISTRATION ERROR
41
Patent #:
Issue Dt:
03/27/2007
Application #:
10937519
Filing Dt:
09/09/2004
Publication #:
Pub Dt:
06/09/2005
Title:
PACKET ADDRESSING PROGRAMMABLE DUAL PORT MEMORY DEVICES AND RELATED METHODS
42
Patent #:
Issue Dt:
04/25/2006
Application #:
10940231
Filing Dt:
09/14/2004
Publication #:
Pub Dt:
03/02/2006
Title:
TEMPERATURE-DEPENDENT DRAM SELF-REFRESH CIRCUIT
43
Patent #:
Issue Dt:
02/13/2007
Application #:
10940808
Filing Dt:
08/24/2004
Publication #:
Pub Dt:
06/16/2005
Title:
MULTI-LEVEL HIGH VOLTAGE GENERATOR
44
Patent #:
Issue Dt:
03/06/2007
Application #:
10942367
Filing Dt:
09/15/2004
Publication #:
Pub Dt:
03/17/2005
Title:
SEMICONDUCTOR DEVICES HAVING A POCKET LINE AND METHODS OF FABRICATING THE SAME
45
Patent #:
Issue Dt:
05/09/2006
Application #:
10945535
Filing Dt:
09/20/2004
Publication #:
Pub Dt:
06/02/2005
Title:
PROCESS FOR THE FABRICATION OF OXIDE FILMS
46
Patent #:
Issue Dt:
09/15/2009
Application #:
10945897
Filing Dt:
09/22/2004
Publication #:
Pub Dt:
03/24/2005
Title:
METHOD FOR FABRICATING COMPLEX THREE-DIMENSIONAL STRUCTURES ON THE SUBMICROMETRIC SCALE BY COMBINED LITHOGRAPHY OF TWO RESISTS
47
Patent #:
Issue Dt:
05/09/2006
Application #:
10946016
Filing Dt:
09/22/2004
Publication #:
Pub Dt:
02/17/2005
Title:
METHOD AND APPARATUS FOR SYNCHRONIZATION OF ROW AND COLUMN ACCESS OPERATIONS
48
Patent #:
Issue Dt:
03/04/2008
Application #:
10946656
Filing Dt:
09/22/2004
Publication #:
Pub Dt:
03/23/2006
Title:
METHOD AND APPARATUS FOR BULLETIN BOARD MESSAGING IN A VOICE MAIL SYSTEM
49
Patent #:
Issue Dt:
11/29/2005
Application #:
10965513
Filing Dt:
10/14/2004
Publication #:
Pub Dt:
03/03/2005
Title:
APPARATUS FOR THE AUTOMATED TESTING, CALIBRATION AND CHARACTERIZATION OF TEST ADAPTERS
50
Patent #:
Issue Dt:
12/27/2005
Application #:
10972324
Filing Dt:
10/26/2004
Publication #:
Pub Dt:
04/21/2005
Title:
SYNCHRONOUS DRAM WITH SELECTABLE INTERNAL PREFETCH SIZE
51
Patent #:
Issue Dt:
01/27/2009
Application #:
10975020
Filing Dt:
10/28/2004
Publication #:
Pub Dt:
05/26/2005
Title:
NETWORK FOR TELEPHONY AND DATA COMMUNICATION
52
Patent #:
Issue Dt:
09/26/2006
Application #:
10976626
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
07/07/2005
Title:
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE WITH SCALABLE TWO TRANSISTOR MEMORY CELLS
53
Patent #:
Issue Dt:
08/22/2006
Application #:
10986299
Filing Dt:
11/12/2004
Publication #:
Pub Dt:
07/28/2005
Title:
LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS
54
Patent #:
Issue Dt:
03/16/2010
Application #:
10988565
Filing Dt:
11/16/2004
Publication #:
Pub Dt:
03/24/2005
Title:
TELEPHONE OUTLET WITH PACKET TELEPHONY ADAPTOR, AND A NETWORK USING SAME
55
Patent #:
Issue Dt:
07/25/2006
Application #:
10991042
Filing Dt:
11/16/2004
Publication #:
Pub Dt:
05/26/2005
Title:
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING SENSE AMPLIFIER WITH INCREASED SPEED
56
Patent #:
Issue Dt:
01/09/2007
Application #:
10992963
Filing Dt:
11/18/2004
Publication #:
Pub Dt:
08/04/2005
Title:
SEMICONDUCTOR MEMORY DEVICE WITH CYLINDRICAL STORAGE ELECTRODE AND METHOD OF MANUFACTURING THE SAME
57
Patent #:
Issue Dt:
10/09/2007
Application #:
10996739
Filing Dt:
11/24/2004
Publication #:
Pub Dt:
01/12/2006
Title:
SYSTEMS AND METHODS FOR MINIMIZING STATIC LEAKAGE OF AN INTEGRATED CIRCUIT
58
Patent #:
Issue Dt:
04/26/2011
Application #:
10998015
Filing Dt:
11/29/2004
Publication #:
Pub Dt:
05/12/2005
Title:
NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS
59
Patent #:
Issue Dt:
08/03/2010
Application #:
11001057
Filing Dt:
12/02/2004
Publication #:
Pub Dt:
04/21/2005
Title:
TELEPHONE OUTLET WITH PACKET TELEPHONY ADAPTER, AND A NETWORK USING SAME
60
Patent #:
Issue Dt:
01/08/2008
Application #:
11002706
Filing Dt:
12/03/2004
Publication #:
Pub Dt:
01/05/2006
Title:
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
61
Patent #:
Issue Dt:
08/29/2006
Application #:
11004806
Filing Dt:
12/07/2004
Publication #:
Pub Dt:
03/09/2006
Title:
SEMICONDUCTOR MEMORY DEVICE
62
Patent #:
Issue Dt:
09/19/2006
Application #:
11006582
Filing Dt:
12/08/2004
Publication #:
Pub Dt:
04/21/2005
Title:
ADAPTER FOR MOUNTING A FACEPLATE OF A FIRST STYLE ON TO AN ELECTRICAL OUTLET CAVITY OF A SECOND STYLE
63
Patent #:
Issue Dt:
03/20/2007
Application #:
11008672
Filing Dt:
12/10/2004
Publication #:
Pub Dt:
08/11/2005
Title:
VOLTAGE REGULATING CIRCUIT AND METHOD OF REGULATING VOLTAGE
64
Patent #:
Issue Dt:
02/13/2007
Application #:
11009534
Filing Dt:
12/10/2004
Publication #:
Pub Dt:
07/28/2005
Title:
HIGH OUTPUT IMPEDANCE CHARGE PUMP FOR PLL/DLL
65
Patent #:
Issue Dt:
10/06/2009
Application #:
11011256
Filing Dt:
12/14/2004
Title:
METHOD AND APPARATUS FOR DETECTING AND CORRECTING ELECTRICAL INTERFERENCE IN A CONFERENCE CALL
66
Patent #:
Issue Dt:
06/06/2006
Application #:
11015421
Filing Dt:
12/20/2004
Publication #:
Pub Dt:
06/30/2005
Title:
SEMICONDUCTOR MEMORY DEVICE WITH EFFICIENT MULTIPLEXING OF I/O PAD IN MULTI-CHIP PACKAGE
67
Patent #:
Issue Dt:
02/17/2009
Application #:
11020193
Filing Dt:
12/27/2004
Publication #:
Pub Dt:
05/19/2005
Title:
NETWORK FOR TELEPHONY AND DATA COMMUNICATION
68
Patent #:
Issue Dt:
02/19/2008
Application #:
11020277
Filing Dt:
12/27/2004
Publication #:
Pub Dt:
06/30/2005
Title:
METHOD OF FORMING AN INTERCONNECTION LINE IN A SEMICONDUCTOR DEVICE
69
Patent #:
Issue Dt:
05/08/2007
Application #:
11025765
Filing Dt:
12/28/2004
Publication #:
Pub Dt:
03/23/2006
Title:
HIGH VOLTAGE GENERATOR CIRCUIT WITH RIPPLE STABILIZATION FUNCTION
70
Patent #:
Issue Dt:
12/05/2006
Application #:
11025800
Filing Dt:
12/28/2004
Publication #:
Pub Dt:
05/04/2006
Title:
SEMICONDUCTOR MEMORY DEVICE FOR LOW POWER SYSTEM
71
Patent #:
Issue Dt:
07/08/2008
Application #:
11026014
Filing Dt:
01/03/2005
Publication #:
Pub Dt:
06/02/2005
Title:
TELEPHONE COMMUNICATION SYSTEM OVER A SINGLE TELEPHONE LINE
72
Patent #:
Issue Dt:
09/08/2009
Application #:
11026757
Filing Dt:
12/31/2004
Publication #:
Pub Dt:
08/18/2005
Title:
COMPOUNDS AND COMPOSITIONS FOR TREATING DYSPROLIFERATIVE DISEASES, AND METHODS OF USE THEREOF
73
Patent #:
Issue Dt:
09/13/2005
Application #:
11026970
Filing Dt:
12/30/2004
Title:
DELAY LOCKED LOOP AND LOCKING METHOD THEREOF
74
Patent #:
Issue Dt:
08/22/2006
Application #:
11032381
Filing Dt:
01/10/2005
Publication #:
Pub Dt:
02/02/2006
Title:
MAIN AMPLIFIER AND SEMICONDUCTOR DEVICE
75
Patent #:
Issue Dt:
05/02/2006
Application #:
11037365
Filing Dt:
01/19/2005
Publication #:
Pub Dt:
06/09/2005
Title:
TIMING VERNIER USING A DELAY LOCKED LOOP
76
Patent #:
Issue Dt:
12/19/2006
Application #:
11038602
Filing Dt:
01/18/2005
Publication #:
Pub Dt:
06/09/2005
Title:
GAPPED-PLATE CAPACITOR
77
Patent #:
Issue Dt:
06/05/2007
Application #:
11041687
Filing Dt:
01/20/2005
Publication #:
Pub Dt:
08/25/2005
Title:
LOW LEAKAGE AND DATA RETENTION CIRCUITRY
78
Patent #:
Issue Dt:
05/15/2012
Application #:
11048370
Filing Dt:
01/31/2005
Publication #:
Pub Dt:
11/24/2005
Title:
DYNAMIC TRAFFIC REARRANGEMENT AND RESTORATION FOR MPLS NETWORKS WITH DIFFERENTIATED SERVICES CAPABILITIES
79
Patent #:
Issue Dt:
03/13/2007
Application #:
11050644
Filing Dt:
02/03/2005
Publication #:
Pub Dt:
08/03/2006
Title:
METHOD AND APPARATUS FOR INITIALIZING A DELAY LOCKED LOOP
80
Patent #:
Issue Dt:
07/04/2006
Application #:
11079216
Filing Dt:
03/15/2005
Publication #:
Pub Dt:
07/21/2005
Title:
CAPACITOR OF AN INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME
81
Patent #:
Issue Dt:
04/21/2009
Application #:
11091371
Filing Dt:
03/29/2005
Publication #:
Pub Dt:
08/10/2006
Title:
DEVICE, METHOD AND SYSTEM FOR ESTIMATING THE TERMINATION TO A WIRED TRANSMISSION-LINE BASED ON DETERMINATION OF CHARACTERISTIC IMPEDANCE
82
Patent #:
Issue Dt:
06/27/2006
Application #:
11100453
Filing Dt:
04/07/2005
Publication #:
Pub Dt:
09/08/2005
Title:
SYSTEM FOR TRANSMISSION LINE TERMINATION BY SIGNAL CANCELLATION
83
Patent #:
Issue Dt:
04/21/2009
Application #:
11100461
Filing Dt:
04/07/2005
Publication #:
Pub Dt:
10/13/2005
Title:
NETWORK FOR TELEPHONY AND DATA COMMUNICATION
84
Patent #:
Issue Dt:
03/14/2006
Application #:
11101413
Filing Dt:
04/08/2005
Publication #:
Pub Dt:
08/18/2005
Title:
HIGH SPEED DRAM ARCHITECTURE WITH UNIFORM ACCESS LATENCY
85
Patent #:
Issue Dt:
01/08/2008
Application #:
11107958
Filing Dt:
04/18/2005
Publication #:
Pub Dt:
11/03/2005
Title:
METHOD AND APPARATUS FOR ACCELERATING RETRIEVAL OF DATA FROM A MEMORY SYSTEM WITH CACHE BY REDUCING LATENCY
86
Patent #:
Issue Dt:
12/16/2008
Application #:
11108651
Filing Dt:
04/11/2005
Publication #:
Pub Dt:
09/01/2005
Title:
METHOD FOR REPAIRING A SEMICONDUCTOR MEMORY
87
Patent #:
Issue Dt:
08/29/2006
Application #:
11118229
Filing Dt:
04/28/2005
Publication #:
Pub Dt:
02/09/2006
Title:
FIXED OFFSET DIGITAL-TO-ANALOG CONVERSION DEVICE AND METHOD
88
Patent #:
Issue Dt:
01/25/2011
Application #:
11121075
Filing Dt:
05/04/2005
Publication #:
Pub Dt:
11/17/2005
Title:
NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS
89
Patent #:
Issue Dt:
11/11/2008
Application #:
11122718
Filing Dt:
05/05/2005
Publication #:
Pub Dt:
12/08/2005
Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
90
Patent #:
Issue Dt:
01/20/2009
Application #:
11125200
Filing Dt:
05/10/2005
Publication #:
Pub Dt:
09/29/2005
Title:
TELEPHONE COMMUNICATION SYSTEM AND METHOD OVER LOCAL AREA NETWORK WIRING
91
Patent #:
Issue Dt:
12/26/2006
Application #:
11125380
Filing Dt:
05/09/2005
Publication #:
Pub Dt:
02/16/2006
Title:
SEMICONDUCTOR MEMORY DEVICE FOR SIMULTANEOUSLY TESTING BLOCKS OF CELLS
92
Patent #:
Issue Dt:
12/15/2009
Application #:
11128229
Filing Dt:
05/13/2005
Publication #:
Pub Dt:
12/15/2005
Title:
NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS
93
Patent #:
Issue Dt:
05/11/2010
Application #:
11128383
Filing Dt:
05/13/2005
Publication #:
Pub Dt:
11/24/2005
Title:
NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS
94
Patent #:
Issue Dt:
04/17/2007
Application #:
11141568
Filing Dt:
05/31/2005
Publication #:
Pub Dt:
12/01/2005
Title:
DIFFERENTIAL TYPE DELAY CELLS AND METHODS OF OPERATING THE SAME
95
Patent #:
Issue Dt:
04/03/2007
Application #:
11147629
Filing Dt:
06/08/2005
Publication #:
Pub Dt:
12/29/2005
Title:
DUTY CYCLE CORRECTION CIRCUIT FOR USE IN A SEMICONDUCTOR DEVICE
96
Patent #:
Issue Dt:
02/07/2012
Application #:
11156140
Filing Dt:
06/17/2005
Publication #:
Pub Dt:
10/20/2005
Title:
FREQUENCY DIVISION MULTIPLEXING SYSTEM WITH SELECTABLE RATE
97
Patent #:
Issue Dt:
05/29/2007
Application #:
11166620
Filing Dt:
06/24/2005
Publication #:
Pub Dt:
05/18/2006
Title:
CIRCUIT AND METHOD FOR GENERATING WORDLINE VOLTAGE IN NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
98
Patent #:
Issue Dt:
11/04/2008
Application #:
11187994
Filing Dt:
07/25/2005
Publication #:
Pub Dt:
11/17/2005
Title:
TELEPHONE COMMUNICATION SYSTEM AND METHOD OVER LOCAL AREA NETWORK WIRING
99
Patent #:
Issue Dt:
04/03/2007
Application #:
11190884
Filing Dt:
07/28/2005
Publication #:
Pub Dt:
11/24/2005
Title:
LOCAL AREA NETWORK FOR DISTRIBUTING DATA COMMUNICATION, SENSING AND CONTROL SIGNALS
100
Patent #:
Issue Dt:
10/06/2009
Application #:
11195257
Filing Dt:
08/01/2005
Publication #:
Pub Dt:
12/01/2005
Title:
DELAY LOCKED LOOP IMPLEMENTATION IN A SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY
Assignor
1
Exec Dt:
07/31/2018
Assignee
1
515 LEGGET DRIVE, SUITE 704
OTTAWA, CANADA K2K 3G4
Correspondence name and address
CLARK & ELBING LLP
101 FEDERAL STREET, 15TH FLOOR
BOSTON, MA 02110

Search Results as of: 06/16/2024 09:29 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT