|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/1999
|
Application #:
|
08789797
|
Filing Dt:
|
01/28/1997
|
|
Title:
|
TRI-STATE OUTPUT CIRCUIT FOR SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/1998
|
Application #:
|
08795024
|
Filing Dt:
|
02/04/1997
|
|
Title:
|
SYSTEM FOR CONSTANT FIELD ERASURE IN A FLASH EPROM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/1998
|
Application #:
|
08799074
|
Filing Dt:
|
02/11/1997
|
|
Title:
|
HIGH-VOLTAGE CMOS LEVEL SHIFTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/1998
|
Application #:
|
08799200
|
Filing Dt:
|
02/13/1997
|
|
Title:
|
MULTI-LAYER GATE STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/1998
|
Application #:
|
08799236
|
Filing Dt:
|
02/14/1997
|
|
Title:
|
METHOD FOR ANNEALING DAMAGED SEMICONDUCTOR REGIONS ALLOWING FOR ENHANCED OXIDE GROWTH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/1999
|
Application #:
|
08799833
|
Filing Dt:
|
02/13/1997
|
|
Title:
|
METHOD OF MAKING MULTI-LAYER GATE STRUCTURE WITH DIFFERENT STOICHIOMETRY SILICIDE LAYERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/1999
|
Application #:
|
08799835
|
Filing Dt:
|
02/13/1997
|
|
Title:
|
ONE-PIN SHIFT REGISTER INTERFACE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/1999
|
Application #:
|
08800195
|
Filing Dt:
|
02/13/1997
|
|
Title:
|
SYNCHRONOUS CIRCUIT WITH IMPROVED CLOCK TO DATA OUTPUT ACCESS TIME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/1998
|
Application #:
|
08801305
|
Filing Dt:
|
02/18/1997
|
|
Title:
|
NON-VOLATILE STORAGE DEVICE REFRESH TIME DETECTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/21/2000
|
Application #:
|
08804025
|
Filing Dt:
|
02/19/1997
|
|
Title:
|
NOVEL CIRCUIT AND METHOD FOR CONTROLLING MEMORY DEPTH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/1999
|
Application #:
|
08805365
|
Filing Dt:
|
02/24/1997
|
|
Title:
|
OSCILLATION CIRCUIT AND PLL CIRCUIT USING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/1998
|
Application #:
|
08808237
|
Filing Dt:
|
02/28/1997
|
|
Title:
|
HIGH VOLTAGE NMOS PASS GATE FOR INTEGRATED CIRCUIT WITH HIGH VOLTAGE GENERATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/1998
|
Application #:
|
08810164
|
Filing Dt:
|
02/28/1997
|
|
Title:
|
CHANNEL HOT-CARRIER PAGE WRITE FOR NAND APPLICATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/1999
|
Application #:
|
08813562
|
Filing Dt:
|
03/07/1997
|
|
Title:
|
METHOD OF SPACER FORMATION AND SOURCE PROTECTION AFTER SELF- ALIGNED SOURCE IS FORMED AND DEVICE PROVIDED BY SUCH A METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/1998
|
Application #:
|
08815835
|
Filing Dt:
|
03/12/1997
|
|
Title:
|
NON-VOLATILE MEMORY DEVICE HAVING A FLOATING GATE WITH ENHANCED CHARGE RETENTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/1999
|
Application #:
|
08816877
|
Filing Dt:
|
03/13/1997
|
|
Title:
|
METHOD AND APPARATUS FOR REDUCING CONTINUOUS WRITE CYCLE CURRENT IN MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/1999
|
Application #:
|
08820893
|
Filing Dt:
|
03/19/1997
|
|
Title:
|
CONTROLLED ISOTROPIC ETCH PROCESS AND METHOD OF FORMING AN OPENING IN A DIELECTRIC LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/1998
|
Application #:
|
08821617
|
Filing Dt:
|
03/20/1997
|
|
Title:
|
CIRCUIT AND METHOD FOR ADJUSTING DUTY CYCLES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/1999
|
Application #:
|
08824369
|
Filing Dt:
|
03/25/1997
|
|
Title:
|
DYNAMIC VOLTAGE REFERENCE WITH COMPENSATES FOR PROCESS VARIATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/1999
|
Application #:
|
08825359
|
Filing Dt:
|
03/28/1997
|
|
Title:
|
SYNCHRONIZING CLOCK PULSE GENERATOR FOR LOGIC DERIVED CLOCK SIGNALS WITH SYNCHRONOUS CLOCK SUSPENSION CAPABILITY FOR A PROGRAMMABLE DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/1999
|
Application #:
|
08825482
|
Filing Dt:
|
03/28/1997
|
|
Title:
|
ASYNCHRONOUS PULSE DISCRIMINATING SYNCHRONIZING CLOCK PULSE GENERATOR FOR LOGIC DERIVED CLOCK SIGNALS FOR A PROGRAMMABLE DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/1999
|
Application #:
|
08825484
|
Filing Dt:
|
03/28/1997
|
|
Title:
|
PULSE DISCRIMINATING CLOCK SYNCHRONIZER FOR LOGIC DERIVED CLOCK SIGNALS FOR A PROGRAMMABLE DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/1999
|
Application #:
|
08825489
|
Filing Dt:
|
03/28/1997
|
|
Title:
|
ASYNCHRONOUS PULSE DISCRIMINATING SYNCHRONIZING CLOCK PULSE GENERATOR WITH SYNCHRONOUS CLOCK SUSPENSION CAPABILITY FOR LOGIC DERIVED CLOCK SIGNALS FOR A PROGRAMMABLE DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/1999
|
Application #:
|
08827271
|
Filing Dt:
|
03/28/1997
|
|
Title:
|
FAST CLOCK GENERATOR AND CLOCK SYNCHRONIZER FOR LOGIC DERIVED CLOCK SIGNALS FOR A PROGRAMMABLE DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2000
|
Application #:
|
08828157
|
Filing Dt:
|
03/27/1997
|
|
Title:
|
PARTIALLY OR COMPLETELY ENCAPSULATED TOP ELECTRODE OF A FERROELECTRIC CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/2000
|
Application #:
|
08828319
|
Filing Dt:
|
03/28/1997
|
|
Title:
|
PULSE DISCRIMINATING CLOCK SYNCHRONIZER FOR LOGIC DERIVED CLOCK SIGNALS WITH SYNCHRONOUS CLOCK SUSPENSION CAPABILITY FOR A PROGRAMMABLE DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/1999
|
Application #:
|
08828325
|
Filing Dt:
|
03/28/1997
|
|
Title:
|
SYNCHRONIZING CLOCK PULSE GENERATOR FOR LOGIC DERIVED CLOCK SIGNALS FOR A PROGRAMMABLE DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/1999
|
Application #:
|
08828434
|
Filing Dt:
|
03/28/1997
|
|
Title:
|
FAST CLOCK GENERATOR AND CLOCK SYNCHRONIZER FOR LOGIC DERIVED CLOCK SIGNALS WITH SYNCHRONOUS CLOCK SUSPENSION CAPABILITY FOR A PROGRAMMABLE DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/16/1999
|
Application #:
|
08828537
|
Filing Dt:
|
03/31/1997
|
|
Title:
|
LOW SPEED DRIVER FOR USE WITH THE UNIVERSAL SERIAL BUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/05/1999
|
Application #:
|
08831571
|
Filing Dt:
|
04/09/1997
|
|
Title:
|
MEMORY CELL PROGRAMMING WITH CONTROLLED CURRENT INJECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/1998
|
Application #:
|
08834942
|
Filing Dt:
|
04/07/1997
|
|
Title:
|
MEMORY CELL SENSING METHOD AND CIRCUITRY FOR BIT LINE EQUALIZATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/1998
|
Application #:
|
08835586
|
Filing Dt:
|
04/09/1997
|
|
Title:
|
APPARATUS AND METHOD FOR NONVOLATILE CONFIGURATION CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/1999
|
Application #:
|
08837556
|
Filing Dt:
|
04/21/1997
|
|
Title:
|
MULTILAYER FLOATING GATE FIELD EFFECT TRANSISTOR STRUCTURE FOR USE IN INTEGRATED CIRCUIT DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/1999
|
Application #:
|
08837782
|
Filing Dt:
|
04/22/1997
|
|
Title:
|
OUTPUT VOLTAGE CONTROLLED IMPEDANCE OUTPUT BUFFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/1998
|
Application #:
|
08838532
|
Filing Dt:
|
04/09/1997
|
|
Title:
|
CHARGING-AND-DISCHARGING DEVICE, BATTERY PACK AND ELECTRONIC APPARATUS INCLUDING THEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2000
|
Application #:
|
08839981
|
Filing Dt:
|
04/24/1997
|
|
Title:
|
FAIL SAFE METHOD AND APPARATUS FOR A USB DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/20/1998
|
Application #:
|
08845302
|
Filing Dt:
|
04/25/1997
|
|
Title:
|
FAST TURN-ON SILICON CONTROLLED RECTIFIER (SCR) FOR ELECTROSTATIC DISCHARGE (ESD) PROTECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/1999
|
Application #:
|
08846558
|
Filing Dt:
|
04/29/1997
|
|
Title:
|
SEMICONDUCTOR NON-VOLATILE LATCH DEVICE INCLUDING EMBEDDED NON-VOLATILE ELEMENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
08850511
|
Filing Dt:
|
05/02/1997
|
|
Title:
|
ESD PROTECTION CIRCUIT FOR I/O BUFFERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/1998
|
Application #:
|
08852695
|
Filing Dt:
|
05/07/1997
|
|
Title:
|
FABRICATION SEQUENCE EMPLOYING AN OXIDE FORMED WITH MINIMIZED INDUCTED CHARGE AND/OR MAXIMIZED BREAKDOWN VOLTAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/1998
|
Application #:
|
08852992
|
Filing Dt:
|
05/08/1997
|
|
Title:
|
MULTIPLE WORD WIDTH MEMORY ARRAY CLOCKING SCHEME FOR READING WORDS FROM A MEMORY ARRAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/04/1998
|
Application #:
|
08853185
|
Filing Dt:
|
05/09/1997
|
|
Title:
|
MULTIPLE BITS- PER- CELL FLASH EEPROM MEMORY CELLS WITH WIDE PROGRAM AND ERASE VT WINDOW
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/1999
|
Application #:
|
08853527
|
Filing Dt:
|
05/09/1997
|
|
Title:
|
DUAL-LEVEL METALIZATION METHOD FOR INTEGRATED CIRCUIT FERROELECTRIC DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/20/1998
|
Application #:
|
08855040
|
Filing Dt:
|
05/13/1997
|
|
Title:
|
METHOD AND APPARATUS FOR PREVENTING WRITE OPERATIONS IN A MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/19/2000
|
Application #:
|
08857269
|
Filing Dt:
|
05/16/1997
|
|
Title:
|
LEVEL CONVERTER AND SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/1998
|
Application #:
|
08858589
|
Filing Dt:
|
05/19/1997
|
|
Title:
|
MEMORY DEVICE USING A REDUCED WORD LINE VOLTAGE DURING READ OPERATIONS AND A METHOD OF ACCESSING SUCH A MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/1998
|
Application #:
|
08861674
|
Filing Dt:
|
05/22/1997
|
|
Title:
|
USE OF CALCIUM AND STRONTIUM DOPANTS TO IMPROVE RETENTION PERFORMANCE IN A PZT FERROELECTRIC FILM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/1999
|
Application #:
|
08865342
|
Filing Dt:
|
05/29/1997
|
|
Title:
|
PROGRAMMABLE CLOCK GENERATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2000
|
Application #:
|
08865667
|
Filing Dt:
|
05/30/1997
|
|
Title:
|
CIRCUIT, STRUCTURE AND METHOD OF TESTING A SEMICONDUCTOR, SUCH AS AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/1999
|
Application #:
|
08868062
|
Filing Dt:
|
06/03/1997
|
|
Title:
|
SRAM WITH ROM FUNCTIONALITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2001
|
Application #:
|
08868079
|
Filing Dt:
|
06/03/1997
|
|
Title:
|
MICROPROCESSOR CONTROLLED FREQUENCY LOCK LOOP FOR USE WITH AN EXTERNAL PERIODIC SIGNAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/1999
|
Application #:
|
08870045
|
Filing Dt:
|
06/05/1997
|
|
Title:
|
TUBE FOR FLASH MINIATURE CARD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/1999
|
Application #:
|
08871428
|
Filing Dt:
|
06/09/1997
|
|
Title:
|
MONITORING CLEANING EFFECTIVENESS OF A CLEANING SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/1998
|
Application #:
|
08874006
|
Filing Dt:
|
06/12/1997
|
|
Title:
|
SEMICONDUCTOR DEVICE SUCH AS A STATIC RANDOM ACCESS MEMORY (SRAM) HAVING A LOW POWER MODE USING A CLOCK DISABLE CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/1999
|
Application #:
|
08877683
|
Filing Dt:
|
06/16/1997
|
|
Title:
|
CIRCUIT AND METHOD FOR DATA RECOVERY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/1999
|
Application #:
|
08878119
|
Filing Dt:
|
06/18/1997
|
|
Title:
|
METHOD OF FABRICATING AN EPROM TYPE DEVICE WITH REDUCED PROCESS RESIDUES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2003
|
Application #:
|
08878728
|
Filing Dt:
|
06/19/1997
|
|
Title:
|
METHOD FOR CONTROLLING THE OXIDATION OF IMPLANTED SILICON
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/1998
|
Application #:
|
08878904
|
Filing Dt:
|
06/19/1997
|
|
Title:
|
A METHOD AND CIRCUIT FOR PREVENTING AND/OR INHIBITING CONTENTION IN A SYSTEM EMPLOYING A RANDOM ACCESS MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/1999
|
Application #:
|
08879287
|
Filing Dt:
|
06/19/1997
|
|
Title:
|
PHASE DETECTOR WITH LINEAR OUTPUT RESPONSE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/1999
|
Application #:
|
08881487
|
Filing Dt:
|
06/24/1997
|
|
Title:
|
METHOD AND SOFTWARE FOR OPTIMIZING AN INTERFACE BETWEEN COMPONENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/1999
|
Application #:
|
08883971
|
Filing Dt:
|
06/27/1997
|
|
Title:
|
LOW DISTORTION LEVEL SHIFTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/1998
|
Application #:
|
08884547
|
Filing Dt:
|
06/27/1997
|
|
Title:
|
A BIT LINE DISCHARGE METHOD FOR READING A MULTIPLE BITS-PER-CELL FLASH EEPROM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/1999
|
Application #:
|
08884561
|
Filing Dt:
|
06/27/1997
|
|
Title:
|
READ ONLY/ RANDOM ACCESS MEMORY ARCHITECTURE AND METHODS FOR OPERATING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2000
|
Application #:
|
08884581
|
Filing Dt:
|
06/27/1997
|
|
Title:
|
REFERENCE VOLTAGE GENERATOR FOR READING A ROM CELL IN AN INTEGRATED RAM/ROM MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2002
|
Application #:
|
08885046
|
Filing Dt:
|
06/30/1997
|
|
Title:
|
METHOD AND STRUCTURE FOR ISOLATING INTEGRATED CIRCUIT COMPONENTS AND/ OR SEMICONDUCTOR ACTIVE DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2001
|
Application #:
|
08885140
|
Filing Dt:
|
06/30/1997
|
|
Title:
|
METHOD AND APPARATUS FOR CONTROLLING THE THICKNESS OF A GATE OXIDE IN A SEMICONDUCTOR MANUFACTURING PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/1999
|
Application #:
|
08885156
|
Filing Dt:
|
06/30/1997
|
|
Title:
|
NON-VOLATILE STATIC RANDOM ACCESS MEMORY AND METHODS FOR USING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2000
|
Application #:
|
08886923
|
Filing Dt:
|
07/02/1997
|
|
Title:
|
SYSTEM FOR RECONFIGURING A PERIPHERAL DEVICE WHERE CONFIGURATION INFORMATION IS DOWNLOADED FROM THE HOST AND A CIRCUIT SIMULATES DISCONNECTION AND RECONNECTION OF THE PERIPHERAL DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/1999
|
Application #:
|
08887779
|
Filing Dt:
|
07/03/1997
|
|
Title:
|
EXTENDED RESOLUTION PHASE MEASUREMENT
|
|
|
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Patent #:
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Issue Dt:
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10/05/1999
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Application #:
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08891422
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Filing Dt:
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07/09/1997
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Title:
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METHOD OF MAKING A SEMICONDUCTOR DEVICE WITH ADJUSTABLE THRESHOLD VOLTAGE
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Patent #:
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Issue Dt:
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09/21/1999
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Application #:
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08897773
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Filing Dt:
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07/21/1997
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Title:
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SIGNAL GENERATION DECODER CIRCUIT AND METHOD
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Patent #:
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Issue Dt:
|
06/29/1999
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Application #:
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08899565
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Filing Dt:
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07/24/1997
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Title:
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VOLTAGE BOOSTER CIRCUIT AND A VOLTAGE DROP CIRCUIT WITH CHANGEABLE OPERATING LEVELS
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Patent #:
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Issue Dt:
|
10/06/1998
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Application #:
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08899762
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Filing Dt:
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07/24/1997
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Title:
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FRACTIONAL N- FREQUENCY SYNTHESIZER AND SPURIOUS SIGNAL CANCEL CIRCUIT
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Patent #:
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Issue Dt:
|
10/10/2000
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Application #:
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08908861
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Filing Dt:
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08/08/1997
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Title:
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ADJUSTABLE VERIFY AND PROGRAM VOLTAGES IN PROGRAMMABLE DEVICES
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Patent #:
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Issue Dt:
|
10/26/1999
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Application #:
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08911209
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Filing Dt:
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08/14/1997
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Title:
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SINGLE PUMP CIRCUIT FOR GENERATING HIGH VOLTAGE FROM TWO DIFFERENT INPUTS
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Patent #:
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Issue Dt:
|
01/18/2000
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Application #:
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08911471
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Filing Dt:
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08/14/1997
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Title:
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INDENTIFICATION OF THE COMPOSITION OF PARTICLES IN A PROCESS CHAMBER
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Patent #:
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Issue Dt:
|
12/01/1998
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Application #:
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08914543
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Filing Dt:
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08/19/1997
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Title:
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HIGH VOLTAGE NMOS PASS GATE HAVING SUPPLY RANGE, AREA, AND SPEED ADVANTAGES
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Patent #:
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Issue Dt:
|
04/24/2001
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Application #:
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08914960
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Filing Dt:
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08/20/1997
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Title:
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SYSTEM AND METHOD FOR INTERFACING AN INPUT/OUTPUT SYSTEM MEMORY TO A HOST COMPUTER SYSTEM
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Patent #:
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Issue Dt:
|
12/29/1998
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Application #:
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08915054
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Filing Dt:
|
08/20/1997
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Title:
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VOLTAGE BOOST CIRCUIT AND OPERATION THEREOF AT LOW POWER SUPPLY VOLTAGES
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Patent #:
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Issue Dt:
|
05/16/2000
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Application #:
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08915370
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Filing Dt:
|
08/20/1997
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Title:
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SYSTEM AND METHOD FOR UPDATING THE DATA STORED IN A CACHE MEMORY ATTACHED TO AN INPUT/OUTPUT SYSTEM
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Patent #:
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Issue Dt:
|
05/02/2000
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Application #:
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08915984
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Filing Dt:
|
08/21/1997
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Title:
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REDUNDANCY SCHEME PROVIDING IMPROVEMENTS IN REDUNDANT CIRCUIT ACCESS TIME AND INTEGRATED CIRCUIT LAYOUT AREA
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|
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Patent #:
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Issue Dt:
|
08/17/1999
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Application #:
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08917149
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Filing Dt:
|
08/25/1997
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Title:
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REDUCTION OF CHARGE LOSS IN NONVOLATILE MEMORY CELLS BY PHOSPHORUS IMPLANTATION INTO PECVD NITRIDE/OXYNITRIDE FILMS
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Patent #:
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Issue Dt:
|
12/08/1998
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Application #:
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08920200
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Filing Dt:
|
08/25/1997
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Title:
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CIRCUIT AND METHOD FOR MEASURING THE DIFFERENCE FREQUENCY BETWEEN TWO CLOCKS
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|
|
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Patent #:
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Issue Dt:
|
03/14/2000
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Application #:
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08920539
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Filing Dt:
|
08/27/1997
|
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Title:
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MECHANISM FOR DETECTING PARTICULATE FORMATION AND/OR FAILURES IN THE REMOVAL OF GAS FROM A LIQUID
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|
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Patent #:
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Issue Dt:
|
02/10/2004
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Application #:
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08923103
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Filing Dt:
|
09/04/1997
|
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Title:
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SEMICONDUCTOR WAFER CLAMP RETAINER
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|
|
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Patent #:
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|
Issue Dt:
|
06/22/1999
|
Application #:
|
08926611
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Filing Dt:
|
09/10/1997
|
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Title:
|
NON-VOLATILE RANDOM ACCESS MEMORY AND METHODS FOR MAKING AND CONFIGURING SAME
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|
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Patent #:
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Issue Dt:
|
07/01/2003
|
Application #:
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08929308
|
Filing Dt:
|
09/03/1997
|
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Title:
|
METHOD AND STRUCTURE FOR A SINGLE-SIDED NON-SELF-ALIGNED TRANSISTOR
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Patent #:
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Issue Dt:
|
09/05/2000
|
Application #:
|
08931989
|
Filing Dt:
|
09/17/1997
|
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Title:
|
SCAN PATH CIRCUITRY FOR PROGRAMMING A VARIABLE CLOCK PULSE WIDTH
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|
|
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Patent #:
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Issue Dt:
|
08/10/1999
|
Application #:
|
08932315
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Filing Dt:
|
09/17/1997
|
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Title:
|
SCAN PATH CIRCUITRY INCLUDING A PROGRAMMABLE DELAY CIRCUIT
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|
|
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Patent #:
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Issue Dt:
|
12/21/1999
|
Application #:
|
08932637
|
Filing Dt:
|
09/17/1997
|
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Title:
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TEST MODE FEATURES FOR SYNCHRONOUS PIPELINED MEMORIES
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|
|
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Patent #:
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|
Issue Dt:
|
09/14/1999
|
Application #:
|
08932638
|
Filing Dt:
|
09/17/1997
|
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Title:
|
SCAN PATH CIRCUITRY INCLUDING AN OUTPUT REGISTER HAVING A FLOW THROUGH MODE
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|
|
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Patent #:
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Issue Dt:
|
09/14/1999
|
Application #:
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08933139
|
Filing Dt:
|
09/18/1997
|
|
Title:
|
VOLTAGE LEVEL INTERFACE CIRCUIT WITH SET UP AND HOLD CONTROL
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|
|
|
|
Patent #:
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|
Issue Dt:
|
03/19/2002
|
Application #:
|
08933562
|
Filing Dt:
|
09/19/1997
|
|
Title:
|
METHOD AND APPARATUS TO PREVENT LATCH-UP IN CMOS DEVICES
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|
|
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Patent #:
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|
Issue Dt:
|
05/18/1999
|
Application #:
|
08934805
|
Filing Dt:
|
09/22/1997
|
|
Title:
|
METHODS, CIRCUITS AND DEVICES FOR IMPROVING CROSSOVER PERFORMANCE AND/OR MONOTONICITY, AND APPLICATIONS OF THE SAME IN A UNIVERSAL SERIAL BUS (USB) LOW SPEED OUTPUT DRIVER
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|
|
|
|
Patent #:
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|
Issue Dt:
|
06/15/1999
|
Application #:
|
08934933
|
Filing Dt:
|
09/22/1997
|
|
Title:
|
METHODS, CIRCUITS AND DEVICES FOR IMPROVING CROSSOVER PERFORMANCE AND/OR MONOTONICITY, AND APPLICATIONS OF THE SAME IN A UNIVERSAL SERIAL BUS (USB) LOW SPEED OUTPUT DRIVER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/1999
|
Application #:
|
08935350
|
Filing Dt:
|
09/22/1997
|
|
Title:
|
METHODS, CIRCUITS AND DEVICES FOR REDUCING AND/OR IMPROVING CROSSOVER PERFORMANCE AND/OR MONOTONICITY, AND APPLICATIONS OF THE SAME IN A UNIVERSAL SERIAL BUS (USB) LOW SPEED OUTPUT DRIVER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2000
|
Application #:
|
08935705
|
Filing Dt:
|
09/23/1997
|
|
Title:
|
PLASMA ETCHING METHOD
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2000
|
Application #:
|
08937597
|
Filing Dt:
|
09/29/1997
|
|
Title:
|
VOLTAGE THRESHOLD DETECTION CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/1999
|
Application #:
|
08938048
|
Filing Dt:
|
09/26/1997
|
|
Title:
|
MEMORY BLOCK SELECT USING MULTIPLE WORD LINES TO ADDRESS A SINGLE MEMORY CELL ROW
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/1999
|
Application #:
|
08938292
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Filing Dt:
|
09/26/1997
|
|
Title:
|
SELECTIVE BIT LINE RECOVERY IN A MEMORY ARRAY
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