|
|
Patent #:
|
|
Issue Dt:
|
12/06/2011
|
Application #:
|
11590481
|
Filing Dt:
|
10/30/2006
|
Title:
|
SPREAD SPECTRUM FREQUENCY SYNTHESIZER
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2010
|
Application #:
|
11590483
|
Filing Dt:
|
10/30/2006
|
Title:
|
SPREAD SPECTRUM FREQUENCY SYNTHESIZER WITH IMPROVED FREQUENCY SHAPE BY ADJUSTING THE LENGTH OF A STANDARD CURVE USED FOR SPREAD SPECTRUM MODULATION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/2010
|
Application #:
|
11591015
|
Filing Dt:
|
10/31/2006
|
Title:
|
LASER NAVIGATION SENSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2011
|
Application #:
|
11592075
|
Filing Dt:
|
11/01/2006
|
Title:
|
OPERATIONAL AMPLIFIER AND METHOD FOR AMPLIFYING A SIGNAL WITH SHARED COMPENSATION COMPONENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/27/2011
|
Application #:
|
11593086
|
Filing Dt:
|
11/06/2006
|
Publication #:
|
|
Pub Dt:
|
05/08/2008
| | | | |
Title:
|
CU ANNEALING FOR IMPROVED DATA RETENTION IN FLASH MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/10/2009
|
Application #:
|
11595639
|
Filing Dt:
|
11/10/2006
|
Publication #:
|
|
Pub Dt:
|
03/15/2007
| | | | |
Title:
|
SONOS MEMORY WITH INVERSION BIT-LINES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/2010
|
Application #:
|
11598571
|
Filing Dt:
|
11/14/2006
|
Publication #:
|
|
Pub Dt:
|
09/20/2007
| | | | |
Title:
|
METHOD AND CIRCUIT FOR CORRECTING SENSOR TEMPERATURE DEPENDENCY CHARACTERISTIC
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2012
|
Application #:
|
11598981
|
Filing Dt:
|
11/13/2006
|
Publication #:
|
|
Pub Dt:
|
05/15/2008
| | | | |
Title:
|
STOCHASTIC SIGNAL DENSITY MODULATION FOR OPTICAL TRANSDUCER CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2013
|
Application #:
|
11599926
|
Filing Dt:
|
11/14/2006
|
Title:
|
PROCESS FOR POST CONTACT-ETCH CLEAN
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2013
|
Application #:
|
11600255
|
Filing Dt:
|
11/14/2006
|
Publication #:
|
|
Pub Dt:
|
05/15/2008
| | | | |
Title:
|
CAPACITANCE TO CODE CONVERTER WITH SIGMA-DELTA MODULATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2007
|
Application #:
|
11600847
|
Filing Dt:
|
11/17/2006
|
Publication #:
|
|
Pub Dt:
|
03/15/2007
| | | | |
Title:
|
ANALOG FILTER CIRCUIT AND ADJUSTMENT METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2012
|
Application #:
|
11600896
|
Filing Dt:
|
11/15/2006
|
Title:
|
REFERENCE VOLTAGE OFFSET FOR CAPACITIVE TOUCH-SENSOR MEASUREMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/03/2012
|
Application #:
|
11601465
|
Filing Dt:
|
11/16/2006
|
Title:
|
CHARGE ACCUMULATION CAPACITANCE SENSOR WITH LINEAR TRANSFER CHARACTERISTIC
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/2013
|
Application #:
|
11608032
|
Filing Dt:
|
12/07/2006
|
Publication #:
|
|
Pub Dt:
|
06/12/2008
| | | | |
Title:
|
MEMORY DEVICE PROTECTION LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/2011
|
Application #:
|
11608388
|
Filing Dt:
|
12/08/2006
|
Publication #:
|
|
Pub Dt:
|
06/12/2008
| | | | |
Title:
|
PREVENTION OF OXIDATION OF CARRIER IONS TO IMPROVE MEMORY RETENTION PROPERTIES OF POLYMER MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2007
|
Application #:
|
11611053
|
Filing Dt:
|
12/14/2006
|
Publication #:
|
|
Pub Dt:
|
04/19/2007
| | | | |
Title:
|
IMPRINT-FREE CODING FOR FERROELECTRIC NONVOLATILE COUNTERS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2012
|
Application #:
|
11611856
|
Filing Dt:
|
12/16/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT SYSTEM WITH METAL AND SEMI-CONDUCTING GATE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2010
|
Application #:
|
11612265
|
Filing Dt:
|
12/18/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
STRAPPING CONTACT FOR CHARGE PROTECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2011
|
Application #:
|
11612413
|
Filing Dt:
|
12/18/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
DUAL-BIT MEMORY DEVICE HAVING TRENCH ISOLATION MATERIAL DISPOSED NEAR BIT LINE CONTACT AREAS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/2010
|
Application #:
|
11612863
|
Filing Dt:
|
12/19/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
ERASING FLASH MEMORY USING ADAPTIVE DRAIN AND/OR GATE BIAS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2010
|
Application #:
|
11612992
|
Filing Dt:
|
12/19/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
METHOD AND APPARATUS FOR MULTI-CHIP PACKAGING
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/2009
|
Application #:
|
11613379
|
Filing Dt:
|
12/20/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
METHOD AND APPARATUS FOR ADAPTIVE MEMORY CELL OVERERASE COMPENSATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/2009
|
Application #:
|
11613383
|
Filing Dt:
|
12/20/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
FLASH MEMORY DEVICE WITH EXTERNAL HIGH VOLTAGE SUPPLY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2010
|
Application #:
|
11613513
|
Filing Dt:
|
12/20/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
SEMICONDUCTOR MEMORY COMPRISING DUAL CHARGE STORAGE NODES AND METHODS FOR ITS FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2009
|
Application #:
|
11613832
|
Filing Dt:
|
12/20/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
USE OF PERIODIC REFRESH IN MEDIUM RETENTION MEMORY ARRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
11613946
|
Filing Dt:
|
12/20/2006
|
Publication #:
|
|
Pub Dt:
|
05/03/2007
| | | | |
Title:
|
METHOD AND APPARATUS FOR SCANNING A KEY OR BUTTON MATRIX
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/2010
|
Application #:
|
11614048
|
Filing Dt:
|
12/20/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
METHODS FOR FABRICATING A SPLIT CHARGE STORAGE NODE SEMICONDUCTOR MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/2009
|
Application #:
|
11614050
|
Filing Dt:
|
12/20/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
METHODS FOR FABRICATING A MEMORY DEVICE INCLUDING A DUAL BIT MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
05/21/2013
|
Application #:
|
11614053
|
Filing Dt:
|
12/20/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
METHOD AND APPARATUS FOR PROTECTION AGAINST PROCESS-INDUCED CHARGING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2012
|
Application #:
|
11614306
|
Filing Dt:
|
12/21/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
SOLID-STATE MEMORY-BASED GENERATION AND HANDLING OF SECURITY AUTHENTICATION TOKENS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2010
|
Application #:
|
11614767
|
Filing Dt:
|
12/21/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
FLOATING GATE PROCESS METHODOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2010
|
Application #:
|
11614770
|
Filing Dt:
|
12/21/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
COPPER PROCESS METHODOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2011
|
Application #:
|
11614801
|
Filing Dt:
|
12/21/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
ZERO INTERFACE POLYSILICON TO POLYSILICON GATE FOR FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2014
|
Application #:
|
11614815
|
Filing Dt:
|
12/21/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
MEMORY SYSTEM WITH FIN FET TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2008
|
Application #:
|
11615280
|
Filing Dt:
|
12/22/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
NEGATIVE WORDLINE BIAS FOR REDUCTION OF LEAKAGE CURRENT DURING FLASH MEMORY OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/2010
|
Application #:
|
11615365
|
Filing Dt:
|
12/22/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
METHOD OF FORMING SPACED-APART CHARGE TRAPPING STACKS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2013
|
Application #:
|
11615489
|
Filing Dt:
|
12/22/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
FLASH MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/2009
|
Application #:
|
11615563
|
Filing Dt:
|
12/22/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
MEMORY DEVICE HAVING IMPLANTED OXIDE TO BLOCK ELECTRON DRIFT, AND METHOD OF MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
11615583
|
Filing Dt:
|
12/22/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT WAFER SYSTEM WITH CONTROL STRATEGY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2008
|
Application #:
|
11615710
|
Filing Dt:
|
12/22/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
REPETITIVE ERASE VERIFY TECHNIQUE FOR FLASH MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/2009
|
Application #:
|
11616045
|
Filing Dt:
|
12/26/2006
|
Publication #:
|
|
Pub Dt:
|
05/10/2007
| | | | |
Title:
|
SWITCHABLE MEMORY DIODE - A NEW MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2010
|
Application #:
|
11616085
|
Filing Dt:
|
12/26/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
MEMORY DEVICE ETCH METHODS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11616385
|
Filing Dt:
|
12/27/2006
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
PERSONAL DIGITAL RIGHTS MANAGEMENT AGENT-SERVER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2011
|
Application #:
|
11616544
|
Filing Dt:
|
12/27/2006
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
LOCAL INTERCONNECT HAVING INCREASED MISALIGNMENT TOLERANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/2010
|
Application #:
|
11616563
|
Filing Dt:
|
12/27/2006
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
METHOD FOR IMPROVED PLANARIZATION IN SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/2011
|
Application #:
|
11616718
|
Filing Dt:
|
12/27/2006
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
DUAL-BIT MEMORY DEVICE HAVING ISOLATION MATERIAL DISPOSED UNDERNEATH A BIT LINE SHARED BY ADJACENT DUAL-BIT MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2011
|
Application #:
|
11616779
|
Filing Dt:
|
12/27/2006
|
Title:
|
CIRCUIT FOR READING BUTTONS AND CONTROLLING LIGHT EMITTING DIODES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2012
|
Application #:
|
11625150
|
Filing Dt:
|
01/19/2007
|
Publication #:
|
|
Pub Dt:
|
07/24/2008
| | | | |
Title:
|
FULLY ASSOCIATIVE BANKING FOR MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2008
|
Application #:
|
11633791
|
Filing Dt:
|
12/05/2006
|
Title:
|
METHOD OF PROGRAMMING, ERASING AND READING MEMORY CELLS IN A RESISTIVE MEMORY ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2011
|
Application #:
|
11633800
|
Filing Dt:
|
12/05/2006
|
Publication #:
|
|
Pub Dt:
|
06/05/2008
| | | | |
Title:
|
METHODS OF PROGRAMMING AND ERASING RESISTIVE MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/10/2012
|
Application #:
|
11633844
|
Filing Dt:
|
12/05/2006
|
Publication #:
|
|
Pub Dt:
|
06/05/2008
| | | | |
Title:
|
GETTERING/STOP LAYER FOR PREVENTION OF REDUCTION OF INSULATING OXIDE IN METAL-INSULATOR-METAL DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/2009
|
Application #:
|
11633845
|
Filing Dt:
|
12/05/2006
|
Publication #:
|
|
Pub Dt:
|
06/05/2008
| | | | |
Title:
|
METHOD OF PROGRAMMING MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/03/2012
|
Application #:
|
11633929
|
Filing Dt:
|
12/05/2006
|
Publication #:
|
|
Pub Dt:
|
06/05/2008
| | | | |
Title:
|
DAMASCENE METAL-INSULATOR-METAL (MIM) DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2008
|
Application #:
|
11633930
|
Filing Dt:
|
12/05/2006
|
Publication #:
|
|
Pub Dt:
|
06/05/2008
| | | | |
Title:
|
TEST STRUCTURES FOR DEVELOPMENT OF METAL-INSULATOR-METAL (MIM) DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/2011
|
Application #:
|
11633940
|
Filing Dt:
|
12/05/2006
|
Publication #:
|
|
Pub Dt:
|
06/05/2008
| | | | |
Title:
|
METHOD OF PROGRAMMING, ERASING AND REPAIRING A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2011
|
Application #:
|
11633941
|
Filing Dt:
|
12/05/2006
|
Publication #:
|
|
Pub Dt:
|
06/05/2008
| | | | |
Title:
|
METHOD OF ERASING A RESISTIVE MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2008
|
Application #:
|
11633942
|
Filing Dt:
|
12/05/2006
|
Publication #:
|
|
Pub Dt:
|
06/05/2008
| | | | |
Title:
|
METHOD OF FABRICATING METAL-INSULATOR-METAL (MIM) DEVICE WITH STABLE DATA RETENTION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/2010
|
Application #:
|
11634776
|
Filing Dt:
|
12/06/2006
|
Publication #:
|
|
Pub Dt:
|
06/12/2008
| | | | |
Title:
|
METHOD TO PROVIDE A HIGHER REFERENCE VOLTAGE AT A LOWER POWER SUPPLY IN FLASH MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2015
|
Application #:
|
11634777
|
Filing Dt:
|
12/06/2006
|
Publication #:
|
|
Pub Dt:
|
06/12/2008
| | | | |
Title:
|
Barrier region underlying source/drain regions for dual-bit memory devices
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2014
|
Application #:
|
11636060
|
Filing Dt:
|
12/07/2006
|
Publication #:
|
|
Pub Dt:
|
06/12/2008
| | | | |
Title:
|
Preventing unintentional activation of a touch-sensor button caused by a presence of conductive liquid on the touch-sensor button
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2011
|
Application #:
|
11636064
|
Filing Dt:
|
12/06/2006
|
Publication #:
|
|
Pub Dt:
|
06/21/2007
| | | | |
Title:
|
SEMICONDUCTOR MANUFACTURING APPARATUS AND CONTROL SYSTEM AND CONTROL METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2008
|
Application #:
|
11636111
|
Filing Dt:
|
12/07/2006
|
Publication #:
|
|
Pub Dt:
|
08/02/2007
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND CONTROL METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2010
|
Application #:
|
11636116
|
Filing Dt:
|
12/06/2006
|
Publication #:
|
|
Pub Dt:
|
05/15/2008
| | | | |
Title:
|
REDUCTION OF TEMPERATURE DEPENDENCE OF A REFERENCE VOLTAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/2010
|
Application #:
|
11636347
|
Filing Dt:
|
12/06/2006
|
Publication #:
|
|
Pub Dt:
|
04/17/2008
| | | | |
Title:
|
OFFSET VOLTAGE CORRECTION FOR HIGH GAIN AMPLIFIER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2008
|
Application #:
|
11637260
|
Filing Dt:
|
12/11/2006
|
Publication #:
|
|
Pub Dt:
|
08/09/2007
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/2014
|
Application #:
|
11638338
|
Filing Dt:
|
12/12/2006
|
Title:
|
Host/client system having a scalable serial bus interface
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2008
|
Application #:
|
11639128
|
Filing Dt:
|
12/13/2006
|
Publication #:
|
|
Pub Dt:
|
08/09/2007
| | | | |
Title:
|
CONTROLLING A NONVOLATILE STORAGE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/2015
|
Application #:
|
11639666
|
Filing Dt:
|
12/15/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
METHOD FOR FABRICATING MEMORY CELLS HAVING SPLIT CHARGE STORAGE NODES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/16/2013
|
Application #:
|
11639683
|
Filing Dt:
|
12/15/2006
|
Title:
|
TABLE LOOKUP OPERATION ON MASKED DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2010
|
Application #:
|
11639935
|
Filing Dt:
|
12/15/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
METHODS AND SYSTEMS FOR MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2008
|
Application #:
|
11639936
|
Filing Dt:
|
12/15/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
DRAIN VOLTAGE REGULATOR
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11641506
|
Filing Dt:
|
12/19/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
Stress management in BGA packaging
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2011
|
Application #:
|
11641646
|
Filing Dt:
|
12/19/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
RESISTIVE MEMORY ARRAY USING P-I-N DIODE SELECT DEVICE AND METHODS OF FABRICATION THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2013
|
Application #:
|
11642025
|
Filing Dt:
|
12/18/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
TWO CIRCUIT BOARD TOUCH-SENSOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2008
|
Application #:
|
11642477
|
Filing Dt:
|
12/20/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
MEMORY DEVICE WITH ACTIVE LAYER OF DENDRIMERIC MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2009
|
Application #:
|
11643198
|
Filing Dt:
|
12/20/2006
|
Title:
|
INTEGRATED CIRCUIT DEVICE TEST SYSTEM AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2010
|
Application #:
|
11644073
|
Filing Dt:
|
12/22/2006
|
Title:
|
MEMORY CONTROLLER WITH VARIABLE ZONE SIZE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2011
|
Application #:
|
11644100
|
Filing Dt:
|
12/21/2006
|
Title:
|
DIFFERENTIAL-TO-SINGLE ENDED SIGNAL CONVERTER CIRCUIT AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2008
|
Application #:
|
11644196
|
Filing Dt:
|
12/22/2006
|
Publication #:
|
|
Pub Dt:
|
02/21/2008
| | | | |
Title:
|
NON-VOLATILE, STATIC RANDOM ACCESS MEMORY WITH REGULATED ERASE SATURATION AND PROGRAM WINDOW
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/2009
|
Application #:
|
11644447
|
Filing Dt:
|
12/22/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
METHOD AND APPARATUS TO CREATE AN ERASE DISTURB ON A NON-VOLATILE STATIC RANDOM ACCESS MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2011
|
Application #:
|
11644535
|
Filing Dt:
|
12/22/2006
|
Title:
|
REVERSE MIM CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/2009
|
Application #:
|
11644641
|
Filing Dt:
|
12/22/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
METHOD AND APPARATUS TO PROGRAM AND ERASE A NON-VOLATILE STATIC RANDOM ACCESS MEMORY FROM THE BIT LINES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2010
|
Application #:
|
11644789
|
Filing Dt:
|
12/22/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
COMBINATION SRAM AND NVSRAM SEMICONDUCTOR MEMORY ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2009
|
Application #:
|
11644819
|
Filing Dt:
|
12/22/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
METHOD AND APPARATUS TO PROGRAM BOTH SIDES OF A NON-VOLATILE STATIC RANDOM ACCESS MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2012
|
Application #:
|
11645071
|
Filing Dt:
|
12/21/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
FEEDBACK MECHANISM FOR USER DETECTION OF REFERENCE LOCATION ON A SENSING DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2011
|
Application #:
|
11645475
|
Filing Dt:
|
12/26/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
THIN OXIDE DUMMY TILING AS CHARGE PROTECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2010
|
Application #:
|
11646157
|
Filing Dt:
|
12/26/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
DEEP BITLINE IMPLANT TO AVOID PROGRAM DISTURB
|
|
|
Patent #:
|
|
Issue Dt:
|
05/04/2010
|
Application #:
|
11647017
|
Filing Dt:
|
12/27/2006
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
METHOD FOR ON CHIP SENSING OF SONOS VT WINDOW IN NON-VOLATILE STATIC RANDOM ACCESS MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2008
|
Application #:
|
11650485
|
Filing Dt:
|
01/08/2007
|
Publication #:
|
|
Pub Dt:
|
05/24/2007
| | | | |
Title:
|
LEVEL CONVERSION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2015
|
Application #:
|
11652785
|
Filing Dt:
|
01/11/2007
|
Title:
|
Shallow bipolar junction transistor
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2010
|
Application #:
|
11653532
|
Filing Dt:
|
01/16/2007
|
Publication #:
|
|
Pub Dt:
|
07/19/2007
| | | | |
Title:
|
HIGH VOLTAGE TOLERANT BIAS CIRCUIT WITH LOW VOLTAGE TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2010
|
Application #:
|
11653533
|
Filing Dt:
|
01/16/2007
|
Publication #:
|
|
Pub Dt:
|
07/19/2007
| | | | |
Title:
|
LOW POWER BETA MULTIPLIER START-UP CIRCUIT AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2010
|
Application #:
|
11653649
|
Filing Dt:
|
01/12/2007
|
Publication #:
|
|
Pub Dt:
|
07/17/2008
| | | | |
Title:
|
SELF-ALIGNED PATTERNING METHOD BY USING NON-CONFORMAL FILM AND ETCH BACK FOR FLASH MEMORY AND OTHER SEMICONDUCTOR APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
11654445
|
Filing Dt:
|
01/17/2007
|
Publication #:
|
|
Pub Dt:
|
07/19/2007
| | | | |
Title:
|
PULL-UP CIRCUIT FOR AN INPUT BUFFER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2009
|
Application #:
|
11654703
|
Filing Dt:
|
01/17/2007
|
Publication #:
|
|
Pub Dt:
|
07/17/2008
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2012
|
Application #:
|
11656072
|
Filing Dt:
|
01/22/2007
|
Title:
|
CAPACITOR TRIGGERED SILICON CONTROLLED RECTIFIER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2010
|
Application #:
|
11656437
|
Filing Dt:
|
01/23/2007
|
Publication #:
|
|
Pub Dt:
|
05/24/2007
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2009
|
Application #:
|
11656438
|
Filing Dt:
|
01/23/2007
|
Publication #:
|
|
Pub Dt:
|
05/24/2007
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/2010
|
Application #:
|
11687436
|
Filing Dt:
|
03/16/2007
|
Publication #:
|
|
Pub Dt:
|
09/18/2008
| | | | |
Title:
|
DIVISION-BASED SENSING AND PARTITIONING OF ELECTRONIC MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2010
|
Application #:
|
11687492
|
Filing Dt:
|
03/16/2007
|
Publication #:
|
|
Pub Dt:
|
09/18/2008
| | | | |
Title:
|
HIGH ACCURACY ADAPTIVE PROGRAMMING
|
|