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Reel/Frame:	035240/0429			Pages:	305
		Recorded:	03/21/2015
Attorney Dkt #:	391000/1502
Conveyance:	SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 4702
Page 9 of 48
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

Patent #:	6407641	Issue Dt:	06/18/2002	Application #:	09511019	Filing Dt:	02/23/2000
Title:	AUTO-LOCKING OSCILLATOR FOR DATA COMMUNICATIONS

Patent #:	6297705	Issue Dt:	10/02/2001	Application #:	09511020	Filing Dt:	02/23/2000
Title:	Circuit for locking an oscillator to a data stream

Patent #:	6343033	Issue Dt:	01/29/2002	Application #:	09511874	Filing Dt:	02/25/2000
Title:	Variable pulse width memory programming

Patent #:	6225849	Issue Dt:	05/01/2001	Application #:	09512617	Filing Dt:	02/25/2000
Title:	High speed, high precision, power supply and process independent boost level clamping technique

Patent #:	6205055	Issue Dt:	03/20/2001	Application #:	09512854	Filing Dt:	02/25/2000
Title:	Dynamic memory cell programming voltage

Patent #:	6376877	Issue Dt:	04/23/2002	Application #:	09513260	Filing Dt:	02/24/2000
Title:	DOUBLE SELF-ALIGNING SHALLOW TRENCH ISOLATION SEMICONDUCTOR AND MANUFACTURING METHOD THEREFOR

Patent #:	6448606	Issue Dt:	09/10/2002	Application #:	09513261	Filing Dt:	02/24/2000
Title:	SEMICONDUCTOR WITH INCREASED GATE COUPLING COEFFICIENT

Patent #:	6246611	Issue Dt:	06/12/2001	Application #:	09514560	Filing Dt:	02/28/2000
Title:	System for erasing a memory cell

Patent #:	6323734	Issue Dt:	11/27/2001	Application #:	09515549	Filing Dt:	02/29/2000
Title:	Trans-Impedance amplifier

Patent #:	6207978	Issue Dt:	03/27/2001	Application #:	09516472	Filing Dt:	03/01/2000
Title:	FLASH MEMORY CELLS HAVING A MODULATION DOPED HETEROJUNCTION STRUCTURE

Patent #:	6218810	Issue Dt:	04/17/2001	Application #:	09516785	Filing Dt:	03/01/2000
Title:	Output circuit and battery pack

Patent #:	6292403	Issue Dt:	09/18/2001	Application #:	09521190	Filing Dt:	03/07/2000
Title:	Circuit and method for implementing single-cycle read/write operation(s), and random access memory including the circuit and/or practicing the method

Patent #:	6429479	Issue Dt:	08/06/2002	Application #:	09522247	Filing Dt:	03/09/2000
Title:	NAND FLASH MEMORY WITH SPECIFIED GATE OXIDE THICKNESS

Patent #:	6285594	Issue Dt:	09/04/2001	Application #:	09523816	Filing Dt:	03/13/2000
Title:	Wordline voltage protection

Patent #:	6622201	Issue Dt:	09/16/2003	Application #:	09525078	Filing Dt:	03/14/2000
Title:	CHAINED ARRAY OF SEQUENTIAL ACCESS MEMORIES ENABLING CONTINUOUS READ

Patent #:	6320410	Issue Dt:	11/20/2001	Application #:	09525955	Filing Dt:	03/15/2000
Title:	Heterogeneous CPLD logic blocks

Patent #:	6240040	Issue Dt:	05/29/2001	Application #:	09526239	Filing Dt:	03/15/2000
Title:	Multiple bank simultaneous operation for a flash memory

Patent #:	6637017	Issue Dt:	10/21/2003	Application #:	09527715	Filing Dt:	03/17/2000
Title:	REAL TIME PROGRAMMABLE FEATURE CONTROL FOR PROGRAMMABLE LOGIC DEVICES

Patent #:	6567884	Issue Dt:	05/20/2003	Application #:	09531241	Filing Dt:	03/21/2000
Title:	ENDIAN-CONTROLLED COUNTER FOR SYNCHRONOUS PORTS WITH BUS MATCHING

Patent #:	6510483	Issue Dt:	01/21/2003	Application #:	09531365	Filing Dt:	03/21/2000
Title:	CIRCUIT, ARCHITECTURE AND METHOD FOR READING AN ADDRESS COUNTER AND/OR MATCHING A BUS WIDTH THROUGH ONE OR MORE SYNCHRONOUS PORTS

Patent #:	7103132	Issue Dt:	09/05/2006	Application #:	09531677	Filing Dt:	03/20/2000
Title:	PHASE COMPARATOR AND METHOD OF CONTROLLING POWER SAVING OPERATION OF THE SAME, AND SEMICONDUCTOR INTEGRATED CIRCUIT

Patent #:	6316293	Issue Dt:	11/13/2001	Application #:	09531749	Filing Dt:	03/20/2000
Title:	A METHOD OF FORMING A NAND -TYPE FLASH MEMORY DEVICE H AVING A NON-STACKED SELECT GATE TRANSISTOR STRUCTURE

Patent #:	6486506	Issue Dt:	11/26/2002	Application #:	09532293	Filing Dt:	03/23/2000
Title:	FLASH MEMORY WITH LESS SUSCEPTIBILITY TO CHARGE GAIN AND CHARGE LOSS

Patent #:	6526495	Issue Dt:	02/25/2003	Application #:	09532545	Filing Dt:	03/22/2000
Title:	MULTIPORT FIFO WITH PROGRAMMABLE WIDTH AND DEPTH

Patent #:	6388479	Issue Dt:	05/14/2002	Application #:	09532582	Filing Dt:	03/22/2000
Title:	Oscillator based power-on-reset circuit

Patent #:	6351017	Issue Dt:	02/26/2002	Application #:	09533057	Filing Dt:	03/22/2000
Title:	High voltage transistor with modified field implant mask

Patent #:	6635943	Issue Dt:	10/21/2003	Application #:	09533617	Filing Dt:	03/22/2000
Title:	METHOD AND SYSTEM FOR REDUCING CHARGE GAIN AND CHARGE LOSS IN INTERLAYER DIELECTRIC FORMATION

Patent #:	6563354	Issue Dt:	05/13/2003	Application #:	09533631	Filing Dt:	03/22/2000
Title:	ON-CHIP CIRCUIT TO COMPENSATE OUTPUT DRIVE STRENGTH ACROSS PROCESS CORNERS

Patent #:	6373302	Issue Dt:	04/16/2002	Application #:	09533740	Filing Dt:	03/23/2000
Title:	Phase alignment system

Patent #:	6362668	Issue Dt:	03/26/2002	Application #:	09534411	Filing Dt:	03/23/2000
Title:	Circuit and method for frequency generator control

Patent #:	6249466	Issue Dt:	06/19/2001	Application #:	09534412	Filing Dt:	03/23/2000
Title:	Row redundancy scheme

Patent #:	6368916	Issue Dt:	04/09/2002	Application #:	09534507	Filing Dt:	03/24/2000
Title:	METHOD FOR FABRICATING NONVOLATILE SEMICONDUCTOR MEMORY DEVICE

Patent #:	6353336	Issue Dt:	03/05/2002	Application #:	09534663	Filing Dt:	03/24/2000
Title:	Electrical ID method for output driver

Patent #:	6400642	Issue Dt:	06/04/2002	Application #:	09534671	Filing Dt:	03/24/2000
Title:	Memory architecture

Patent #:	6240031	Issue Dt:	05/29/2001	Application #:	09534760	Filing Dt:	03/24/2000
Title:	Memory architecture

Patent #:	6432618	Issue Dt:	08/13/2002	Application #:	09535255	Filing Dt:	03/23/2000
Title:	METHOD FOR FORMING HIGH QUALITY MULTIPLE THICKNESS OXIDE LAYERS BY REDUCING DESCUM INDUCED DEFECTS

Patent #:	6651181	Issue Dt:	11/18/2003	Application #:	09537376	Filing Dt:	03/29/2000
Title:	METHOD AND APPARATUS FOR USING A PHASE LOCK LOOP TO GENERATE OUTPUT STATUS AND CLOCKING SIGNALS IN RESPONSE TO INPUT CLOCKING, CONFIGURATION, AND FEEDBACK SIGNALS

Patent #:	6346466	Issue Dt:	02/12/2002	Application #:	09538168	Filing Dt:	03/30/2000
Title:	Planarization of a polysilicon layer surface by chemical mechanical polish to improve lithography and silicide formation

Patent #:	6509851	Issue Dt:	01/21/2003	Application #:	09538201	Filing Dt:	03/30/2000
Title:	METHOD FOR USING A RECOVERED DATA-ENCODED CLOCK TO CONVERT HIGH-FREQUENCY SERIAL DATA TO LOWER FREQUENCY PARALLEL DATA

Patent #:	6529083	Issue Dt:	03/04/2003	Application #:	09538523	Filing Dt:	03/30/2000
Publication #:	US20020047748	Pub Dt:	04/25/2002
Title:	CLOCK CONTROL CIRCUIT

Patent #:	6456170	Issue Dt:	09/24/2002	Application #:	09538720	Filing Dt:	03/30/2000
Title:	COMPARATOR AND VOLTAGE CONTROLLED OSCILLATOR CIRCUIT

Patent #:	6532524	Issue Dt:	03/11/2003	Application #:	09538822	Filing Dt:	03/30/2000
Title:	PORT PRIORITIZATION SCHEME

Patent #:	6306706	Issue Dt:	10/23/2001	Application #:	09538922	Filing Dt:	03/30/2000
Title:	Method and system for fabricating a flash memory array

Patent #:	6625765	Issue Dt:	09/23/2003	Application #:	09538989	Filing Dt:	03/30/2000
Title:	MEMORY BASED PHASE LOCKED LOOP

Patent #:	6448594	Issue Dt:	09/10/2002	Application #:	09539307	Filing Dt:	03/30/2000
Title:	METHOD AND SYSTEM FOR PROCESSING A SEMICONDUCTOR DEVICE

Patent #:	8183619	Issue Dt:	05/22/2012	Application #:	09539458	Filing Dt:	03/30/2000
Title:	METHOD AND SYSTEM FOR PROVIDING CONTACT TO A FIRST POLYSILICON LAYER IN A FLASH MEMORY DEVICE

Patent #:	6288948	Issue Dt:	09/11/2001	Application #:	09539903	Filing Dt:	03/31/2000
Title:	Wired address compare circuit and method

Patent #:	6608500	Issue Dt:	08/19/2003	Application #:	09539943	Filing Dt:	03/31/2000
Title:	I/O ARCHITECTURE/CELL DESIGN FOR PROGRAMMABLE LOGIC DEVICE

Patent #:	6384628	Issue Dt:	05/07/2002	Application #:	09540106	Filing Dt:	03/31/2000
Title:	Multiple voltage supply programmable logic device

Patent #:	6307437	Issue Dt:	10/23/2001	Application #:	09540107	Filing Dt:	03/31/2000
Title:	Mos Load, pole compensation

Patent #:	6377071	Issue Dt:	04/23/2002	Application #:	09540292	Filing Dt:	03/31/2000
Title:	COMPOSITE FLAG GENERATION FOR DDR FIFOS

Patent #:	6351146	Issue Dt:	02/26/2002	Application #:	09541320	Filing Dt:	04/01/2000
Title:	Multilevel circuit implementation for a tristate bus

Patent #:	6351139	Issue Dt:	02/26/2002	Application #:	09541322	Filing Dt:	04/01/2000
Title:	Configuration bit read/write data shift register

Patent #:	6525962	Issue Dt:	02/25/2003	Application #:	09543462	Filing Dt:	04/05/2000
Title:	HIGH CURRENT AND/OR HIGH SPEED ELECTRICALLY ERASABLE MEMORY CELL FOR PROGRAMMABLE LOGIC DEVICES

Patent #:	6530997	Issue Dt:	03/11/2003	Application #:	09543484	Filing Dt:	04/06/2000
Title:	USE OF GASEOUS SILICON HYDRIDES AS A REDUCING AGENT TO REMOVE RE-SPUTTERED SILICON OXIDE

Patent #:	6333675	Issue Dt:	12/25/2001	Application #:	09543893	Filing Dt:	04/06/2000
Title:	Variable gain amplifier with gain control voltage branch circuit

Patent #:	6232635	Issue Dt:	05/15/2001	Application #:	09543991	Filing Dt:	04/06/2000
Title:	New method to fabricate a high coupling flash cell with less silicide seam problem

Patent #:	6265931	Issue Dt:	07/24/2001	Application #:	09544962	Filing Dt:	04/07/2000
Title:	Voltage reference source for an overvoltage-tolerant bus interface

Patent #:	6406640	Issue Dt:	06/18/2002	Application #:	09546714	Filing Dt:	04/10/2000
Title:	PLASMA ETCHING METHOD

Patent #:	6208556	Issue Dt:	03/27/2001	Application #:	09547556	Filing Dt:	04/12/2000
Title:	Address transition detect timing architecture for a simultaneous operation flash memory device

Patent #:	6430087	Issue Dt:	08/06/2002	Application #:	09547660	Filing Dt:	04/12/2000
Title:	TRIMMING METHOD AND SYSTEM FOR WORDLINE BOOSTER TO MINIMIZE PROCESS VARIATION OF BOOSTED WORDLINE VOLTAGE

Patent #:	6269026	Issue Dt:	07/31/2001	Application #:	09547747	Filing Dt:	04/12/2000
Title:	Charge sharing to help boost the wordlines during apde verify

Patent #:	RE42114	Issue Dt:	02/08/2011	Application #:	09548213	Filing Dt:	04/12/2000
Title:	CONTROL SYSTEM FOR CHARGING BATTERIES AND ELECTRONIC APPARATUS USING SAME

Patent #:	6534411	Issue Dt:	03/18/2003	Application #:	09548616	Filing Dt:	04/13/2000
Title:	METHOD OF HIGH DENSITY PLASMA METAL ETCHING

Patent #:	6350627	Issue Dt:	02/26/2002	Application #:	09548741	Filing Dt:	04/13/2000
Title:	Interlevel dielectric thickness monitor for complex semiconductor chips

Patent #:	6629265	Issue Dt:	09/30/2003	Application #:	09550834	Filing Dt:	04/18/2000
Title:	RESET SCHEME FOR MICROCONTROLLERS

Patent #:	6682772	Issue Dt:	01/27/2004	Application #:	09556255	Filing Dt:	04/24/2000
Title:	HIGH TEMPERATURE DEPOSITION OF PT/TIOX FOR BOTTOM ELECTRODES

Patent #:	6194871	Issue Dt:	02/27/2001	Application #:	09556306	Filing Dt:	04/24/2000
Title:	Charge and discharge control circuit and apparatus for secondary battery

Patent #:	6347378	Issue Dt:	02/12/2002	Application #:	09556772	Filing Dt:	04/24/2000
Title:	Techniques and circuits for high yield improvements in programmable devices using redundant logic

Patent #:	6259645	Issue Dt:	07/10/2001	Application #:	09557728	Filing Dt:	04/26/2000
Title:	Matching loading between sensing reference and memory cell with reduced transistor count in a dual-bank flash memory

Patent #:	6222768	Issue Dt:	04/24/2001	Application #:	09557832	Filing Dt:	04/26/2000
Title:	Auto adjusting window placement scheme for an NROM virtual ground array

Patent #:	6201737	Issue Dt:	03/13/2001	Application #:	09558764	Filing Dt:	04/26/2000
Title:	Apparatus and method to characterize the threshold distribution in an nrom virtual ground array

Patent #:	6350665	Issue Dt:	02/26/2002	Application #:	09561292	Filing Dt:	04/28/2000
Title:	Semiconductor structure and method of making contacts and source and/or drain junctions in a semiconductor device

Patent #:	6232244	Issue Dt:	05/15/2001	Application #:	09562442	Filing Dt:	05/01/2000
Title:	Methodology for achieving dual gate oxide thicknesses

Patent #:	6610580	Issue Dt:	08/26/2003	Application #:	09563179	Filing Dt:	05/02/2000
Title:	FLASH MEMORY ARRAY AND A METHOD AND SYSTEM OF FABRICATION THEREOF

Patent #:	6445051	Issue Dt:	09/03/2002	Application #:	09563797	Filing Dt:	05/02/2000
Title:	METHOD AND SYSTEM FOR PROVIDING CONTACTS WITH GREATER TOLERANCE FOR MISALIGNMENT IN A FLASH MEMORY

Patent #:	6255180	Issue Dt:	07/03/2001	Application #:	09565292	Filing Dt:	05/01/2000
Title:	Semiconductor device with outwardly tapered sidewall spacers and method for forming same

Patent #:	6369609	Issue Dt:	04/09/2002	Application #:	09567455	Filing Dt:	05/08/2000
Title:	DEGENERATE NETWORK FOR PLD AND PLANE

Patent #:	6306758	Issue Dt:	10/23/2001	Application #:	09567534	Filing Dt:	05/10/2000
Title:	Multipurpose graded silicon oxynitride cap layer

Patent #:	6779061	Issue Dt:	08/17/2004	Application #:	09567681	Filing Dt:	05/09/2000
Title:	QUANTUM FIFO

Patent #:	7231374	Issue Dt:	06/12/2007	Application #:	09571826	Filing Dt:	05/16/2000
Title:	SCHEME FOR EVALUATING COSTS AND/OR BENEFITS OF MANUFACTURING TECHNOLOGIES

Patent #:	6892315	Issue Dt:	05/10/2005	Application #:	09577861	Filing Dt:	05/24/2000
Title:	ADJUSTABLE MICROCONTROLLER WAKE-UP SCHEME THAT CALIBRATES DURING AWAKE MODE THE VALUE INPUT TO PROGRAMMABLE DIVIDED DELAY TIMER

Patent #:	6678879	Issue Dt:	01/13/2004	Application #:	09585681	Filing Dt:	06/01/2000
Title:	METHOD AND APPARATUS FOR AUTOMATED DESIGN OF INTEGRATED CIRCUITS

Patent #:	6294460	Issue Dt:	09/25/2001	Application #:	09586254	Filing Dt:	05/31/2000
Title:	Semiconductor manufacturing method using a high extinction coefficient dielectric photomask

Patent #:	6348406	Issue Dt:	02/19/2002	Application #:	09586264	Filing Dt:	05/31/2000
Title:	Method for using a low dielectric constant layer as a semiconductor anti-reflective coating

Patent #:	6708190	Issue Dt:	03/16/2004	Application #:	09587708	Filing Dt:	06/05/2000
Title:	REDUCED PRODUCT TERM CARRY CHAIN

Patent #:	6376389	Issue Dt:	04/23/2002	Application #:	09588117	Filing Dt:	05/31/2000
Title:	METHOD FOR ELIMINATING ANTI-REFLECTIVE COATING IN SEMICONDUCTORS

Patent #:	6380067	Issue Dt:	04/30/2002	Application #:	09588119	Filing Dt:	05/31/2000
Title:	METHOD FOR CREATING PARTIALLY UV TRANSPARENT ANTI-REFLECTIVE COATING FOR SEMICONDUCTORS

Patent #:	6201726	Issue Dt:	03/13/2001	Application #:	09588153	Filing Dt:	06/05/2000
Title:	Ferroelectric memory device structure useful for preventing hydrogen line degradation

Patent #:	6687864	Issue Dt:	02/03/2004	Application #:	09589840	Filing Dt:	06/08/2000
Title:	MACRO-CELL FLIP-FLOP WITH SCAN-IN INPUT

Patent #:	6848068	Issue Dt:	01/25/2005	Application #:	09589919	Filing Dt:	06/07/2000
Title:	SOFT CODING OF MULTIPLE DEVICE IDS FOR IEEE COMPLIANT JTAG DEVICES

Patent #:	6839778	Issue Dt:	01/04/2005	Application #:	09590831	Filing Dt:	06/09/2000
Title:	SPEED POWER EFFICIENT USB METHOD

Patent #:	7964905	Issue Dt:	06/21/2011	Application #:	09591266	Filing Dt:	06/09/2000
Title:	ANTI-REFLECTIVE INTERPOLY DIELECTRIC

Patent #:	6671831	Issue Dt:	12/30/2003	Application #:	09592201	Filing Dt:	06/13/2000
Title:	FAULT TOLERANT USB METHOD AND APPARATUS

Patent #:	6625761	Issue Dt:	09/23/2003	Application #:	09592206	Filing Dt:	06/13/2000
Title:	FAULT TOLERANT USB METHOD AND APPARATUS

Patent #:	6907539	Issue Dt:	06/14/2005	Application #:	09592207	Filing Dt:	06/13/2000
Title:	CONFIGURABLE DATA SETUP/HOLD TIMING CIRCUIT WITH USER PROGRAMMABLE DELAY

Patent #:	6359824	Issue Dt:	03/19/2002	Application #:	09592474	Filing Dt:	06/09/2000
Title:	Activation of wordline decoders to transfer a high voltage supply

Patent #:	6675336	Issue Dt:	01/06/2004	Application #:	09592700	Filing Dt:	06/13/2000
Title:	DISTRIBUTED TEST ARCHITECTURE FOR MULTIPORT RAMS OR OTHER CIRCUITRY

Patent #:	6208561	Issue Dt:	03/27/2001	Application #:	09593303	Filing Dt:	06/13/2000
Title:	Method to reduce capactive loading in flash memory x-decoder for accurate voltage control at wordlines and select lines

100

Patent #:	6635566	Issue Dt:	10/21/2003	Application #:	09593967	Filing Dt:	06/15/2000
Title:	METHOD OF MAKING METALLIZATION AND CONTACT STRUCTURES IN AN INTEGRATED CIRCUIT

Assignors

CYPRESS SEMICONDUCTOR CORPORATION

Exec Dt:

03/12/2015

SPANSION LLC

Exec Dt:

03/12/2015

Assignee

MORGAN STANLEY SENIOR FUNDING, INC.

1585 BROADWAY

NEW YORK, NEW YORK 10036

Correspondence name and address
	SKADDEN, ARPS, SLATE, MEAGHER & FLOM LLP
	FOUR TIMES SQUARE
	KEN KUMAYAMA, ESQ.
	NEW YORK, NY 10036

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