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Reel/Frame:	042166/0431			Pages:	71
		Recorded:	04/05/2017
Conveyance:	SECURITY AGREEMENT

Total properties: 764
Page 2 of 8
Pages: 1 2 3 4 5 6 7 8

1

Patent #:	6934816	Issue Dt:	08/23/2005	Application #:	10025093	Filing Dt:	12/18/2001
Publication #:	US20030037208	Pub Dt:	02/20/2003
Title:	INTEGRATED CIRCUIT MEMORY DEVICES HAVING ASYNCHRONOUS FLOW-THROUGH CAPABILITY

2

Patent #:	6570405	Issue Dt:	05/27/2003	Application #:	10028746	Filing Dt:	12/20/2001
Title:	INTEGRATED OUTPUT DRIVER CIRCUITS HAVING CURRENT SOURCING AND CURRENT SINKING CHARACTERISTICS THAT INHIBIT POWER BOUNCE AND GROUND BOUNCE

3

Patent #:	7110266	Issue Dt:	09/19/2006	Application #:	10030379	Filing Dt:	01/02/2002
Title:	MULTIPLE ELEMENT RECTIFICATION CIRCUIT

4

Patent #:	6528842	Issue Dt:	03/04/2003	Application #:	10036326	Filing Dt:	12/31/2001
Title:	ELECTRONICALLY ERASABLE MEMORY CELL USING CMOS TECHNOLOGY

5

Patent #:	6894356	Issue Dt:	05/17/2005	Application #:	10099520	Filing Dt:	03/15/2002
Publication #:	US20030173625	Pub Dt:	09/18/2003
Title:	SRAM SYSTEM HAVING VERY LIGHTLY DOPED SRAM LOAD TRANSISTORS FOR IMPROVING SRAM CELL STABILITY AND METHOD FOR MAKING THE SAME

6

Patent #:	7197138	Issue Dt:	03/27/2007	Application #:	10116728	Filing Dt:	04/03/2002
Publication #:	US20020154763	Pub Dt:	10/24/2002
Title:	PROGRAMMABLE DEVICE AND METHODS FOR DISABLING A RING SIGNAL IN RESPONSE TO A DETECTED OFF-HOOK CONDITION

7

Patent #:	7110400	Issue Dt:	09/19/2006	Application #:	10120648	Filing Dt:	04/10/2002
Publication #:	US20030193927	Pub Dt:	10/16/2003
Title:	RANDOM ACCESS MEMORY ARCHITECTURE AND SERIAL INTERFACE WITH CONTINUOUS PACKET HANDLING CAPABILITY

8

Patent #:	6736946	Issue Dt:	05/18/2004	Application #:	10183924	Filing Dt:	06/25/2002
Publication #:	US20020166762	Pub Dt:	11/14/2002
Title:	PHYSICAL VAPOR DEPOSITION APPARATUS WITH MODIFIED SHUTTER DISK AND COVER RING

9

Patent #:	7257115	Issue Dt:	08/14/2007	Application #:	10205177	Filing Dt:	07/25/2002
Publication #:	US20040017697	Pub Dt:	01/29/2004
Title:	DATA MEMORY ADDRESS GENERATION FOR TIME-SLOT INTERCHANGE SWITCHES

10

Patent #:	6797456	Issue Dt:	09/28/2004	Application #:	10211493	Filing Dt:	08/01/2002
Title:	DUAL-LAYER DEEP ULTRAVIOLET PHOTORESIST PROCESS AND STRUCTURE

11

Patent #:	6583992	Issue Dt:	06/24/2003	Application #:	10222167	Filing Dt:	08/16/2002
Publication #:	US20030007372	Pub Dt:	01/09/2003
Title:	HIGH FREQUENCY POWER SYSTEM AND RELATED METHODS

12

Patent #:	6791197	Issue Dt:	09/14/2004	Application #:	10227772	Filing Dt:	08/26/2002
Title:	REDUCING LAYER SEPARATION AND CRACKING IN SEMICONDUCTOR DEVICES

13

Patent #:	6686221	Issue Dt:	02/03/2004	Application #:	10231636	Filing Dt:	08/29/2002
Title:	METHOD FOR FORMING PACKAGED SEMICONDUCTOR DEVICE HAVING STACKED DIE

14

Patent #:	6650156	Issue Dt:	11/18/2003	Application #:	10232203	Filing Dt:	08/29/2002
Title:	INTEGRATED CIRCUIT CHARGE PUMPS HAVING CONTROL CIRCUITS THEREIN THAT INHIBIT PARASITIC CHARGE INJECTION FROM CONTROL SIGNALS

15

Patent #:	6733936	Issue Dt:	05/11/2004	Application #:	10247877	Filing Dt:	09/19/2002
Title:	METHOD FOR GENERATING A SWING CURVE AND PHOTORESIST FEATURE FORMED USING SWING CURVE

16

Patent #:	6791155	Issue Dt:	09/14/2004	Application #:	10251550	Filing Dt:	09/20/2002
Title:	STRESS-RELIEVED SHALLOW TRENCH ISOLATION (STI) STRUCTURE AND METHOD FOR FORMING THE SAME

17

Patent #:	6731231	Issue Dt:	05/04/2004	Application #:	10261843	Filing Dt:	09/30/2002
Publication #:	US20030076253	Pub Dt:	04/24/2003
Title:	ANALOGUE TO DIGITAL CONVERTER

18

Patent #:	6913872	Issue Dt:	07/05/2005	Application #:	10262301	Filing Dt:	09/30/2002
Title:	DUAL-WAVELENGTH EXPOSURE FOR REDUCTION OF IMPLANT SHADOWING

19

Patent #:	6798039	Issue Dt:	09/28/2004	Application #:	10274590	Filing Dt:	10/21/2002
Title:	INTEGRATED CIRCUIT INDUCTORS HAVING HIGH QUALITY FACTORS

20

Patent #:	7102862	Issue Dt:	09/05/2006	Application #:	10283532	Filing Dt:	10/29/2002
Title:	ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT

21

Patent #:	6975527	Issue Dt:	12/13/2005	Application #:	10293176	Filing Dt:	11/12/2002
Title:	MEMORY DEVICE LAYOUT

22

Patent #:	6754777	Issue Dt:	06/22/2004	Application #:	10307638	Filing Dt:	12/02/2002
Title:	FIFO MEMORY DEVICES AND METHODS OF OPERATING FIFO MEMORY DEVICES HAVING MULTI-PORT CACHE MEMORY DEVICES THEREIN

23

Patent #:	7266128	Issue Dt:	09/04/2007	Application #:	10314032	Filing Dt:	12/06/2002
Title:	TIME-SLOT INTERCHANGE SWITCHES HAVING EFFICIENT BLOCK PROGRAMMING AND ON-CHIP BYPASS CAPABILITIES AND METHODS OF OPERATING SAME

24

Patent #:	6861751	Issue Dt:	03/01/2005	Application #:	10315573	Filing Dt:	12/09/2002
Publication #:	US20040110346	Pub Dt:	06/10/2004
Title:	ETCH STOP LAYER FOR USE IN A SELF-ALIGNED CONTACT ETCH

25

Patent #:	6846751	Issue Dt:	01/25/2005	Application #:	10318989	Filing Dt:	12/13/2002
Publication #:	US20040113182	Pub Dt:	06/17/2004
Title:	NITROGEN IMPLEMENTATION TO MINIMIZE DEVICE VARIATION

26

Patent #:	7260093	Issue Dt:	08/21/2007	Application #:	10324549	Filing Dt:	12/20/2002
Title:	TIME-SLOT INTERCHANGE SWITCHES HAVING GROUP-BASED OUTPUT DRIVE ENABLE CONTROL AND GROUP-BASED RATE MATCHING AND OUTPUT ENABLE INDICATION CAPABILITY

27

Patent #:	7120655	Issue Dt:	10/10/2006	Application #:	10351591	Filing Dt:	01/27/2003
Publication #:	US20030200241	Pub Dt:	10/23/2003
Title:	DIGITAL FILTER

28

Patent #:	6954113	Issue Dt:	10/11/2005	Application #:	10367766	Filing Dt:	02/19/2003
Publication #:	US20030122630	Pub Dt:	07/03/2003
Title:	PROGRAMMABLE OSCILLATOR CIRCUIT

29

Patent #:	6686727	Issue Dt:	02/03/2004	Application #:	10409899	Filing Dt:	04/08/2003
Publication #:	US20030218449	Pub Dt:	11/27/2003
Title:	METHOD FOR POWER CONVERSION USING COMBINING TRANSFORMER

30

Patent #:	7350202	Issue Dt:	03/25/2008	Application #:	10423954	Filing Dt:	04/28/2003
Publication #:	US20040015673	Pub Dt:	01/22/2004
Title:	METHOD FOR RE-PROGRAMMING A FIRMWARE STATE MACHINE DURING EXECUTION

31

Patent #:	6778454	Issue Dt:	08/17/2004	Application #:	10459224	Filing Dt:	06/11/2003
Publication #:	US20030206475	Pub Dt:	11/06/2003
Title:	FIFO MEMORY DEVICES THAT SUPPORT ALL COMBINATIONS OF DDR AND SDR READ AND WRITE MODES

32

Patent #:	7330145	Issue Dt:	02/12/2008	Application #:	10576555	Filing Dt:	04/19/2006
Publication #:	US20070132629	Pub Dt:	06/14/2007
Title:	DUAL RESIDUE PIPELINED ANALOG-TO-DIGITAL CONVERTER

33

Patent #:	7656243	Issue Dt:	02/02/2010	Application #:	10593354	Filing Dt:	05/15/2007
Publication #:	US20080018407	Pub Dt:	01/24/2008
Title:	MONOLITHIC CLOCK GENERATOR AND TIMING/FREQUENCY REFERENCE

34

Patent #:	6791848	Issue Dt:	09/14/2004	Application #:	10603107	Filing Dt:	06/23/2003
Publication #:	US20040085790	Pub Dt:	05/06/2004
Title:	AUTOBIAS DRIVING A HIGH FREQUENCY POWER SYSTEM

35

Patent #:	6882195	Issue Dt:	04/19/2005	Application #:	10608747	Filing Dt:	06/27/2003
Publication #:	US20040008065	Pub Dt:	01/15/2004
Title:	SIGNAL TIMING ADJUSTMENT CIRCUIT WITH EXTERNAL RESISTOR

36

Patent #:	7093047	Issue Dt:	08/15/2006	Application #:	10613246	Filing Dt:	07/03/2003
Publication #:	US20050005069	Pub Dt:	01/06/2005
Title:	INTEGRATED CIRCUIT MEMORY DEVICES HAVING CLOCK SIGNAL ARBITRATION CIRCUITS THEREIN AND METHODS OF PERFORMING CLOCK SIGNAL ARBITRATION

37

Patent #:	6894529	Issue Dt:	05/17/2005	Application #:	10616272	Filing Dt:	07/09/2003
Title:	IMPEDANCE-MATCHED OUTPUT DRIVER CIRCUITS HAVING LINEAR CHARACTERISTICS AND ENHANCED COARSE AND FINE TUNING CONTROL

38

Patent #:	7336780	Issue Dt:	02/26/2008	Application #:	10630924	Filing Dt:	07/31/2003
Publication #:	US20040136519	Pub Dt:	07/15/2004
Title:	DIFFERENTIAL SIGNALING TRANSMISSION CIRCUIT

39

Patent #:	6861366	Issue Dt:	03/01/2005	Application #:	10649123	Filing Dt:	08/27/2003
Title:	PACKAGED SEMICONDUCTOR DEVICE HAVING STACKED DIE

40

Patent #:	7046093	Issue Dt:	05/16/2006	Application #:	10649493	Filing Dt:	08/27/2003
Title:	DYNAMIC PHASE-LOCKED LOOP CIRCUITS AND METHODS OF OPERATION THEREOF

41

Patent #:	6867627	Issue Dt:	03/15/2005	Application #:	10663624	Filing Dt:	09/16/2003
Title:	DELAY-LOCKED LOOP (DLL) INTEGRATED CIRCUITS HAVING HIGH BANDWIDTH AND RELIABLE LOCKING CHARACTERISTICS

42

Patent #:	7046058	Issue Dt:	05/16/2006	Application #:	10671305	Filing Dt:	09/24/2003
Title:	DELAYED-LOCKED LOOP WITH FINE AND COARSE CONTROL USING CASCADED PHASE INTERPOLATOR AND VARIABLE DELAY CIRCUIT

43

Patent #:	7275188	Issue Dt:	09/25/2007	Application #:	10683205	Filing Dt:	10/10/2003
Title:	METHOD AND APPARATUS FOR BURN-IN OF SEMICONDUCTOR DEVICES

44

Patent #:	6930400	Issue Dt:	08/16/2005	Application #:	10689946	Filing Dt:	10/21/2003
Title:	GRID ARRAY MICROELECTRONIC PACKAGES WITH INCREASED PERIPHERY

45

Patent #:	7646968	Issue Dt:	01/12/2010	Application #:	10706014	Filing Dt:	11/12/2003
Title:	END-USER CONFIGURABLE DIGITAL VERSATILE DISK MENUS AND METHODS FOR GENERATING THE SAME

46

Patent #:	7209983	Issue Dt:	04/24/2007	Application #:	10721974	Filing Dt:	11/24/2003
Publication #:	US20050005082	Pub Dt:	01/06/2005
Title:	SEQUENTIAL FLOW-CONTROL AND FIFO MEMORY DEVICES THAT ARE DEPTH EXPANDABLE IN STANDARD MODE OPERATION

47

Patent #:	6967501	Issue Dt:	11/22/2005	Application #:	10739467	Filing Dt:	12/18/2003
Title:	IMPEDANCE-MATCHED OUTPUT DRIVER CIRCUITS HAVING ENHANCED PREDRIVER CONTROL

48

Patent #:	6924683	Issue Dt:	08/02/2005	Application #:	10741761	Filing Dt:	12/19/2003
Title:	EDGE ACCELERATED SENSE AMPLIFIER FLIP-FLOP WITH HIGH FANOUT DRIVE CAPABILITY

49

Patent #:	7126389	Issue Dt:	10/24/2006	Application #:	10765370	Filing Dt:	01/27/2004
Title:	METHOD AND APPARATUS FOR AN OUTPUT BUFFER WITH DYNAMIC IMPEDANCE CONTROL

50

Patent #:	7296109	Issue Dt:	11/13/2007	Application #:	10767001	Filing Dt:	01/29/2004
Title:	BUFFER BYPASS CIRCUIT FOR REDUCING LATENCY IN INFORMATION TRANSFERS TO A BUS

51

Patent #:	7167997	Issue Dt:	01/23/2007	Application #:	10767964	Filing Dt:	01/29/2004
Title:	APPARATUS AND METHOD FOR LIMITING DATA TRANSMISSION RATES

52

Patent #:	7349752	Issue Dt:	03/25/2008	Application #:	10773665	Filing Dt:	02/06/2004
Title:	DYNAMICALLY COUPLED METROLOGY AND LITHOGRAPHY

53

Patent #:	7125775	Issue Dt:	10/24/2006	Application #:	10805124	Filing Dt:	03/18/2004
Title:	METHOD FOR FORMING HYBRID DEVICE GATES

54

Patent #:	7235336	Issue Dt:	06/26/2007	Application #:	10808806	Filing Dt:	03/25/2004
Title:	METHOD FOR DETERMINING PHOTORESIST THICKNESS AND STRUCTURE FORMED USING DETERMINED PHOTORESIST THICKNESS

55

Patent #:	7067364	Issue Dt:	06/27/2006	Application #:	10808951	Filing Dt:	03/25/2004
Title:	GATE STRUCTURES HAVING SIDEWALL SPACERS USING SELECTIVE DEPOSITION AND METHOD OF FORMING THE SAME

56

Patent #:	6874064	Issue Dt:	03/29/2005	Application #:	10818018	Filing Dt:	04/05/2004
Publication #:	US20040193805	Pub Dt:	09/30/2004
Title:	FIFO MEMORY DEVICES HAVING MULTI-PORT CACHE AND EXTENDED CAPACITY MEMORY DEVICES THEREIN WITH RETRANSMIT CAPABILITY

57

Patent #:	7071767	Issue Dt:	07/04/2006	Application #:	10832986	Filing Dt:	04/26/2004
Publication #:	US20050035814	Pub Dt:	02/17/2005
Title:	PRECISE VOLTAGE/CURRENT REFERENCE CIRCUIT USING CURRENT-MODE TECHNIQUE IN CMOS TECHNOLOGY

58

Patent #:	7109583	Issue Dt:	09/19/2006	Application #:	10841764	Filing Dt:	05/06/2004
Publication #:	US20050248031	Pub Dt:	11/10/2005
Title:	MOUNTING WITH AUXILIARY BUMPS

59

Patent #:	6965272	Issue Dt:	11/15/2005	Application #:	10843346	Filing Dt:	05/12/2004
Publication #:	US20040239433	Pub Dt:	12/02/2004
Title:	WORLDWIDE MARKETING LOGISTICS NETWORK INCLUDING STRATEGICALLY LOCATED CENTERS FOR FREQUENCY PROGRAMMING CRYSTAL OSCILLATORS TO CUSTOMER SPECIFICATION

60

Patent #:	7587131	Issue Dt:	09/08/2009	Application #:	10856436	Filing Dt:	05/28/2004
Title:	AUDIO CLOCKING IN VIDEO APPLICATIONS

61

Patent #:	7940662	Issue Dt:	05/10/2011	Application #:	10861897	Filing Dt:	06/04/2004
Publication #:	US20050226243	Pub Dt:	10/13/2005
Title:	METHOD AND APPARATUS FOR FORWARDING BURSTY DATA

62

Patent #:	7163881	Issue Dt:	01/16/2007	Application #:	10863533	Filing Dt:	06/08/2004
Title:	METHOD FOR FORMING CMOS STRUCTURE WITH VOID-FREE DIELECTRIC FILM

63

Patent #:	7176104	Issue Dt:	02/13/2007	Application #:	10863540	Filing Dt:	06/08/2004
Title:	METHOD FOR FORMING SHALLOW TRENCH ISOLATION STRUCTURE WITH DEEP OXIDE REGION

64

Patent #:	7613615	Issue Dt:	11/03/2009	Application #:	10871287	Filing Dt:	06/17/2004
Title:	CIRCUITS, SYSTEMS, AND METHODS FOR REAL-TIME DE-SHUFFLING OF SHUFFLED AUDIO DATA

65

Patent #:	7098114	Issue Dt:	08/29/2006	Application #:	10874980	Filing Dt:	06/22/2004
Title:	METHOD FOR FORMING CMOS DEVICE WITH SELF-ALIGNED CONTACTS AND REGION FORMED USING SALICIDE PROCESS

66

Patent #:	7120075	Issue Dt:	10/10/2006	Application #:	10876339	Filing Dt:	06/24/2004
Title:	MULTI-FIFO INTEGRATED CIRCUIT DEVICES THAT SUPPORT MULTI-QUEUE OPERATING MODES WITH ENHANCED WRITE PATH AND READ PATH QUEUE SWITCHING

67

Patent #:	7109760	Issue Dt:	09/19/2006	Application #:	10880804	Filing Dt:	06/30/2004
Title:	DELAY-LOCKED LOOP (DLL) INTEGRATED CIRCUITS THAT SUPPORT EFFICIENT PHASE LOCKING OF CLOCK SIGNALS HAVING NON-UNITY DUTY CYCLES

68

Patent #:	7082071	Issue Dt:	07/25/2006	Application #:	10881022	Filing Dt:	06/30/2004
Publication #:	US20050018514	Pub Dt:	01/27/2005
Title:	INTEGRATED DDR/SDR FLOW CONTROL MANAGERS THAT SUPPORT MULTIPLE QUEUES AND MUX, DEMUX AND BROADCAST OPERATING MODES

69

Patent #:	7158440	Issue Dt:	01/02/2007	Application #:	10881985	Filing Dt:	06/30/2004
Publication #:	US20050041450	Pub Dt:	02/24/2005
Title:	FIFO MEMORY DEVICES HAVING WRITE AND READ CONTROL CIRCUITS THAT SUPPORT X4N, X2N AND XN DATA WIDTHS DURING DDR AND SDR MODES OF OPERATION

70

Patent #:	7276988	Issue Dt:	10/02/2007	Application #:	10882885	Filing Dt:	06/30/2004
Publication #:	US20060001503	Pub Dt:	01/05/2006
Title:	MULTI-SUBTRATE MICROSTRIP TO WAVEGUIDE TRANSITION

71

Patent #:	7348666	Issue Dt:	03/25/2008	Application #:	10883356	Filing Dt:	06/30/2004
Publication #:	US20060001154	Pub Dt:	01/05/2006
Title:	CHIP-TO-CHIP TRENCH CIRCUIT STRUCTURE

72

Patent #:	7145414	Issue Dt:	12/05/2006	Application #:	10883401	Filing Dt:	06/30/2004
Publication #:	US20050030120	Pub Dt:	02/10/2005
Title:	TRANSMISSION LINE ORIENTATION TRANSITION

73

Patent #:	7119591	Issue Dt:	10/10/2006	Application #:	10891919	Filing Dt:	07/15/2004
Title:	DELAY-LOCKED LOOP (DLL) INTEGRATED CIRCUITS HAVING BINARY-WEIGHTED DELAY CHAIN UNITS WITH BUILT-IN PHASE COMPARATORS THAT SUPPORT EFFICIENT PHASE LOCKING

74

Patent #:	7015116	Issue Dt:	03/21/2006	Application #:	10897601	Filing Dt:	07/23/2004
Title:	STRESS-RELIEVED SHALLOW TRENCH ISOLATION (STI) STRUCTURE AND METHOD FOR FORMING THE SAME

75

Patent #:	7246300	Issue Dt:	07/17/2007	Application #:	10912938	Filing Dt:	08/06/2004
Title:	SEQUENTIAL FLOW-CONTROL AND FIFO MEMORY DEVICES HAVING ERROR DETECTION AND CORRECTION CAPABILITY WITH DIAGNOSTIC BIT GENERATION

76

Patent #:	7079446	Issue Dt:	07/18/2006	Application #:	10916901	Filing Dt:	08/12/2004
Publication #:	US20050259504	Pub Dt:	11/24/2005
Title:	DRAM INTERFACE CIRCUITS HAVING ENHANCED SKEW, SLEW RATE AND IMPEDANCE CONTROL

77

Patent #:	7419748	Issue Dt:	09/02/2008	Application #:	10925606	Filing Dt:	08/24/2004
Title:	PHOTOMASK WITH REDUCED ELECROSTATIC DISCHARGE DEFECTS

78

Patent #:	7119633	Issue Dt:	10/10/2006	Application #:	10925684	Filing Dt:	08/24/2004
Publication #:	US20060044073	Pub Dt:	03/02/2006
Title:	COMPENSATED INTERDIGITATED COUPLER

79

Patent #:	7580355	Issue Dt:	08/25/2009	Application #:	10926795	Filing Dt:	08/25/2004
Publication #:	US20050147034	Pub Dt:	07/07/2005
Title:	METHOD OF PERFORMING WEIGHTED ROUND-ROBIN QUEUE SCHEDULING USING A DYNAMIC LINK LIST AND STRUCTURE FOR IMPLEMENTING SAME

80

Patent #:	7042792	Issue Dt:	05/09/2006	Application #:	10930966	Filing Dt:	08/31/2004
Publication #:	US20050152204	Pub Dt:	07/14/2005
Title:	MULTI-PORT MEMORY CELLS FOR USE IN FIFO APPLICATIONS THAT SUPPORT DATA TRANSFERS BETWEEN CACHE AND SUPPLEMENTAL MEMORY ARRAYS

81

Patent #:	7092479	Issue Dt:	08/15/2006	Application #:	10931699	Filing Dt:	09/01/2004
Title:	RIPPLE COUNTER CIRCUITS IN INTEGRATED CIRCUIT DEVICES HAVING FAST TERMINAL COUNT CAPABILITY AND METHODS OF OPERATING THE SAME

82

Patent #:	7162673	Issue Dt:	01/09/2007	Application #:	10933772	Filing Dt:	09/03/2004
Publication #:	US20050108604	Pub Dt:	05/19/2005
Title:	SCAN CHAIN REGISTERS THAT UTILIZE FEEDBACK PATHS WITHIN LATCH UNITS TO SUPPORT TOGGLING OF LATCH UNIT OUTPUTS DURING ENHANCED DELAY FAULT TESTING

83

Patent #:	7110321	Issue Dt:	09/19/2006	Application #:	10935518	Filing Dt:	09/07/2004
Title:	MULTI-BANK INTEGRATED CIRCUIT MEMORY DEVICES HAVING HIGH-SPEED MEMORY ACCESS TIMING

84

Patent #:	7478186	Issue Dt:	01/13/2009	Application #:	10939536	Filing Dt:	09/13/2004
Title:	INTERRUPT COALESCER FOR DMA CHANNEL

85

Patent #:	7634774	Issue Dt:	12/15/2009	Application #:	10940201	Filing Dt:	09/13/2004
Publication #:	US20060059485	Pub Dt:	03/16/2006
Title:	SYSTEM AND METHOD OF SCHEDULING COMPUTING THREADS

86

Patent #:	6961251	Issue Dt:	11/01/2005	Application #:	10940870	Filing Dt:	09/13/2004
Publication #:	US20050036338	Pub Dt:	02/17/2005
Title:	WAVEFORM INDEPENDENT HIGH FREQUENCY POWER SYSTEM

87

Patent #:	7974523	Issue Dt:	07/05/2011	Application #:	10948745	Filing Dt:	09/24/2004
Publication #:	US20060008248	Pub Dt:	01/12/2006
Title:	OPTIMAL BUFFERING AND SCHEDULING STRATEGY FOR SMOOTH REVERSE IN A DVD PLAYER OR THE LIKE

88

Patent #:	7391468	Issue Dt:	06/24/2008	Application #:	10948791	Filing Dt:	09/24/2004
Publication #:	US20060007305	Pub Dt:	01/12/2006
Title:	TELECINE CONVERSION DETECTION FOR PROGRESSIVE SCAN PLAYBACK

89

Patent #:	7327367	Issue Dt:	02/05/2008	Application #:	10953866	Filing Dt:	09/29/2004
Publication #:	US20050177787	Pub Dt:	08/11/2005
Title:	METHOD AND APPARATUS FOR FONT PROCESSING

90

Patent #:	7166905	Issue Dt:	01/23/2007	Application #:	10958697	Filing Dt:	10/05/2004
Title:	STACKED PADDLE MICRO LEADFRAME PACKAGE

91

Patent #:	7037774	Issue Dt:	05/02/2006	Application #:	10970074	Filing Dt:	10/21/2004
Title:	SELF-ALIGNED CONTACT STRUCTURE AND PROCESS FOR FORMING SELF-ALIGNED CONTACT STRUCTURE

92

Patent #:	7308596	Issue Dt:	12/11/2007	Application #:	10975219	Filing Dt:	10/27/2004
Title:	CONTROLLING A CLOCK DIVIDER BY SELECTING A PRESET VALUE

93

Patent #:	7544556	Issue Dt:	06/09/2009	Application #:	10986636	Filing Dt:	11/12/2004
Title:	PROCESS FOR FORMING CMOS DEVICES USING REMOVABLE SPACERS

94

Patent #:	7392924	Issue Dt:	07/01/2008	Application #:	10990123	Filing Dt:	11/16/2004
Publication #:	US20050279813	Pub Dt:	12/22/2005
Title:	AUTOMATED BALL MOUNTING SYSTEM WITH SOLDER BALL TESTING

95

Patent #:	7388262	Issue Dt:	06/17/2008	Application #:	10991043	Filing Dt:	11/16/2004
Publication #:	US20050093109	Pub Dt:	05/05/2005
Title:	NITROGEN IMPLEMENTATION TO MINIMIZE DEVICE VARIATION

96

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Publication #:	US20060106989	Pub Dt:	05/18/2006
Title:	SYSTEMS AND METHODS FOR MONITORING AND CONTROLLING BINARY STATE DEVICES USING A MEMORY DEVICE

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Patent #:	7443747	Issue Dt:	10/28/2008	Application #:	10997708	Filing Dt:	11/23/2004
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Title:	MEMORY ARRAY BIT LINE COUPLING CAPACITOR CANCELLATION

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Patent #:	7224195	Issue Dt:	05/29/2007	Application #:	11009434	Filing Dt:	12/09/2004
Publication #:	US20050184768	Pub Dt:	08/25/2005
Title:	OUTPUT DRIVE CIRCUIT THAT ACCOMMODATES VARIABLE SUPPLY VOLTAGES

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Patent #:	7827555	Issue Dt:	11/02/2010	Application #:	11036938	Filing Dt:	01/14/2005
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Title:	SCHEDULER FOR A MULTIPROCESSING COMPUTING SYSTEM

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Patent #:	7327044	Issue Dt:	02/05/2008	Application #:	11038275	Filing Dt:	01/21/2005
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Title:	INTEGRATED CIRCUIT PACKAGE ENCAPSULATING A HERMETICALLY SEALED DEVICE

Assignors

1

INTEGRATED DEVICE TECHNOLOGY, INC.

Exec Dt:

04/04/2017

2

Exec Dt:

04/04/2017

3

MAGNUM SEMICONDUCTOR, INC.

Exec Dt:

04/04/2017

4

ENDWAVE CORPORATION

Exec Dt:

04/04/2017

5

CHIPX, INCORPORATED

Exec Dt:

04/04/2017

Assignee

1

JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT

MAIL CODE NY1-C413, 4 CMC

BROOKLYN, NEW YORK 11245-0001

Correspondence name and address
	CT CORPORATION SYSTEM
	4400 EASTON COMMONS WAY
	SUITE 125
	COLUMBUS, OH 43219

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