Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 023282/0431 | |
| Pages: | 5 |
| | Recorded: | 09/25/2009 | | |
| Attorney Dkt #: | C1309/10001 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
13
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Patent #:
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Issue Dt:
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09/22/1998
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Application #:
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08895305
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Filing Dt:
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07/16/1997
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Title:
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NESTED LOOP METHOD OF IDENTIFYING SYNCHRONOUS MEMORIES
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Patent #:
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Issue Dt:
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11/30/1999
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Application #:
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08895307
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Filing Dt:
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07/16/1997
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Title:
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SYNCHRONOUS MEMORY TEST SYSTEM
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Patent #:
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Issue Dt:
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01/30/2001
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Application #:
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08895550
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Filing Dt:
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07/16/1997
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Title:
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METHOD AND SYSTEM FOR AUTOMATIC SYNCHRONOUS MEMORY IDENTIFICATION
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Patent #:
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Issue Dt:
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09/21/1999
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Application #:
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09032958
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Filing Dt:
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03/02/1998
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Title:
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CONTACT TEST METHOD AND SYSTEM FOR MEMORY TESTERS
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Patent #:
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Issue Dt:
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05/23/2000
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Application #:
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09032968
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Filing Dt:
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03/02/1998
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Title:
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PROGRAMMABLE PULSE GENERATOR
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Patent #:
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Issue Dt:
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12/28/1999
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Application #:
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09033285
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Filing Dt:
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03/02/1998
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Title:
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PARAMETRIC TEST SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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05/16/2000
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Application #:
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09033364
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Filing Dt:
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03/02/1998
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Title:
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TESTER SYSTEMS
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Patent #:
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Issue Dt:
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06/15/1999
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Application #:
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09115001
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Filing Dt:
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07/14/1998
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Title:
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SYNCHRONOUS MEMORY TEST METHOD
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Patent #:
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Issue Dt:
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06/22/1999
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Application #:
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09115386
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Filing Dt:
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07/14/1998
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Title:
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SYNCHRONOUS MEMORY TESTER
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Patent #:
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Issue Dt:
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12/07/1999
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Application #:
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09193804
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Filing Dt:
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11/17/1998
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Title:
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METHOD AND SYSTEM FOR IDENIFYING A MEMORY MODULE CONFIGURATION
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Patent #:
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Issue Dt:
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09/04/2001
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Application #:
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09267731
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Filing Dt:
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03/15/1999
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Title:
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METHOD AND SYSTEM FOR TESTING RAMBUS MEMORY MODULES
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Patent #:
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Issue Dt:
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11/12/2002
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Application #:
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09943721
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Filing Dt:
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08/31/2001
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Publication #:
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Pub Dt:
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03/14/2002
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Title:
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METHOD AND SYSTEM FOR TESTING RAMBUS MEMORY MODULES
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Patent #:
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Issue Dt:
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05/10/2005
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Application #:
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09966541
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Filing Dt:
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09/27/2001
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Publication #:
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Pub Dt:
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04/11/2002
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Title:
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METHOD AND SYSTEM FOR DISTRIBUTED TESTING OF ELECTRONIC DEVICES
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Assignees
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| 11001 LAKELINE BOULEVARD |
| BUILDING I, SUITE 150 |
| AUSTIN, TEXAS 78717 |
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| SAMSUNG TECHNO PARK, #701, 471 WONCHUN-DONG |
| YEONGTONG-GU, SUWON-SI |
| GYEONGGI-DO, KOREA, DEMOCRATIC PEOPLE'S REPUBLIC OF 443-824 |
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Correspondence name and address
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SCOTT M. SLOMOWITZ
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SEVEN PENN CENTER, 1635 MARKET STREET
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11TH FLOOR
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PHILADELPHIA, PA 19103
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